PCA EPA424-50 So smd 14 pin 5 tap ttl compatible active delay line Datasheet

SO SMD 14 Pin 5 Tap TTL Compatible Active Delay Lines
TAP DELAYS
±5% or ±2 nS†
TOTAL DELAYS
±5% or ±2 nS†
5, 10, 15, 20
6, 12, 18, 24
7, 14, 21, 28
8, 16, 24, 32
9, 18, 27, 36
10, 20, 30, 40
12, 24, 36, 48
15, 30, 45, 60
†Whichever is greater.
25
30
35
40
45
50
60
75
PART
NUMBER
TAP DELAYS
±5% or ±2 nS†
TOTAL DELAYS
±5% or ±2 nS†
PART
NUMBER
EPA424-25
EPA424-30
EPA424-35
EPA424-40
EPA424-45
EPA424-50
EPA424-60
EPA424-75
20, 40, 60, 80
25, 50, 75, 100
30, 60, 90, 120
35, 70, 105, 140
40, 80, 120, 160
45, 90, 135, 180
50, 100, 150, 200
100
125
150
175
200
225
250
EPA424-100
EPA424-125
EPA424-150
EPA424-175
EPA424-200
EPA424-225
EPA424-250
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
DC Electrical Characteristics
Parameter
Test Conditions
VOH
VOL
VIK
IIH
Schematic
Min Max Unit
High-Level Output Voltage
Low-Level Output Voltage
Input Clamp Voltage
High-Level Input Current
VCC = min. VIL = max. I OH = max 2.7
VCC = min. VIH = min. I OL= max
VCC = min. II = II K
VCC = max. VIN = 2.7V
VCC = max. VIN = 5.25V
IIL
Low-Level Input Current
VCC = max. VIN = 0.5V
IOS
Short Circuit Output Current VCC = max. VOUT = 0.
-40
(One output at a time)
ICCH High-Level Supply Current
VCC = max. VIN = OPEN
ICCL Low-Level Supply Current
VCC = max. VIN = 0
TRO Output Rise Time
Td ≤ 500 nS (0.75 to 2.4 Volts)
NH
Fanout High-Level Output
VCC = max. VOH = 2.7V
NL
Fanout Low-Level Output
VCC = max. VOL = 0.5V
Recommended
Operating Conditions
VCC
VIH
VIL
IIK
IOH
IOL
PW*
d*
TA
Supply Voltage
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Current
High-Level Output Current
Low-Level Output Current
Pulse Width of Total Delay
Duty Cycle
Operating Free-Air Temperature
0.5
-1.2
50
1.0
-2
-100
V
V
V
µA
mA
mA
mA
14
VCC
12
4
10
6
8
OUTPUT
INPUT 1
7 GROUND
75
mA
75
mA
4
nS
20 TTL LOAD
10 TTL LOAD
Package Dimensions
Min
Max
Unit
4.75
2.0
5.25
V
V
V
mA
mA
mA
%
%
°C
0.8
-18
-1.0
20
40
-55
40
+125
.100
PCA
EPA424-25
D.C.
.24
.200
Max.
.155
.060
.275
.150
Suggested Solder
Pad Layout
.50
*These two values are inter-dependent.
.500 Max.
.004
Typ.
.235
Max.
Input Pulse Test Conditions @ 25° C
Unit
.02
EIN
PW
TRI
PRR
VCC
DSA424
Pulse Input Voltage
Pulse Width % of Total Delay
Pulse Rise Time (0.75 - 2.4 Volts)
Pulse Repetition Rate @ Td ≤ 200 nS
Pulse Repetition Rate @ Td > 200 nS
Supply Voltage
3.2
110
2.0
1.0
100
5.0
.050
Volts
%
nS
MHz
KHz
Volts
Rev. A 2/5/96
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030
.XXX = ± .010
.228
.244
QAF-CSO1 Rev. B 8/25/94
ELECTRONICS
INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
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