$GYDQFHG 3RZHU 026)(7 IRLR/U110A FEATURES BVDSS = 100 V ♦ Avalanche Rugged Technology ♦ Rugged Gate Oxide Technology RDS(on) = 0.44Ω ♦ Lower Input Capacitance ♦ Improved Gate Charge ID = 4.7 A ♦ Extended Safe Operating Area ♦ Lower Leakage Current: 10µA (Max.) @ VDS = 100V D-PAK ♦ Lower RDS(ON): 0.336Ω (Typ.) I-PAK 2 1 1 3 2 3 1. Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS ID Characteristic Value Drain-to-Source Voltage 100 Continuous Drain Current (TC=25°C) 4.7 Continuous Drain Current (TC=100°C) 3 Units V A IDM Drain Current-Pulsed VGS Gate-to-Source Voltage ±20 V EAS Single Pulsed Avalanche Energy (2) 58 mJ A A 16 (1) IAR Avalanche Current (1) 4.7 EAR Repetitive Avalanche Energy (1) 2.2 mJ dv/dt Peak Diode Recovery dv/dt (3) 6.5 V/ns Total Power Dissipation (TA=25°C) * 2.5 W Total Power Dissipation (TC=25°C) 22 W 0.18 W/°C PD Linear Derating Factor TJ , TSTG TL Operating Junction and - 55 to +150 Storage Temperature Range °C Maximum Lead Temp. for Soldering Purposes, 1/8 300 from case for 5-seconds Thermal Resistance Symbol RθJC Characteristic Typ. Max. Junction-to-Case -- 5.6 RθJA Junction-to-Ambient * -- 50 RθJA Junction-to-Ambient -- 110 Units °C/W * When mounted on the minimum pad size recommended (PCB Mount). Rev. B ©1999 Fairchild Semiconductor Corporation 1 1&+$11(/ 32:(5 026)(7 IRLR/U110A Electrical Characteristics (TC=25°C unless otherwise specified) Symbol Characteristic Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage 100 -- -- ∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.1 -- IGSS IDSS RDS(on) Gate Threshold Voltage 1.0 -- 2.0 Gate-Source Leakage , Forward -- -- 100 Gate-Source Leakage , Reverse -- -- -100 -- -- 10 Drain-to-Source Leakage Current Static Drain-Source On-State Resistance µA VGS=20V VGS=-20V VDS=100V VDS=80V,TC=125°C 100 -- -- 0.44 Ω VGS=5V,ID=2.35A VDS=40V,ID=2.35A -- 3.2 -- Ciss Input Capacitance -- 180 235 Coss Output Capacitance -- 50 65 Crss Reverse Transfer Capacitance -- 20 25 td(on) Turn-On Delay Time -- 8 25 Rise Time -- 10 30 Turn-Off Delay Time -- 17 45 Fall Time -- 8 25 Qg Total Gate Charge -- 5.5 8 Qgs Gate-Source Charge -- 0.9 -- Qgd Gate-Drain ( Miller ) Charge -- 3.5 -- tf nA VDS=5V,ID=250µA -- Forward Transconductance td(off) V See Fig 7 -- gfs tr V/°C ID=250µA Ω VGS(th) V Test Condition VGS=0V,ID=250µA pF (4) (4) VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=50V,ID=5.6A, ns RG=12Ω See Fig 13 (4) (5) VDS=80V,VGS=5V, nC ID=5.6A See Fig 6 & Fig 12 (4) (5) Source-Drain Diode Ratings and Characteristics Symbol Characteristic Min. Typ. Max. Units Test Condition IS Continuous Source Current -- -- 4.7 ISM Pulsed-Source Current (1) -- -- 16 VSD Diode Forward Voltage (4) -- -- 1.5 V trr Reverse Recovery Time -- 85 -- ns TJ=25°C,IF=5.6A Qrr Reverse Recovery Charge -- 0.23 -- µC diF/dt=100A/µs A Integral reverse pn-diode in the MOSFET TJ=25°C,IS=4.7A,VGS=0V (4) Notes; (1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature (2) L=4mH, IAS=4.7A, VDD=25V, RG=27Ω, Starting TJ =25°C (3) ISD ≤ 5.6A, di/dt ≤ 250A/µs, VDD ≤ BVDSS , Starting TJ =25°C (4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2% (5) Essentially Independent of Operating Temperature 2 1&+$11(/ 32:(5 026)(7 IRLR/U110A Fig 1. Output Characteristics Fig 2. Transfer Characteristics VGS Top : 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 101 ID , Drain Current [A] ID , Drain Current [A] 101 100 @ Notes : 1. 250 µs Pulse Test 2. TC = 25 oC 10-1 10-1 100 150 oC 100 25 oC @ Notes : 1. VGS = 0 V 2. VDS = 40 V 3. 250 µs Pulse Test - 55 oC 10-1 101 0 2 4 6 8 10 VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage IDR , Reverse Drain Current [A] Drain-Source On-Resistance VGS = 5 V 0.6 0.4 VGS = 10 V 0.2 o @ Note : TJ = 25 C 0.0 0 5 10 15 101 100 o 25 C 10-1 0.4 20 @ Notes : 1. VGS = 0 V 2. 250 µs Pulse Test 150 oC I , Drain Current [A] 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSD , Source-Drain Voltage [V] D Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage 350 Ciss= Cgs+ Cgd ( Cds= shorted ) Coss= Cds+ Cgd Crss= Cgd C iss 210 C oss 140 @ Notes : 1. VGS = 0 V 2. f = 1 MHz C rss 70 0 100 1 10 VDS , Drain-Source Voltage [V] 6 VGS , Gate-Source Voltage [V] 280 Capacitance [pF] RDS(on) , [ Ω ] 0.8 VDS = 20 V VDS = 50 V V = 80 V DS 4 2 @ Notes : ID = 5.6 A 0 0 2 4 6 Q , Total Gate Charge [nC] G 3 1&+$11(/ 32:(5 026)(7 IRLR/U110A Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature 2.5 RDS(on) , (Normalized) Drain-Source On-Resistance BVDSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 @ Notes : 1. VGS = 0 V 2.0 1.5 1.0 @ Notes : 1. VGS = 5 V 2. ID = 2.8 A 0.5 2. ID = 250 µA 0.8 -75 -50 -25 0 25 50 75 100 125 150 0.0 -75 175 -50 TJ , Junction Temperature [oC] -25 0 25 50 75 100 125 150 175 TJ , Junction Temperature [oC] Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature 102 5 ID , Drain Current [A] 100 µs 101 1 ms 10 ms DC 0 10 @ Notes : 1. TC = 25 oC 10-1 = 150 oC 2. TJ 3. Single Pulse 4 3 2 1 10-2 0 10 101 0 25 102 50 100 125 150 c Fig 11. Thermal Response 101 Thermal Response 75 T , Case Temperature [oC] VDS , Drain-Source Voltage [V] D=0.5 100 @ Notes : 1. Z J C (t)=5.6 o C/W Max. 0.2 θ 0.1 2. Duty Factor, D=t /t 1 0.05 3. TJ M -TC =PD M *Z 2 (t) t1 single pulse t2 10- 1 10- 5 θJC PDM 0.02 0.01 θJC Z (t) , ID , Drain Current [A] Operation in This Area is Limited by R DS(on) 10- 4 t 1 10- 3 10- 2 10- 1 , Square Wave Pulse Duration 100 101 [sec] 4 1&+$11(/ 32:(5 026)(7 IRLR/U110A Fig 12. Gate Charge Test Circuit & Waveform Current Regulator VGS Same Type as DUT 50kΩ Qg 200nF 12V 10V 300nF VDS Qgs VGS Qgd DUT 3mA R1 R2 Current Sampling (IG) Resistor Charge Current Sampling (ID) Resistor Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vout 90% VDD Vin ( 0.5 rated VDS ) RG DUT Vin 10% 10V tr td(on) td(off) t on tf t off Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD LL VDS Vary tp to obtain required peak ID BVDSS IAS ID RG C DUT ID (t) VDD VDS (t) VDD 5V tp tp Time 5 1&+$11(/ 32:(5 026)(7 IRLR/U110A Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS -- IS L Driver VGS RG VGS VGS ( Driver ) Same Type as DUT VDD dv/dt controlled by RG IS controlled by Duty Factor D Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop 6 DPAK Package Dimensions DPAK (FS PKG CODE AA) 0.89 ±0.10 MIN0.55 0.91 ±0.10 0.50 ±0.10 9.50 ±0.30 0.76 ±0.10 0.50 ±0.10 1.02 ±0.20 2.30TYP [2.30±0.20] (1.00) (3.05) (2XR0.25) (0.10) 6.60 ±0.20 (5.34) (5.04) (1.50) (0.70) 2.30 ±0.20 (0.90) 2.70 ±0.20 2.30 ±0.10 2.70 ±0.20 2.30TYP [2.30±0.20] (0.50) 6.10 ±0.20 MAX0.96 (4.34) 9.50 ±0.30 0.80 ±0.20 0.60 ±0.20 (0.50) 6.10 ±0.20 5.34 ±0.30 0.70 ±0.20 6.60 ±0.20 0.76 ±0.10 Dimensions in Millimeters September 1999, Rev B IPAK Package Dimensions IPAK (FS PKG CODE AL) 2.30 ±0.20 6.60 ±0.20 5.34 ±0.20 0.76 ±0.10 2.30TYP [2.30±0.20] 0.50 ±0.10 16.10 ±0.30 6.10 ±0.20 0.70 ±0.20 (0.50) 9.30 ±0.30 MAX0.96 (4.34) 1.80 ±0.20 0.80 ±0.10 0.60 ±0.20 (0.50) 2.30TYP [2.30±0.20] 0.50 ±0.10 Dimensions in Millimeters September 1999, Rev B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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