Infineon BTM7810K Trilithic Datasheet

Data Sheet, Rev. 1.0, May 2008
BTM7810K
TrilithIC
Automotive Power
BTM7810K
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
2.1
2.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open Load Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5.1
5.2
5.3
5.4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Data Sheet
2
8
8
8
8
8
8
8
9
10
10
11
11
12
Rev. 1.0, 2008-05-15
TrilithIC
1
BTM7810K
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Quad D-MOS switch
Free configurable as bridge or quad-switch
Optimized for DC motor management applications
Low RDS ON
High side: 26 mΩ typ. @ 25°C, 65 mΩ max. @ 110°C
Low side: 14mΩ typ. @ 25°C, 28 mΩ max. @ 110°C
Maximum peak current: typ. 42 A @ 25 °C
Very low quiescent current: typ. 4 μA @ 25 °C
Thermally optimized power package
Operates up to 40 V
Load and GND-short-circuit-protection
Overtemperature shut down with hysteresis
Undervoltage detection with hysteresis
Open load detection in OFF mode
Status flag for overtemperature
Internal clamp diodes
Isolated sources for external current sensing
Green Product (RoHS compliant)
AEC Qualified
PG-TO263-15-1
Description
The BTM7810K is part of the TrilithIC family containing three dies in one package: One double high-side switch
and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated lead frames.
The sources are connected to individual pins, so the BTM7810K can be used in H-bridge- as well as in any other
configuration. The double high-side switch is manufactured in SMART SIPMOS® technology which combines low
RDS ON vertical DMOS power stages with CMOS circuitry for control, protection and diagnosis. To achieve low
RDS ON and fast switching performance, the low-side switches are manufactured in S-FET logic level technology.
Type
Package
Marking
BTM7810K
PG-TO263-15-1
BTM7810K
Data Sheet
3
Rev. 1.0, 2008-05-15
BTM7810K
Description
2
Pin Configuration
2.1
Pin Assignment
Molding
Compound
NC
1
SL1
2
IL1
3
NC
4
IH1
5
ST1
6
SH1
7
DHVS
8
GND
9
IH2
10
ST2
11
SH2
12
Heat-Slug 1
18
DL1
Heat-Slug 2
17
DHVS
Heat-Slug 3
IL2
13
16
Figure 1
Data Sheet
SL2
14
NC
15
DL2
Pin Assignment BTM7810K (Top View)
4
Rev. 1.0, 2008-05-15
BTM7810K
Description
Table 1
Pin No.
Pin Definitions and Functions
Symbol Function
1
NC
Not connected
2
SL1
Source of low-side switch 1
3
IL1
Analog input of low-side switch 1
4
NC
Not connected
5
IH1
Digital input of high-side switch 1
6
ST1
Status of high-side switch 1; open Drain output
7
SH1
Source of high-side switch 1
8
DHVS
Drain of high-side switches and power supply voltage
9
GND
Ground of high-side switches
10
IH2
Digital input of high-side switch 2
11
ST2
Status of high-side switch 2; open Drain output
12
SH2
Source of high-side switch 2
13
IL2
Analog input of low-side switch 2
14
SL2
Source of low-side switch 2
15
NC
Not connected
16
DL2
Drain of low-side switch 2
Heat-Slug 3
17
DHVS
Drain of high-side switches and power supply voltage
Heat-Slug 2
18
DL1
Drain of low-side switch 1
Heat-Slug 1
Pins written in bold type need power wiring.
Data Sheet
5
Rev. 1.0, 2008-05-15
BTM7810K
Description
2.2
Terms
IS
VS
CS
470nF
CL
100µF
IFH1,2
DHVS
IST LK1
IST1
ST1
6
8, 17
VDSH2
VDSH1
-VFH2
-VFH1
IST LK2
IST2
ST2
11
IH1
5
IH2
10
GND
6
Diagnosis
Biasing and Protection
VST1
VSTL1
VSTZ1
IIH1
VST2
Gate
Driver
VSTL2
VSTZ2
IIH1
VIH1
VIH2
RO1
RO2
Gate
Driver
12
16
IGND
7
ILKCL
18
SH2
ISH2
DL2
IDL2
IDL LK 2
VUVON
SH1
ISH1
VUVOFF
DL1
IDL1
IDL LK 1
VIL1
IIL1
IL1
3
IIL2
IL2
13
VIL th 1
VIL2
VIL th 2
Figure 2
2
14
VDSL1
VDSL2
SL1
SL2
-VFL1
-VFL2
ISCP L 1
ISCP L 2
ISL1
ISL2
Terms BTM7810K
Table 2
HS-Source-Current
Named during Short Circuit
Named during Leakage-Cond.
ISH1,2
ISCP H
IDL LK
Data Sheet
6
Rev. 1.0, 2008-05-15
BTM7810K
Description
3
Block Diagram
DHVS
6
8, 17
ST1
ST2
IH1
IH2
11
5
10
Diagnosis
Biasing and Protection
Driver
IN OUT
0 0 L L
0 1 L H
1 0 H L
1 1 H H
RO1
RO2
12
16
SH2
DL2
9
GND
7
18
SH1
DL1
3
IL1
13
IL2
2
SL1
Figure 3
Data Sheet
14
SL2
Block Diagram BTM7810K
7
Rev. 1.0, 2008-05-15
BTM7810K
4
Circuit Description
4.1
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are
driven by these stages and convert the logic signal into the necessary form for driving the power output stages.
The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the gates of the standard
N-channel vertical power-MOS-FETs.
4.2
Output Stages
The output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body
diodes can be used for freewheeling when communicating inductive loads. If the high-side switches are used as
single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
4.3
Short Circuit Protection
The outputs are protected against short circuit to ground and short circuit over load.
In short circuit to ground and short circuit over load situation the HS switches will limit the load current. Due to the
high power dissipation in short circuit situation the junction temperature will rise. The over temperature protection
function will switch off the output transistors if the junction temperature reaches the over temperature shutdown
limit.
4.4
Overtemperature Protection
The high-side switches also incorporate an over temperature protection circuit with hysteresis which switches off
the output transistors and sets the status output to low.
4.5
Undervoltage Lockout
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The high-side output
transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF.
4.6
Open Load Detection
The open load detection of the BTM7810K works in OFF condition and is based on a voltage measurement at the
source of the high side switch. In order to use the open load detection SH2 has to be connected to Vcc via a pull
up resistor. Because this pull up resistor would connect the bridge output to the µC supply it needs to be
disconnected whenever the high side switch is on. This can be done by a transistor as shown in the application
example (Figure 4 “Application Example BTM7810K” on Page 15). To check for open load:
•
•
•
Set IH1 = IH2 = LOW (both high side switches off)
Set IL2 = LOW, IL1 = HIGH (only low side switch 1 is on)
Connect Rol (open load pull up) to 5V via transistor
If the load is connected properly it will pull down the voltage at SH2 to a value close to 0V.
If the load is disconnected the resistor will pull the voltage at SH2 to value close to Vcc.
If the voltage at SH2 is higher than the open load detection voltage VOUT(OL) then ST will be pulled down.
Data Sheet
8
Rev. 1.0, 2008-05-15
BTM7810K
4.7
Status Flag
The status flag outputs are open drain outputs with zener-diode which require a pull-up resistor, as shown in the
application circuit in Figure 4 “Application Example BTM7810K” on Page 15. Various errors as listed in the
table “Diagnosis” are reported by switching the open drain output ST to low.
Table 3
Truthtable and Diagnosis (valid only for the High-Side-Switches)
Flag
IH1
IH2
Inputs
SH1 SH2 ST1
ST2 Remarks
Outputs
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
H
1
1
1
1
1
1
1
1
stand-by mode
switch2 active
switch1 active
both switches active
0
1
X
X
X
X
0
1
Z
H
X
X
X
X
Z
H
0
1
1
1
1
1
0
1
detected
0
1
X
X
L
L
X
X
1
0
1
1
detected
X
X
0
1
X
X
L
L
1
1
1
0
detected
Overtemperature both high-side
switches
0
0
1
1
0
1
0
1
L
L
L
L
L
L
L
L
1
1
0
0
1
0
1
0
detected
detected
detected
Undervoltage
X
X
L
L
1
1
not detected
Normal operation;
identical with functional truth table
Open load at high-side switch 1
Open load at high-side switch 2
Overtemperature high-side switch1
Overtemperature high-side switch2
detected
Note: * multiple simultaneous errors are not shown in this table
Inputs:
Outputs:
Status:
0 = Logic LOW
Z = Output in tristate condition
1 = No error
1 = Logic HIGH
L = Output in sink condition
0 = Error
X = don’t care
H = Output in source condition
–
–
X = Voltage level undefined
–
Data Sheet
9
Rev. 1.0, 2008-05-15
BTM7810K
5
Electrical Characteristics
5.1
Absolute Maximum Ratings
Absolute Maximum Ratings1)
-40 °C < Tj < 110 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Pos.
Parameter
Symbol
Limit Values
Unit Remarks
min.
max.
VS
VS(SCP)
– 0.3
42
V
–
28
V
IS
IIH
VIH
– 14
3)
A
TA = 25°C; tP < 100 ms
–5
5
mA
Pin IH1 and IH2
– 10
16
V
Pin IH1 and IH2
VST
IST
– 0.3
5.4
V
–5
5
mA
Pin ST1 or ST2
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)
5.1.1
Supply voltage
5.1.2
Supply voltage for full short circuit
protection
5.1.3
HS-drain current2)
5.1.4
HS-input current
5.1.5
HS-input voltage
–
Status Output ST
5.1.6
Status pull up voltage
5.1.7
Status Output current
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
– 21
26
A
5.1.10
–
42
A
5.1.11
–
67
A
VIL = 0 V; ID ≤ 1 mA
Tj = 25°C
TA = 25°C; tP < 100 ms
TA = 25°C; tP < 10 ms
TA = 25°C; tP < 1 ms
VIL
– 20
20
V
Pin IL1 and IL2
Tj
Tstg
– 40
110
°C
–
– 55
150
°C
–
VESD
VESD
VESD
VESD
–
0.5
kV
–
1
kV
–
2
kV
–
4
kV
5.1.8
Drain-Source-Clamp voltage
VDSL
55
–
V
5.1.9
LS-drain current2)
IDL
5.1.12
LS-input voltage
Temperatures
5.1.13
Junction temperature
5.1.14
Storage temperature
4)
ESD Protection
5.1.15
Input LS-Switch
5.1.16
Input HS-Switch
5.1.17
Status HS-Switch
5.1.18
Output LS and HS-Switch
1)
2)
3)
4)
all other pins connected
to Ground
Not subject to production test; specified by design
Single pulse
Internally limited
ESD susceptibility HBM according to EIA/JESD22-A114-B (1.5kΩ, 100pF)
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
10
Rev. 1.0, 2008-05-15
BTM7810K
5.2
Pos.
Functional Range
Parameter
Symbol Limit Values
min.
max.
Unit
Remarks
5.2.1
Supply voltage
VS
VUVOFF
42
V
After VS rising above
VUVON
5.2.2
Input voltage HS
– 0.3
15
V
–
5.2.3
Input voltage LS
– 0.3
20
V
–
5.2.4
Status output current
0
2
mA
–
5.2.5
Junction temperature
VIH
VIL
IST
Tj
– 40
110
°C
–
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table
5.3
Pos.
Thermal Resistance
Parameter
Symbol
5.3.1
LS-junction to case1)
5.3.2
1)
5.3.3
HS-junction to case
1)
Junction to ambient
RthJA = Tj(HS) / (P(HS)+ P(LS))
RthJC L
RthJC H
RthJA
Limit Values
Unit
Min.
Typ.
Max.
–
–
1.05
K/W
–
–
1.45
K/W
–
16
–
K/W
Conditions
2)
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Data Sheet
11
Rev. 1.0, 2008-05-15
BTM7810K
5.4
Electrical Characteristics
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
–
4
9
μA
IH1 = IH2 = 0 V
Tj = 25 °C
–
–
15
μA
IH1 = IH2 = 0 V
2.5
4.5
mA
Current Consumption HS-switch
5.4.1
Quiescent current
IS
Supply current;
one HS-switch active
IS
–
5.4.3
Supply current;
both HS-switches active
IS
–
5
9
mA
IH1 and IH2 = 5 V
VS = 12 V
5.4.4
Leakage current of
high-side switch
ISH LK
–
–
7
μA
5.4.5
Leakage current through logic GND
in free wheeling condition
ILKCL = IFH + –
ISH
2.2
10
mA
VIH = VSH = 0 V
VS = 12 V
Tj = 85 °C
IFH = 5 A
VS = 12 V
5.4.2
IH1 or IH2 = 5 V
VS = 12 V
Current Consumption LS-switch
5.4.6
Input current
IIL
–
10
100
nA
VIL = 20 V;
VDSL = 0V
VIL = 0 V
VDSL = 40V
Tj = 85 °C
5.4.7
Leakage current of low-side switch
IDL LK
–
–
12
μA
VUVON
VUVOFF
VUVHY
–
–
5
V
1.8
–
4.5
V
–
1
–
V
VS increasing
VS decreasing
VUVON – VUVOFF
Under Voltage Lockout HS-switch
5.4.8
Switch-ON voltage
5.4.9
Switch-OFF voltage
5.4.10
Switch ON/OFF hysteresis
Output stages
5.4.11
Inverse diode of high-side switch;
Forward-voltage
VFH
–
0.8
1.2
V
IFH = 5 A
5.4.12
Inverse diode of low-side switch;
Forward-voltage
VFL
–
0.8
1.2
V
IFL = 5 A
5.4.13
Static drain-source on-resistance of
high-side switch
RDS ON H
–
26
–
mΩ
–
45
65
mΩ
–
14
–
mΩ
–
20
28
mΩ
ISH = 5 A; VS = 12 V
Tj = 25 °C
ISH = 5 A; VS = 12 V
Tj = 110°C2)
ISL = 5 A; VIL = 5 V
Tj = 25 °C
ISL = 5 A; VIL = 5 V
Tj = 110 °C2)
5.4.14
Static drain-source
on-resistance of low-side switch
Data Sheet
RDS ON L
12
Rev. 1.0, 2008-05-15
BTM7810K
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
35
48
65
Short Circuit of high-side switch to GND
5.4.15
Initial peak SC current1)
tdel = 150 µs; VS = 12 V; VDSH = 12V
27
36
48
A
Tj = -40 °C
Tj = 25°C
Tj = 110°C2)
RO
7
14
42
kΩ
VDSL = 3 V
ISCP H
42
A
A
Short Circuit of high-side switch to VS
5.4.16
Output pull-down-resistor
2)
Thermal Shutdown
5.4.17
Thermal shutdown junction
temperature
Tj SD
155
180
190
°C
–
5.4.18
Thermal switch-on junction
temperature
Tj SO
150
170
180
°C
–
5.4.19
Temperature hysteresis
ΔΤ
–
10
–
°C
ΔΤ = TjSD – TjSO
VST L
IST LK
VST Z
td(SToffo+)
–
0.2
0.6
V
–
–
5
μA
5.4
–
–
V
IST = 1.6 mA
VST = 5 V
IST = 1.6 mA
–
–
20
μs
Status Flag Output ST of high-side switch
5.4.20
Low output voltage
5.4.21
Leakage current
5.4.22
Zener-limit-voltage
5.4.23
Status change after positive input
slope with open load2)
5.4.24
Status change after negative input
slope with open load2)
td(SToffo-)
–
–
700
μs
5.4.25
Status change after positive input
slope with overtemperature2)
td(STofft+)
–
1.6
10
μs
RST = 47 kΩ
5.4.26
Status change after negative input
slope with overtemperature2)
td(STofft-)
–
14
100
μs
RST = 47 kΩ
VOUT(OL)
2
3
4
V
VS = 12 V
tON
tOFF
dV/dtON
-dV/dtOFF
–
100
220
μs
–
120
250
μs
RLoad = 12 Ω
VS = 12 V
–
0.5
1.1
V/μs
–
0.7
1.3
V/μs
td(on)
tr
td(off)
tf
–
20
–
ns
–
85
–
ns
–
60
–
ns
–
80
–
ns
QIS
–
4.5
–
nC
Open Load Detection in Off Condition
5.4.27
Open Load Detection Voltage
2)
Switching times of high-side switch
5.4.28
Turn-ON-time to 90% VSH
5.4.29
Turn-OFF-time to 10% VSH
5.4.30
Slew rate on 10 to 30% VSH
5.4.31
Slew rate off 70 to 40% VSH
2)
Switching times of low-side switch
5.4.32
Turn-ON Delay Time
5.4.33
Rise Time
5.4.34
Switch-OFF Delay Time
5.4.35
Fall Time
resistive load
ISL= 3A; VDSL=12V
VIL = 5V; RG = 16Ω
2)
Gate charge of low-side switch
5.4.36
Input to source charge;
Data Sheet
13
ISL = 3 A;
VDSL=12 V
Rev. 1.0, 2008-05-15
BTM7810K
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
5.4.37
Input to drain charge;
QID
–
12
–
nC
5.4.38
Input charge total;
QI
–
30
60
nC
5.4.39
Input plateau voltage;
V(plateau)
–
2.6
–
V
VIH High
VIH Low
VIH HY
IIH High
IIH Low
RI
VIH Z
–
–
3.0
V
–
1
–
–
V
–
–
0.5
–
V
–
5
30
65
μA
5
14
25
μA
VIH = 5 V
VIH = 0.4 V
2.7
4
6
kΩ
–
5.4
–
–
V
IIH = 1.6 mA
VIL th
0.8
1.7
3.0
V
IDL = 1 mA
ISL = 3 A;
VDSL=12 V
ISL = 3 A;
VDSL=12 V
VIL = 0 to 5 V
ISL = 3 A;
VDSL=12 V
Control Inputs of high-side switches IH 1, 2
5.4.40
H-input voltage
5.4.41
L-input voltage
5.4.42
Input voltage hysteresis
5.4.43
H-input current
5.4.44
L-input current
5.4.45
Input series resistance
5.4.46
Zener limit voltage
Control Inputs IL1, 2
5.4.47
Gate-threshold-voltage
1) When Vs>18V the peak short circuit current is significantly lower.
2) Not subject to production test; specified by design
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical
characteristics specified mean values expected over the production spread. If not otherwise specified,
typical characteristics apply at TA = 25 °C and the given supply voltage.
Data Sheet
14
Rev. 1.0, 2008-05-15
BTM7810K
6
Application Information
Note: The following simplified application examples are given as a hint for the implementation of the device only
and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the
device. The function of the described circuits must be verified in the real application
Watchdog
Reset
Q
RQ
100 kΩ
RQ
100 kΩ
WD R
CQ
22µF
VCC
TLE
4278G
I
D
CS
10µF
D01
Z39
CD
47nF
DHVS
ST1
RS
VS=12V
6
BCR192W
8, 17
10 kΩ
to µC
RS
ST2 11
Diagnosis
Biasing and Protection
10 kΩ
ROL
560Ohm
IH1
5
IH2
10
GND
9
optional for
open load
in off
Gate
Driver
RO1
XC866
µP
Gate
Driver
RO2
12
18
IL1
3
IL2
13
GND
Data Sheet
SH2
DL2
16
7
Figure 4
Can be replaced
by diode when
Short to Vs
detection is not
needed
2
14
SL1
SL2
SH1
M
DL1
Application Example BTM7810K
15
Rev. 1.0, 2008-05-15
BTM7810K
7
Package Outlines
21.6 ±0.2
8.3 1)
4.4
5.56 ±0.15
1.27 ±0.1
B
0.1
A
4.7 ±0.5
14x1.4
0.05
2.4
8.41)
8.21)
4.8
9.25 ±0.2
(15)
1±0.3
8.18 ±0.15
1)
2.7 ±0.3
1±0.2
0...0.15
0.8 ±0.1
0.5 ±0.1
8˚ max.
0.25
1)
M
A B
0.1
Typical
All metal surfaces tin plated, except area of cut.
Footprint
21.6
8.4
4
16
9.5
0.8
0.4
Figure 5
1
PG-TO263-15-1 (Plastic Transistor Single Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
16
Dimensions in mm
Rev. 1.0, 2008-05-15
BTM7810K
8
Revision History
Rev.
Date
Changes
1.0
2008-05-15
Initial Version
Data Sheet
17
Rev. 1.0, 2008-05-15
Edition 2008-05-15
Published by
Infineon Technologies AG
81726 Munich, Germany
© 5/14/08 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
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question, please contact the nearest Infineon Technologies Office.
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