Renesas HD74LVCZ16244A 16-bit buffers / line drivers with 3-state output Datasheet

HD74LVCZ16244A
16–bit Buffers / Line Drivers with 3–state Outputs
REJ03D0374–0200
(Previous ADE-205-232 (Z))
Rev.2.00
Aug. 19, 2004
Description
The HD74LVCZ16244A has sixteen line drivers with three state outputs in a 48 pin package. This device is a non
inverting buffer and has four active low enables (1G to 4G). Each enable independently controls four buffers.
When VCC is between 0 and 1.5 V, the device is in the high impedance state during power up or power down.
Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
•
•
•
•
•
•
•
•
•
VCC = 2.7 to 5.5 V
All inputs VIH (Max) = 5.5 V (@VCC = 0 to 5.5 V)
All outputs VO (Max) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High impedance state during power up and power down
Power off disables outputs, permitting live insertion
High output current ±24 mA (@VCC = 3.0 to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LVCZ16244ATEL
TSSOP–48 pin
TTP–48DBV
T
EL (1,000 pcs/reel)
Function Table
Inputs
G
A
Output Y
H
L
X
H
Z
H
L
L
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
Rev.2.00 Aug. 19, 2004 page 1 of 7
HD74LVCZ16244A
Pin Arrangement
1G 1
48 2G
1Y1 2
47 1A1
1Y2 3
46 1A2
GND 4
45 GND
1Y3 5
44 1A3
1Y4 6
43 1A4
VCC 7
42 VCC
2Y1 8
41 2A1
2Y2 9
40 2A2
GND 10
39 GND
2Y3 11
38 2A3
2Y4 12
37 2A4
3Y1 13
36 3A1
3Y2 14
35 3A2
GND 15
34 GND
3Y3 16
33 3A3
3Y4 17
32 3A4
VCC 18
31 VCC
4Y1 19
30 4A1
4Y2 20
29 4A2
GND 21
28 GND
4Y3 22
27 4A3
4Y4 23
26 4A4
4G 24
25 3G
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
Input voltage
Output voltage
VCC
VI
VO
V
V
V
Input diode current
Output diode current
Output current
VCC, GND current
Storage temperature
IIK
IOK
IO
ICC or IGND
Tstg
–0.5 to 7.0
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC+0.5
–50
–50
±50
±100
–65 to 150
mA
mA
mA
mA
°C
Conditions
Output “Z” or VCC : OFF
Output “H” or “L”
VI < 0
VO < 0
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00 Aug. 19, 2004 page 2 of 7
HD74LVCZ16244A
Recommended Operating Conditions
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
Input voltage
Output voltage
VCC
VI
VO
V
V
V
At operation
Output current
IOH
2.7 to 5.5
0 to 5.5
0 to 5.5
0 to VCC
–12
–24 *1
12
24 *1
0 to 6
–40 to +85
IOL
Input rise / fall time
Operating temperature
Note:
tr, tf
Ta
mA
mA
Output “Z” or VCC : OFF
Output “H” or “L”
VCC = 2.7 V
VCC = 3.0 to 5.5 V
VCC = 2.7 V
VCC = 3.0 to 5.5 V
ns / V
°C
1. Duty cycle ≤ 50%
Logic Diagram
1G
1A1
1A2
1A3
1A4
3G
3A1
3A2
3A3
3A4
1
2G
47
2
46
3
44
5
43
6
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
25
4G
36
13
35
14
33
16
32
17
Rev.2.00 Aug. 19, 2004 page 3 of 7
3Y1
4A1
3Y2
4A2
3Y3
4A3
3Y4
4A4
48
41
8
40
9
38
11
37
12
2Y1
2Y2
2Y3
2Y4
24
30
19
29
20
27
22
26
23
4Y1
4Y2
4Y3
4Y4
HD74LVCZ16244A
Electrical Characteristics
(Ta = –40 to 85°C)
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
Input voltage
VIH
2.0
VCC×0.7
—
—
VCC–0.2
2.2
2.4
2.2
3.8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.8
VCC×0.3
—
—
—
—
—
0.2
0.4
0.55
0.55
±5
±5
±5
±5
±5
225
350
500
V
∆ICC
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 5.5
2.7
3.0
3.0
4.5
2.7 to 5.5
2.7
3.0
4.5
0 to 5.5
2.7 to 5.5
0 to 1.5
1.5 to 0
0
2.7 to 3.6
2.7 to 5.5
2.7 to 3.6
CIN
CO
3.3
3.3
—
—
4.1
8.1
—
—
pF
pF
VIL
Output voltage
VOH
VOL
Input current
Off state output
current
Output leak current
Quiescent supply
current
Input capacitance
Output capacitance
Note:
IIN
IOZ
IOZPU
IOZPD
IOFF
ICC
Test Conditions
V
V
IOH = –100 µA
IOH = –12 mA
IOH = –24 mA
V
IOL = 100 µA
IOL = 12 mA
IOL = 24 mA
µA
µA
VIN = 0 to 5.5 V
VOUT = 0 to 5.5 V
VOUT = 0.5 to 5.5 V,
Output enable = don’t care
µA
µA
VIN or VO = 5.5 V
VIN = 3.6 to 5.5 V *1, IO = 0
VIN = VCC or GND
µA
VIN = one input at (VCC–0.6) V,
other inputs at VCC or GND
VIN = VCC or GND
VOUT = VCC or GND
1. This applies in the disabled state only.
Switching Characteristics
(Ta = –40 to 85°C)
TO
(Output)
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
FROM
(Input)
Propagation delay time
tPLH
tPHL
ns
G
Y
tHZ
tLZ
4.7
4.1
3.8
5.8
4.6
4.4
6.2
5.8
4.6
—
1.0
1.0
Y
Output disable time
—
—
—
—
—
—
—
—
—
—
—
—
A
tZH
tZL
—
1.1
—
—
1.0
—
—
1.8
—
—
—
—
ns
Output enable time
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
ns
G
Y
Between output pin skew *1 tOSLH
tOSHL
Note:
1. This parameter is characterized but not tested.
tOSLH = |tPLHm–tPLHn|, tOSHL = |tPHLm–tPHLn|
Rev.2.00 Aug. 19, 2004 page 4 of 7
ns
HD74LVCZ16244A
Test Circuit
VCC
VCC
Output
Input
Pulse generator
Zout = 50 Ω
See Function Table
1G to 4G
500 Ω
1Y1 to 4Y4
1A1 to 4A4
C L=
50 pF
450 Ω
Note: 1. C L includes probe and jig capacitance.
OPEN
See
under table
*1
GND
50 Ω Scope
Symbol
Rev.2.00 Aug. 19, 2004 page 5 of 7
S1
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
t PLH / t PHL
OPEN
OPEN
t ZH/ t HZ
t ZL / t LZ
GND
6V
GND
2×VCC
HD74LVCZ16244A
• Waveforms – 1
tr
tf
90 %
Vref
Input A
VIH
90 %
Vref
10 %
10 %
GND
t PHL
t PLH
VOH
Output Y
Vref
Vref
VOL
• Waveforms – 2
tf
Input G
tr
90 %
Vref
VIH
90 %
Vref
10 %
t ZL
10 %
GND
t LZ
≈VOH1
Waveform – A
Vref
t ZH
Waveform – B
Vref
VOL + 0.3 V
VOL
t HZ
VOH
VOH – 0.3 V
≈VOL1
TEST
VIH
Vref
Vcc=2.7V,
3.3±0.3V
2.7 V
1.5 V
Vcc=5.0±0.5V
VCC
VOH1
3V
50%VCC
VCC
VOL1
GND
GND
Notes: 1. Input waveform : PRR = 10 MHz, duty cycle 50%, t r = 2.5 ns, t f = 2.5 ns
2. Waveform – A shows input conditions such that the output is “L” level
when enabled by the output control.
3. Waveform – B shows input conditions such that the output is “H” level
when enabled by the output control.
Rev.2.00 Aug. 19, 2004 page 6 of 7
HD74LVCZ16244A
Power up / down Characteristics
4.0
Ta = 25˚C
Output enable = “L”
VOUT (V)
3.0
2.0
Disable area
Enable area
1.0
0
0
1.0
2.0
3.0
4.0
VCC (V)
Package Dimensions
As of January, 2002
12.5
12.7 Max
Unit: mm
25
6.10
48
1
*0.19 ± 0.05
0.50
24
0.08 M
1.0
8.10 ± 0.20
0.65 Max
*Pd plating
Rev.2.00 Aug. 19, 2004 page 7 of 7
0.10 ± 0.05
0.10
*0.15 ± 0.05
1.20 Max
0˚ – 8˚
0.50 ± 0.1
Package Code
JEDEC
JEITA
Mass (reference value)
TTP–48DBV
—
—
0.20 g
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
http://www.renesas.com
RENESAS SALES OFFICES
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501
Renesas Technology Europe Limited.
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom
Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900
Renesas Technology Europe GmbH
Dornacher Str. 3, D-85622 Feldkirchen, Germany
Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11
Renesas Technology Hong Kong Ltd.
7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2375-6836
Renesas Technology Taiwan Co., Ltd.
FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
© 2004. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .1.0
Similar pages