PD - 94270
SMPS MOSFET
IRFB260N
HEXFET® Power MOSFET
Applications
High frequency DC-DC converters
l
VDSS
RDS(on) max
ID
0.040Ω
56A
200V
Benefits
Low Gate-to-Drain Charge to Reduce Switching Losses
l Fully Characterized Capacitance Including Effective COSS to
Simplify Design, (See App. Note AN1001)
l Fully Characterized Avalanche Voltage and Current
l
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
Max.
Units
56
40
220
380
2.5
± 20
10
-55 to + 175
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Notes
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
through
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Typ.
Max.
Units
–––
0.50
–––
0.40
–––
62
°C/W
are on page 8
1
8/29/01
IRFB260N
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
200
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.26
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.040
Ω
VGS = 10V, ID = 34A
4.0
V
VDS = VGS, ID = 250µA
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
29
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
150
24
67
17
64
52
50
4220
580
140
5080
230
500
Max. Units
Conditions
–––
S
VDS = 50V, ID = 34A
220
ID = 34A
37
nC
VDS = 160V
100
VGS = 10V
–––
VDD = 100V
–––
ID = 34A
ns
–––
RG = 1.8Ω
–––
VGS = 10V
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 160V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
450
34
38
mJ
A
mJ
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
56
––– –––
showing the
A
G
integral reverse
––– ––– 220
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 34A, VGS = 0V
––– 240 360
ns
TJ = 25°C, IF = 34A
––– 2.1 3.2
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFB260N
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
TOP
10
4.5V
1
100
4.5V
10
1
20µs PULSE WIDTH
Tj = 25°C
20µs PULSE WIDTH
Tj = 175°C
0.1
0.1
0.1
1
10
100
0.1
1
VDS, Drain-to-Source Voltage (V)
3.5
TJ = 25°C
VDS = 15V
20µs PULSE WIDTH
5.0
7.0
9.0
11.0
13.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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15.0
2.5
(Normalized)
100.00
3.0
I D = 56A
3.0
T J = 175°C
R DS(on) , Drain-to-Source On Resistance
ID , Drain-to-Source Current (Α )
1000.00
1.00
100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
10.00
10
VDS , Drain-to-Source Voltage (V)
2.0
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
80
TJ , Junction Temperature
100 120 140 160 180
( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB260N
100000
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
Ciss
1000
Coss
100
Crss
VDS = 160V
VDS = 100V
VDS = 40V
10
Coss = Cds + Cgd
10000
ID = 34A
10
7
5
2
0
1
10
100
1000
0
30
60
90
120
150
QG , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.00
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100.00
100
TJ = 175°C
10.00
T J = 25°C
1.00
100µsec
10
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.0
0.5
1.0
1.5
VSD , Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10msec
1
0.10
2.0
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB260N
60
RD
VDS
VGS
50
D.U.T.
RG
+
-VDD
ID , Drain Current (A)
40
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
30
Fig 10a. Switching Time Test Circuit
20
VDS
10
90%
0
25
50
75
100
125
TC , Case Temperature
150
175
( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
(Z thJC)
1
D = 0.50
0.1
0.20
Thermal Response
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P DM
0.01
t1
t2
Notes:
1. Duty factor D =
2. Peak T
0.001
0.00001
0.0001
0.001
0.01
t1/ t
2
J = P DM x Z thJC
+T C
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB260N
+
V
- DD
IA S
20V
tp
680
A
0 .0 1 Ω
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
E AS , Single Pulse Avalanche Energy (mJ)
D .U .T
RG
ID
D R IV E R
L
VDS
850
1 5V
TOP
14A
24A
BOTTOM
34A
510
340
170
0
25
50
75
100
125
150
175
( °C)
Starting T , Junction
Temperature
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
10 V
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFB260N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB260N
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2 .8 7 (.1 13 )
2 .6 2 (.1 03 )
10 .5 4 (.4 15 )
10 .2 9 (.4 05 )
-B -
3.7 8 (.14 9)
3.5 4 (.13 9)
4 .69 (.1 85 )
4 .20 (.1 65 )
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
6.47 (.255 )
6.10 (.240 )
4
15 .2 4 (.6 00 )
14 .8 4 (.5 84 )
1.1 5 (.0 4 5)
M IN
1
2
14 .0 9 (.5 55 )
13 .4 7 (.5 30 )
4 .06 (.160 )
3 .55 (.140 )
3X
3X
L E A D A S S IG N M E N T S
1 - G A TE
2 - D R A IN
3 - SOURCE
4 - D R A IN
3
1.40 (.0 5 5)
1.15 (.0 4 5)
0.93 (.0 37 )
0.69 (.0 27 )
0 .3 6 (.0 1 4)
3X
M
B A M
0.55 (.02 2)
0.46 (.01 8)
2.9 2 (.11 5)
2.6 4 (.10 4)
2 .5 4 (.1 00)
2X
N OT E S :
1 D IME N S IO N IN G & TO L E R A N C IN G P E R A NS I Y 14 .5 M , 19 82 .
2 C O N T R O LL ING D IM E N S IO N : IN C H
3 O U TL IN E C O N F O R M S TO J E D E C O U T LIN E T O -22 0 A B.
4 HE A T S IN K & LE A D M E A S UR E M EN T S D O NO T IN CL U D E B U R R S .
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
ASS EMBLED ON WW 19, 1997
IN T HE AS SEMBLY LINE "C"
PART NUMBER
INTERNAT IONAL
RECT IF IER
LOGO
ASS EMBLY
LOT CODE
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 0.78mH
R G = 25Ω, IAS = 34A.
ISD ≤ 34, di/dt ≤ 480A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging
time as Coss while VDS is rising from 0 to 80% VDSS
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/01
8
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