ICL8069 ® Data Sheet January 2004 FN3172.3 Low Voltage Reference Features The ICL8069 is a 1.2V temperature-compensated voltage reference. It uses the band-gap principle to achieve excellent stability and low noise at reverse currents down to 50µA. Applications include analog-to-digital converters, digital-toanalog converters, threshold detectors, and voltage regulators. Its low power consumption makes it especially suitable for battery operated equipment. • Low Bias Current (Min) . . . . . . . . . . . . . . . . . . . . . . .50µA • Low Dynamic Impedance • Low Reverse Voltage • Low Cost Pinouts Ordering Information ICL8069 (SOIC) TOP VIEW PART NUMBER MAXIMUM TEMPCO TEMP. RANGE (oC) ICL8069CCZR 0.005%/oC 0 to 70 SIP Package (TO-92) Z3.05 ICL8069DCZR 0.01%/oC 0 to 70 SIP Package (TO-92) ICL8069CCBA 0.005%/ oC 0 to 70 8 Ld SOlC PACKAGE PKG. DWG. # NC 1 8 V+ NC 2 7 NC Z3.05 NC 3 6 NC M8.15 V- 4 5 NC ICL8069 (SIP TO-92) TOP VIEW 1 NC V+ V- 1 2 3 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ICL8069 Functional Block Diagrams SIMPLE REFERENCE (1.2V OR LESS) +5V 6.8kΩ ICL8069 4.7µF (NOTE 1) V+ 10kΩ V- VOUT BUFFERED 10V REFERENCE USING A SINGLE SUPPLY +15V ICL8069 V- V+ 7 6 LM108 8 3 + 1kΩ 5 4 15kΩ 2 +10VOUT 0.01µF 1kΩ 8.2kΩ DOUBLE REGULATED 100mV REFERENCE FOR ICL7107 ONE-CHIP DPM CIRCUIT +5V 2.2kΩ ICL7107 +V V+ 10kΩ V- 1kΩ ICL8069 REF HI COMMON REF LO 2 ICL8069 Absolute Maximum Ratings Thermal Information Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Note 3 Forward Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Reverse Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Thermal Resistance (Typical, Note 1) Operating Conditions Temperature Ranges ICL8069C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC θJA (oC/W) θJC (oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A SIP (TO-92) Package. . . . . . . . . . . . . . 200 N/A Power Dissipation Limited by MAX Forward/Reverse Current Maximum Junction Temperature (SOIC Package) . . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. TA = 25oC Unless Otherwise Specified Electrical Specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 1.20 1.23 1.25 V Reverse Breakdown Voltage IR = 500µA Reverse Breakdown Voltage Change 50µA ≤ lR ≤ 5mA - 15 20 mV Reverse Dynamic Impedance lR = 50µA - 1 2 Ω lR = 500µA - 1 2 Ω Forward Voltage Drop lF = 500µA - 0.7 1 V RMS Noise Voltage 10Hz ≤ F ≤ 10kHz, lR = 500µA - 5 - µV Long Term Stability lR = 4.75mA, TA = 25oC - 1 - ppm/kHR Breakdown Voltage Temperature Coefficient IR = 500µA, TA = Operating Temperature Range - - 0.005 %/ oC - - 0.01 %/ oC 0.050 - 5 mA ICL8069C ICL8069D Reverse Current Range 1.18V to 1.27V NOTES: 2. If circuit strays in excess of 200pF are anticipated, a 4.7µF shunt capacitor will ensure stability under all operating conditions. 3. In normal use, the reverse voltage cannot exceed the reference voltage. However when plugging units into a powered-up test fixture, an instantaneous voltage equal to the compliance of the test circuit will be seen. This should not exceed 20V. 3 ICL8069 Typical Performance Curves 100mA 12 REVERSE CURRENT (A) OUTPUT VOLTAGE CHANGE (mV) 14 10 8 -55oC 6 4 25oC, 125oC 2 1mA 100µ 10µ 125oC 0 -2 10µ -55oC 25oC 1µ 100µ 1mA 0.2 10mA 0.4 0.6 FIGURE 1. VOLTAGE CHANGE AS A FUNCTION OF REVERSE CURRENT IR = 500µA 1.240 OUTPUT VOLTAGE (V) 1.0 1.2 FIGURE 2. REVERSE VOLTAGE AS A FUNCTION OF CURRENT 1.245 1.235 1.230 1.225 1.220 1.215 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC) FIGURE 3. REVERSE VOLTAGE AS A FUNCTION OF TEMPERATURE 4 0.8 REVERSE VOLTAGE (V) REVERSE CURRENT (A) 1.4 ICL8069 Single-In-Line Plastic Packages (SIP) Z3.05 (JEDEC STYLE TO-92 MODIFIED) 3 LEAD PLASTIC SINGLE-IN-LINE PACKAGE L e1 e W INCHES D E-PIN Ø 0.0625 R A b E S1 α (2X) NOTES: MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.195 4.32 4.95 1 b 0.014 0.020 0.36 0.51 2 E 0.130 0.155 3.30 3.94 1 e 0.045 0.055 1.14 1.40 - e1 0.095 0.105 2.41 2.67 - L 0.500 0.610 12.70 15.49 - R 0.085 0.095 2.16 2.41 - S1 0.045 0.060 1.14 1.52 - W 0.016 0.022 0.41 0.56 2 D 0.175 0.195 4.45 4.95 1 α 4o 6o 4o 6o Rev. 0 2/94 1. Package body dimensions do not include any mold flash or protrusions. 2. Package outline dimensions do not include burrs. 3. Controlling dimension: INCH. 5 ICL8069 Small Outline Plastic Packages (SOIC) M8.15 (JEDEC MS-012-AA ISSUE C) N INDEX AREA 0.25(0.010) M H 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE B M E INCHES -B- 1 2 SYMBOL 3 L SEATING PLANE -A- h x 45o A D -C- µα e A1 B 0.25(0.010) M C C A M B S 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. MILLIMETERS MIN MAX NOTES A 0.0532 0.0688 1.35 1.75 - 0.0040 0.0098 0.10 0.25 - B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 - D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 0.050 BSC 1.27 BSC - H 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 8o 0o N NOTES: MAX A1 e 0.10(0.004) MIN α 8 0o 8 7 8o Rev. 0 12/93 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 6