PD- 95063A
IRFR220NPbF
IRFU220NPbF
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
l Lead-Free
Benefits
Low Gate to Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
VDSS RDS(on) max (mΩ)
ID
200V
5.0A
600
l
D-Pak
IRFR22ON
I-Pak
IRFU220N
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
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Max.
5.0
3.5
20
43
0.71
± 20
7.5
-55 to + 175
Units
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
1
12/10/04
IRFR/U220NPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
200 ––– –––
V
VGS = 0V, I D = 250µA
––– 0.23 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 600
mΩ VGS = 10V, I D = 2.9A
2.0
––– 4.0
V
VDS = VGS , ID = 250µA
––– ––– 25
VDS = 200V, VGS = 0V
µA
––– ––– 250
VDS = 160V, VGS = 0V, TJ = 150°C
––– ––– 100
VGS = 20V
nA
––– ––– -100
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
2.6
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
15
2.4
6.1
6.4
11
20
12
300
53
15
300
23
46
Max. Units
Conditions
–––
S
VDS = 50V, ID = 2.9A
23
ID = 2.9A
3.6
nC
VDS = 160V
9.2
VGS = 10V,
–––
VDD = 100V
–––
ID = 2.9A
ns
–––
RG = 24Ω
–––
VGS = 10V
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, V DS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 160V
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
46
2.9
4.3
mJ
A
mJ
Typ.
Max.
Units
–––
–––
–––
3.5
50
110
°C/W
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 5.0
showing the
A
G
integral reverse
20
––– –––
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 2.9A, VGS = 0V
––– 90 140
ns
TJ = 25°C, I F = 2.9A
––– 320 480
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFR/U220NPbF
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
4.5V
0.1
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
10
1
4.5V
0.1
0.1
100
Fig 1. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.5
TJ = 25 ° C
10
TJ = 175 ° C
1
V DS = 50V
20µs PULSE WIDTH
6.0
7.0
8.0
9.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
100
5.0
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
0.1
4.0
20µs PULSE WIDTH
TJ = 175 ° C
10.0
ID = 4.8A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U220NPbF
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
1000
Ciss
100
Coss
Crss
10
VGS , Gate-to-Source Voltage (V)
20
10000
ID = 2.9A
VDS = 160V
VDS = 100V
VDS = 40V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
0
1
10
100
1000
5
10
15
20
25
Q G, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
100
10
TJ = 175 ° C
1
TJ = 25 ° C
0.1
0.4
V GS = 0 V
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.2
10us
10
100us
1
1ms
TC = 25 ° C
TJ = 175 ° C
Single Pulse
0.1
1
10ms
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U220NPbF
5.0
VGS
4.0
ID , Drain Current (A)
RD
V DS
RG
D.U.T.
+
-VDD
VGS
3.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
2.0
Fig 10a. Switching Time Test Circuit
1.0
VDS
90%
0.0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
PDM
0.1
0.02
t1
0.01
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.000001
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
IRFR/U220NPbF
80
TOP
BOTTOM
ID
1.2A
2.1A
2.9A
60
40
20
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFR/U220NPbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
+
-
-
RG
•
•
•
•
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U220NPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120
WIT H ASSEMBLY
LOT CODE 1234
ASS EMBLED ON WW 16, 1999
IN THE ASS EMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
Note: "P" in ass embly line position
indicates "Lead-F ree"
IRFU120
12
916A
34
ASS EMBLY
LOT CODE
DATE CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INT ERNATIONAL
RECT IFIER
LOGO
IRFU120
12
ASSEMBLY
LOT CODE
8
34
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 16
A = ASSEMBLY SIT E CODE
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IRFR/U220NPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
E XAMPLE: T HIS IS AN IRFU120
WIT H AS SEMBLY
LOT CODE 5678
ASS EMBLE D ON WW 19, 1999
IN T HE AS SE MBLY LINE "A"
INT ERNAT IONAL
RE CT IFIER
LOGO
PART NUMBE R
IRF U120
919A
56
78
ASSE MBLY
LOT CODE
Note: "P" in as s embly line
pos ition indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMB ER
IRF U120
56
AS SEMBLY
LOT CODE
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78
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS SEMBLY SIT E CODE
9
IRFR/U220NPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 11mH
RG = 25Ω, IAS = 2.9A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 2.9A, di/dt ≤ 320A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
10
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