FUJITSU SEMICONDUCTOR DATA SHEET DS04-28318-2E ASSP CMOS 85 MSPS 3ch 10-bit D/A Converter MB40C950V ■ DESCRIPTION The MB40C950V is a high-speed CMOS process-based D/A converter provided with the three-channel I/O for RGB, allowing for independent control of the three channels. ■ FEATURES • • • • • • • Resolution Linearity error Differential linearity error Maximum conversion rate Supply voltage Digital input voltage range Analog output voltage range • Dissipation power • Additional capabilities • Package : : : : : : : : : : : : 10 bits ±1.5 LSB (max) ±1.0 LSB (max) 85 MSPS (min) single +5 V TTL level 2 Vp-p (0 to 2V: analog output for RL = 200 Ω, RREF = 3.3 kΩ, VRIN = 2V) 1 Vp-p (0 to 1V: analog output for RL = 75 Ω, RREF = 2.4 kΩ, VRIN = 2V) 240 mW (standard: analog output for RL = 200 Ω, 2 Vp-p output) 310 mW (standard: analog output for RL = 75 Ω, 1 Vp-p output) Power saving function, independent 3-ch VREF LQFP64, QFP64 ■ PACKAGES 64-pin Plastic LQFP 64-pin Plastic QFP (FPT-64P-M03) (FPT-64P-M10) MB40C950V ■ PIN ASSIGNMENT 2 RIREF RVRIN DVDD CE AVDD ROUT AVSS GOUT AVSS BOUT AVDD GIREF GVB GVRIN N.C. BIREF 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 LQFP64 RVB 1 48 BVRIN N.C. 2 47 BVB N.C. 3 46 N.C. (LSB) R0 4 45 N.C. R1 5 44 BCLK R2 6 43 GCLK R3 7 42 RCLK R4 8 41 VA R5 9 40 DVSS R6 10 39 N.C. R7 11 38 B9 (MSB) R8 12 37 B8 (MSB) R9 13 36 B7 N.C. 14 35 B6 (LSB) G0 15 34 B5 G1 16 33 B4 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 G2 G3 G4 G5 G6 G7 G8 (MSB) G9 N.C. N.C. N.C. N.C. (LSB) B0 B1 B2 B3 (TOP VIEW) MB40C950V RVRIN DVDD CE AVDD ROUT AVSS GOUT AVSS BOUT AVDD GIREF GVB GVRIN 64 63 62 61 60 59 58 57 56 55 54 53 52 QFP64 RIREF 1 51 BIREF RVB 2 50 BVRIN N.C. 3 49 BVB N.C. 4 48 N.C. (LSB) R0 5 47 BCLK R1 6 46 GCLK R2 7 45 RCLK R3 8 44 VA R4 9 43 DVSS 42 N.C. (TOP VIEW) N.C. 17 35 B6 (LSB) G0 18 34 B5 G1 19 33 B4 32 B7 B3 36 31 16 B2 N.C. 30 B8 B1 37 29 15 (LSB) B0 N.C. 28 B9 (MSB) N.C. 38 27 14 (MSB) G9 (MSB) R9 26 N.C. G8 39 25 13 G7 R8 24 N.C. G6 40 23 12 G5 R7 22 N.C. G4 41 21 11 G3 R6 20 10 G2 R5 3 MB40C950V ■ PIN DESCRIPTION Pin No. LQFP64 4 QFP64 Symbol I/O Description 4 to 13 15 to 24 29 to 38 5 to 14 18 to 27 29 to 38 R0 to R9 G0 to G9 B0 to B9 I Data signal incoming terminal for Rch, Gch and Bch LSB: R0, G0, B0 MSB: R9, G9,B9 42 43 44 45 46 47 RCLK GCLK BCLK I Clock signal incoming terminal for Rch, Gch and Bch 61 62 CE I Power saving signal incoming terminal. Power saving enabled for High 62 63 DVDD — Digital power supply terminal 54, 60 55, 61 AVDD — Analog power supply terminal 40 43 DVSS — Digital ground terminal 56, 58 57, 59 AVSS — Analog ground terminal 63 51 48 64 52 50 RVRIN GVRIN BVRIN I 64 53 49 1 54 51 RIREF GIREF BIREF — Reference resistor connection terminal for Rch, Gch and Bch 41 44 VA — Connect >0.1 µF capacitor to the AVSS terminal 1 52 47 2 53 49 RVB GVB BVB — Connect >0.1 µF capacitor to the AVDD terminal 59 57 55 60 58 56 ROUT GOUT BOUT O Analog signal output terminals for Rch, Gch and Bch 2 to 3 14 25 to 28 39, 45 46, 50 3 to 4 15 to 17 28 39 to 42 48 N.C. — Not connected. To be left open. Rererence voltage incoming terminal for Rch, Gch and Bch MB40C950V ■ BLOCK DIAGRAM RCLK R0 to R9 Decorder and latch circuit ROUT Current cell RVB GCLK G0 to G9 Reference current generator circuit Decorder and latch circuit Current cell RVRIN RIREF GOUT GVB BCLK Reference current generator circuit B0 to B9 Decorder and latch circuit CE REF circuit Current cell GVRIN GIREF BOUT BVB Reference current generator circuit BVRIN BIREF AVDD DVDD AVSS DVSS VA 5 MB40C950V ■ ABSOLUTE MAXIMUM RATINGS Parameter Rating Symbol Power supply voltage Digital input voltage Analog output voltage Analog output current: LQFP64 : QFP64 Storage temperature Min. –0.3 –0.3 –0.3 0 0 –55 VDD VID VO IO Tstg Unit Max. +7.0 VDD + 0.3 VDD + 0.3 15 30 +125 V V V mA mA °C WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS — — Min. 4.75 4.75 Value Typ. 5.00 5.00 Max. 5.25 5.25 AVDD – DVDD — –0.2 — 0.2 V VRIN — LQFP64 QFP64 1.0 0 0 2.0 — — 2.2 15 30 V mA mA — 2.0 2.3 V Parameter Symbol Condition Analog power supply voltage Digital power supply voltage Power supply voltage difference Reference input voltage AVDD DVDD Full-scale current*1 IFS Full-scale output voltage*2 VFS Digital “H” level input voltage Digital “L” level input voltage Clock frequency Setup time Hold time “H” level minimum pulse width “L” level minimum pulse width Operating ambient temperature VIHD VILD fCLK ts th 15 mA < IFS — — — — — tWH IFS 15 mA Unit V V — 1.0 1.2 V 2.4 0 — 4 3 — — — — — DVDD 0.5 85 — — V V MHz ns ns — 5 — — ns tWL — 5 — — ns Top — –20 — +75 °C 30 mA *1: IFS = VRIN/RREF × 16 *2: VFS = IFS × RL WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 6 MB40C950V ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics • RL = 200 Ω (AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 3.3 kΩ, RL = 200 Ω, Ta = –20°C to +75°C) Value Parameter Symbol Condition Unit Min. Typ. Max. Resolution — Linearity error LE Differential linearity error DLE — DC Accuracy — 10 — bit — — ±1.5 LSB — — ±1 LSB IID — –5 — 5 µA Full-scale output voltage VOFS — 1.85 1.94 2.03 V Zero-scale output voltage VOZS — 0 — 10 mV Analog power supply current AIDD — — 30 35 mA Digital power supply current DIDD — — 17 24 mA Digital input current • RL = 75 Ω (AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 2.4 kΩ, RL = 75 Ω, Ta = –20°C to +75°C) Parameter Symbol Condition Resolution — — Linearity error LE Differential linearity error DLE DC Accuracy Value Unit Min. Typ. Max. — 10 — bit — — ±1.5 LSB — — ±1 LSB IID — –5 — 5 µA Full-scale output voltage VOFS — 0.94 1.0 1.06 V Zero-scale output voltage VOZS — 0 — 10 mV Analog power supply current AIDD — — 45 50 mA Digital power supply current DIDD — — 17 24 mA Digital input current 7 MB40C950V 2. AC Characteristics • RL = 200 Ω (AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 3.3 kΩ, RL = 200 Ω, CL = 15 pF, Ta = –20°C to +75°C) Parameter Symbol Condition Value Min. Typ. Max. Unit Maximum conversion rate fs 85 — — MSPS Output propagation delay time tpd — 10 — ns Output rising time tr — 8 — ns Output falling time tf — 8 — ns tset — 27 — ns Settling time — • RL = 75 Ω (AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 2.4 kΩ, RL = 75 Ω, CL = 15 pF, Ta = –20°C to +75°C) Parameter Condition Value Min. Typ. Max. Unit Maximum conversion rate fs 85 — — MSPS Output propagation delay time tpd — 7 — ns Output rising time tr — 2 — ns Output falling time tf — 2 — ns tset — 7 — ns Settling time 8 Symbol — MB40C950V ■ EQUIVALENT CIRCUIT • Digital input DVDD AVDD R0 to R9 G0 to G9 B0 to B9 RCLK GCLK BCLK CE DVSS AVSS • Reference voltage input AVDD RVRIN GVRIN BVRIN − + AVDD AVSS RIREF GIREF BIREF RVB GVB BVB AVSS • VA pin DVDD Current cell DVDD VA REF circuit DVSS 9 MB40C950V • Analog output AVDD AVDD ROUT GOUT BOUT AVSS 10 MB40C950V ■ TIMING DIAGRAM ts th Data Input 1.5 V twH twL Clock Input 1.5 V ±1/2LSB 90% 90% 50% 50% Analog Output 10% 10% ±1/2LSB VOZS tf tr tset tset tpd tpd 11 MB40C950V ■ TYPICAL APPLICATION • RL = 200 Ω +5 V DVDD +5 V AVDD 0.1 µF 0.1 µF 0.1 µF RVB RCLK R0 to R9 RCLK 10 +2 V RVRIN 0 to 2 V(2 VP−P) Rout R0 to R9 RIREF RL RREF 200 Ω 3.3 kΩ 0.1 µF GVB GCLK G0 to G9 GCLK 10 +2 V GVRIN 0 to 2 V(2 VP−P) Gout G0 to G9 GIREF RL RREF 200 Ω 3.3 kΩ 0.1 µF BVB BCLK B0 to B9 BCLK 10 B0 to B9 +2 V BVRIN 0 to 2 V(2 VP−P) Bout BIREF RL RREF CE 200 Ω 3.3 kΩ VA 0.1 µF DVSS AVSS (Continued) 12 MB40C950V (Continued) • RL = 75 Ω +5 V DVDD +5 V AVDD 0.1 µF 0.1 µF 0.1 µF RVB RCLK R0 to R9 RCLK 10 +2 V RVRIN 0 to 1 V(1 VP−P) Rout R0 to R9 RIREF RL RREF 75 Ω 2.4 kΩ 0.1 µF GVB GCLK G0 to G9 GCLK 10 +2 V GVRIN 0 to 1 V(1 VP−P) Gout G0 to G9 GIREF RL RREF 75 Ω 2.4 kΩ 0.1 µF BVB BCLK B0 to B9 BCLK 10 B0 to B9 +2 V BVRIN 0 to 1 V(1 VP−P) Bout BIREF RL RREF CE 75 Ω 2.4 kΩ VA 0.1 µF DVSS AVSS 13 MB40C950V ■ ORDERING INFORMATION Part number 14 Package MB40C950VPFV 64-pin Plastic LQFP (FPT-64P-M03) MB40C950VPFQ 64-pin Plastic QFP (FPT-64P-M10) Remarks MB40C950V ■ PACKAGE DIMENSIONS 64-pin Plastic LQFP (FPT-64P-M03) +0.20 1.50 −0.10 +.008 .059 −.004 12.00±0.20(.472±.008)SQ 10.00±0.10(.394±.004)SQ 48 (Mounting height) 33 49 32 7.50 (.295) REF 11.00 (.433) NOM INDEX 64 LEAD No. Details of "A" part 17 16 1 0.50±0.08 (.0197±.0031) 0.18 .007 "A" +0.08 −0.03 +.003 −.001 +0.05 0.127 −0.02 +.002 .005 −.001 0.10±0.10 (STAND OFF) (.004±.004) 0.50±0.20 (.020±.008) 0.10(.004) C 1995 FUJITSU LIMITED F64009S-2C-5 0 10˚ Dimensions in mm (inches). (Continued) 15 MB40C950V (Continued) 64-pin Plastic QFP (FPT-64P-M10) 23.90±0.40(.941±.016) 20.00±0.20(.787±.008) 51 3.35(.132)MAX (Mounting height) 0.05(.002)MIN (STAND OFF) 33 52 32 14.00±0.20 (.551±.008) 12.00 16.30±0.40 (.472) (.642±.016) REF 17.90±0.40 (.705±.016) 1 PIN INDEX 64 LEAD No. 20 "A" 1 1.00(.0394) TYP 0.40±0.10 (.016±.004) 0.15±0.05(.006±.002) 19 0.20(.008) M Details of "A" part 0.25(.010) Details of "B" part "B" 0.10(.004) C 16 0.30(.012) 18.00(.709)REF 0.18(.007)MAX 22.30±0.40(.878±.016) 0.63(.025)MAX 1994 FUJITSU LIMITED F64019S-1C-2 0 10° 0.80±0.20 (.031±.008) Dimensions in mm (inches) MB40C950V FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 http://www.fujitsu-ede.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. http://www.fmap.com.sg/ F9809 FUJITSU LIMITED Printed in Japan 17