ON NLAST4599 Low voltage single supply spdt analog switch Datasheet

NLAST4599
Low Voltage Single Supply
SPDT Analog Switch
The NLAST4599 is an advanced high speed CMOS single pole −
double throw analog switch fabricated with silicon gate CMOS
technology. It achieves high speed propagation delays and low ON
resistances while maintaining low power dissipation. This switch
controls analog and digital voltages that may vary across the full
power−supply range (from VCC to GND).
The device has been designed so the ON resistance (RON) is much
lower and more linear over input voltage than RON of typical CMOS
analog switches.
The channel select input structure provides protection when
voltages between 0 V and 5.5 V are applied, regardless of the supply
voltage. This input structure helps prevent device destruction caused
by supply voltage − input/output voltage mismatch, battery backup,
hot insertion, etc.
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MARKING
DIAGRAMS
TSOP−6
DT SUFFIX
CASE 318G
A1AYWG
G
1
Features
•
•
•
•
•
•
•
•
•
•
•
Select Pin Compatible with TTL Levels
Channel Select Input Over−Voltage Tolerant to 5.5 V
Fast Switching and Propagation Speeds
Break−Before−Make Circuitry
Low Power Dissipation: ICC = 2 A (Max) at TA = 25°C
Diode Protection Provided on Channel Select Input
Improved Linearity and Lower ON Resistance over Input Voltage
Latch−up Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; MM > 200 V
Chip Complexity: 38 FETs
Pb−Free Packages are Available
SELECT 1
6
COM
GND 3
4
NC
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position and underbar
may vary depending upon manufacturing location.
Select
ON Channel
L
H
NC
NO
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
U
U
2X1
A1
A
Y
W
M
G
ORDERING INFORMATION
Figure 1. Pin Assignment
U
COM
1
FUNCTION TABLE
5
2X0
A1 M G
G
NO
V+ 2
CHANNEL SELECT
SC−88/SC−70/SOT−363
DF SUFFIX
CASE 419B
NO
NC
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 8
1
Publication Order Number:
NLAST4599/D
NLAST4599
MAXIMUM RATINGS (Note 1)
Symbol
Value
Unit
Positive DC Supply Voltage
Parameter
VCC
−0.5 to +7.0
V
Analog Input Voltage (VNO or VCOM)
VIS
−0.5 ≤ VIS ≤ VCC )0.5
V
Digital Select Input Voltage
VIN
−0.5 ≤ VI ≤ + 7.0
V
DC Current, Into or Out of Any Pin
IIK
$50
mA
PD
200
200
mW
TSTG
−65 to +150
°C
Lead Temperature, 1mm from Case for 10 seconds
TL
260
°C
Junction Temperature Under Bias
TJ
150
°C
VESD
2000
200
N/A
V
ILATCHUP
$300
mA
JA
333
333
°C/W
Power Dissipation in Still Air
SC−88
TSOP6
Storage Temperature Range
ESD Withstand Voltage
Latchup Performance
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Above VCC and Below GND at 125°C (Note 5)
Thermal Resistance
SC−88
TSOP6
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
2. Tested to EIA/JESD22−A114−A
3. Tested to EIA/JESD22−A115−A
4. Tested to JESD22−C101−A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Max
Unit
DC Supply Voltage
VCC
2.0
5.5
V
Digital Select Input Voltage
VIN
GND
5.5
V
Analog Input Voltage (NC, NO, COM)
VIS
GND
VCC
V
Operating Temperature Range
TA
−55
+125
°C
0
0
100
20
tr, tf
ns/V
VCC = 3.3 V + 0.3 V
VCC = 5.0 V + 0.5 V
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80°C
1,032,200
TJ = 100°C
80
TJ = 110°C
Time, Years
TJ = 120°C
Time, Hours
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 130°C
Junction
Temperature 5C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS TIME
TO 0.1% BOND FAILURES
TJ = 90°C
Input Rise or Fall Time
SELECT
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
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2
NLAST4599
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Guaranteed Limit
Symbol
VCC
−55 to 255C
<855C
<1255C
Unit
Minimum High−Level Input
Voltage, Select Input
VIH
3.0
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
V
Maximum Low−Level Input
Voltage, Select Input
VIL
3.0
4.5
5.5
0.5
0.8
0.8
0.5
0.8
0.8
0.5
0.8
0.8
V
Parameter
Condition
Maximum Input Leakage
Current, Select Input
VIN = 5.5 V or GND
IIN
5.5
+0.1
+1.0
+1.0
A
Power Off Leakage Current
VIN = 5.5 V or GND
IOFF
0
+10
+10
+10
A
Maximum Quiescent Supply
Current
Select and VIS = VCC or GND
ICC
5.5
1.0
1.0
2.0
A
Symbol
VCC
−55 to 255C
<855C
<1255C
Unit
DC ELECTRICAL CHARACTERISTICS − Analog Section
Guaranteed Limit
Parameter
Condition
Maximum “ON” Resistance
(Figures 17 − 23)
VIN = VIL or VIH
VIS = GND to VCC
IINI < 10.0 mA
RON
2.5
3.0
4.5
5.5
85
45
30
25
95
50
35
30
105
55
40
35
ON Resistance Flatness
(Figures 17 − 23)
VIN = VIL or VIH
IINI < 10.0 mA
VIS = 1V, 2V, 3.5V
RFLAT
4.5
4
4
5
ON Resistance Match
Between Channels
VIN = VIL or VIH
IINI < 10.0 mA
VNO or VNC = 3.5 V
RON
4.5
2
2
3
NO or NC Off Leakage
Current (Figure 9)
VIN = VIL or VIH
VNO or VNC = 1.0 VCOM 4.5 V
INC(OFF)
INO(OFF)
5.5
1
10
100
nA
COM ON Leakage
Current (Figure 9)
VIN = VIL or VIH
VNO 1.0 V or 4.5 V with VNC floating
or
VNO 1.0 V or 4.5 V with VNO floating
VCOM = 1.0 V or 4.5 V
ICOM(ON)
5.5
1
10
100
nA
(ON)
(ON)
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3
NLAST4599
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Max Limit
VCC
VIS
−55 to 25_C
<85_C
<125_C
Test Conditions
Symbol
(V)
(V)
Min
Typ*
Max
Min
Max
Min
Max
Unit
Turn−On Time
(Figures 12 and 13)
RL = 300 CL = 35 pF
(Figures 5 and 6)
tON
2.5
3.0
4.5
5.5
2.0
2.0
3.0
3.0
5
5
2
2
23
16
11
9
28
21
16
14
5
5
2
2
30
25
20
20
5
5
2
2
30
25
20
20
ns
Turn−Off Time
(Figures 12 and 13)
RL = 300 CL = 35 pF
(Figures 5 and 6)
tOFF
2.5
3.0
4.5
5.5
2.0
2.0
3.0
3.0
1
1
1
1
7
5
4
3
12
10
9
8
1
1
1
1
15
15
12
12
1
1
1
1
15
15
12
12
ns
Minimum Break−Before−
Make Time
VIS = 3.0 V (Figure 4)
RL = 300 CL = 35 pF
tBBM
2.5
3.0
4.5
5.5
2.0
2.0
3.0
3.0
1
1
1
1
12
11
6
5
Parameter
1
1
1
1
1
1
1
1
ns
Typical @ 25, VCC = 5.0 V
Maximum Input Capacitance, Select Input
Analog I/O (switch off)
Common I/O (switch off)
Feedthrough (switch on)
CIN
CNO or CNC
CCOM
C(ON)
8
10
10
20
*Typical Characteristics are at 25_C.
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
pF
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Condition
Parameter
VCC
V
Typical
25°C
BW
3.0
4.5
5.5
170
200
200
MHz
VONL
3.0
4.5
5.5
−2
−2
−2
dB
VISO
3.0
4.5
5.5
−93
−93
−93
dB
3.0
5.5
1.5
3.0
Symbol
Maximum On−Channel −3dB Bandwidth or
Minimum Frequency Response
(Figure 10)
VIN = 0 dBm
VIN centered between VCC and GND
(Figure 7)
Maximum Feedthrough On Loss
VIN = 0 dBm @ 100 kHz to 50 MHz
VIN centered between VCC and GND
(Figure 7)
Off−Channel Isolation
(Figure 10)
f = 100 kHz; VIS = 1 V RMS
VIN centered between VCC and GND
(Figure 7)
Charge Injection Select Input to
Common I/O
(Figure 15)
VIN = VCC to GND, FIS = 20 kHz
tr = tf = 3 ns
RIS = 0 , CL = 1000 pF
Q = CL * VOUT, (Figure 8)
Total Harmonic Distortion
THD + Noise
(Figure 14)
FIS = 20 Hz to 100 kHz, RL = Rgen = 600 ,
CL = 50 pF
VIS = 5.0 VPP sine wave
Q
ORDERING INFORMATION
Unit
pC
THD
%
5.5
0.1
Device Nomenclature
Device
Circuit
Indicator
Technology
Device
Function
Package
Suffix
Tape &
Reel
Suffix
DF
T2
NLAST4599DFT2
NLAST4599DTT1G
Shipping†
SC−88/SC−70/SOT−363
NLAST4599DFT2G
NLAST4599DTT1
Package
NL
AS
4599
SC−88/SC−70/SOT−363
(Pb−Free)
TSOP−6
DT
T1
3000/Tape & Reel
TSOP−6
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLAST4599
VCC
DUT
VCC
Input
Output
GND
VOUT
0.1 F
300
tBMM
35 pF
90%
90% of VOH
Output
Switch Select Pin
GND
Figure 4. tBBM (Time Break−Before−Make)
VCC
DUT
VCC
0.1 F
Input
Output
50%
VOUT
Open
50%
0V
300
VOH
35 pF
90%
90%
Output
VOL
Input
tON
tOFF
Figure 5. tON/tOFF
VCC
VCC
Input
DUT
Output
300 50%
VOUT
Open
50%
0V
VOH
35 pF
Output
Input
tOFF
Figure 6. tON/tOFF
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5
10%
10%
VOL
tON
NLAST4599
50 DUT
Reference
Transmitted
Input
Output
50 Generator
50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒVVOUT
Ǔ for VIN at 100 kHz
IN
VOUT
Ǔ for VIN at 100 kHz to 50 MHz
VONL = On Channel Loss = 20 Log ǒ
VIN
VISO = Off Channel Isolation = 20 Log
Bandwidth (BW) = the frequency 3 dB below VONL
Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
VCC
VIN
Output
Open
GND
CL
Output
Off
On
VIN
Figure 8. Charge Injection: (Q)
100
LEAKAGE (nA)
10
1
ICOM(ON)
0.1
ICOM(OFF)
0.01
VCC = 5.0 V
INO(OFF)
0.001
−55
−20
25
70
85
TEMPERATURE (°C)
Figure 9. Switch Leakage vs. Temperature
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6
125
Off
VOUT
NLAST4599
0
Bandwidth
(ON−RESPONSE)
0
−40
PHASE (Degree)
−20
(dB)
Off Isolation
−60
10
20
30
VCC = 5.0 V
TA = 25_C
−80
−100
0.01
0.1
VCC = 5.0 V
TA = 25_C
100 200
1
10
FREQUENCY (MHz)
0.01
Figure 10. Bandwidth and Off−Channel
Isolation
0.1
100 200
1
10
FREQUENCY (MHz)
Figure 11. Phase vs. Frequency
30
30
25
25
20
20
TIME (ns)
TIME (ns)
VCC = 4.5 V
15
tON (ns)
10
tOFF (ns)
5
0
2.5
3
3.5
4
4.5
10
tON
5
tOFF
0
−55
5
−40
85
25
125
VCC (VOLTS)
Temperature (°C)
Figure 12. tON and tOFF vs. VCC at 255C
Figure 13. tON and tOFF vs. Temp
1
3.0
VINpp = 3.0 V
VCC = 3.6 V
2.5
2.0
Q (pC)
THD + NOISE (%)
15
0.1
VINpp = 5.0 V
VCC = 5.5 V
VCC = 5 V
1.5
1.0
0.5
VCC = 3 V
0
−0.5
0.01
1
10
0
100
1
2
3
4
FREQUENCY (kHz)
VCOM (V)
Figure 14. Total Harmonic Distortion
Plus Noise vs. Frequency
Figure 15. Charge Injection vs. COM Voltage
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7
5
NLAST4599
100
100
VCC = 2.0 V
10
80
RON ()
ICC (nA)
1
0.1
0.01
60
VCC = 2.5 V
40
VCC = 3.0 V
0.001
VCC = 3.0 V
VCC = 4.0 V
20
0.0001
VCC = 5.0 V
0.00001
−40
−20
0
20
60
VCC = 5.5 V
80
100
0
0.0
120
3.0
4.0
5.0
VIS (VDC)
Figure 16. ICC vs. Temp, VCC = 3 V & 5 V
Figure 17. RON vs. VCC, Temp = 255C
90
90
80
80
70
70
60
60
RON ()
100
RON ()
2.0
Temperature (°C)
100
50
40
125°C
30
40
25°C
−55°C
10
85°C
0.5
50
20
−55°C
10
6.0
30
25°C
20
0
0.0
1.0
1.0
1.5
2.0
0
0.0
2.5
85°C
125°C
0.5
1.0
1.5
VIS (VDC)
2.0
2.5
3.0
VIS (VDC)
Figure 18. RON vs Temp, VCC = 2.0 V
Figure 19. RON vs. Temp, VCC = 2.5 V
50
30
45
25
40
20
30
RON ()
RON ()
35
25
20
125°C
10
15
0
0.0
25°C
85°C
10
5
15
5
25°C
85°C
125°C
−55°C
−55°C
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VIS (VDC)
VIS (VDC)
Figure 21. RON vs. Temp, VCC = 4.5 V
Figure 20. RON vs. Temp, VCC = 3.0 V
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8
4.5
NLAST4599
25
25
125°C
20
20
RON ()
RON ()
125°C
15
25°C
10
−55°C
85°C
CAVITY
TAPE
25°C
10
85°C
5
0
0.0
15
−55°C
5
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
5.0
VIS (VDC)
VIS (VDC)
Figure 22. RON vs. Temp, VCC = 5.0 V
Figure 23. RON vs. Temp, VCC = 5.5 V
TOP TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
COMPONENTS
TAPE LEADER
NO COMPONENTS
400 mm MIN
DIRECTION OF FEED
Figure 24. Tape Ends for Finished Goods
TAPE DIMENSIONS mm
4.00
Ğ1.50 TYP
4.00
2.00
1.75
3.50 $0.50
8.00 $0.30
1
Ğ1.00 MIN
DIRECTION OF FEED
Figure 25. SC70−6/SC−88/SOT−363 DFT2 and SOT23−6/TSOP−6/SC59−6 DTT1 Reel Configuration/Orientation
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9
NLAST4599
t MAX
1.5 mm MIN
(0.06 in)
A
13.0 mm $0.2 mm
(0.512 in $0.008 in)
50 mm MIN
(1.969 in)
20.2 mm MIN
(0.795 in)
FULL RADIUS
G
Figure 26. Reel Dimensions
REEL DIMENSIONS
Tape Size
T and R Suffix
A Max
G
t Max
8 mm
T1, T2
178 mm
(7 in)
8.4 mm, + 1.5 mm, −0.0
(0.33 in + 0.059 in, −0.00)
14.4 mm
(0.56 in)
DIRECTION OF FEED
BARCODE LABEL
POCKET
Figure 27. Reel Winding Direction
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10
HOLE
NLAST4599
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
D
6
HE
1
5
4
2
3
E
b
e
q
c
A
0.05 (0.002)
L
A1
DIM
A
A1
b
c
D
E
e
L
HE
q
MIN
0.90
0.01
0.25
0.10
2.90
1.30
0.85
0.20
2.50
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
1.50
1.70
0.95
1.05
0.40
0.60
2.75
3.00
10°
−
SOLDERING FOOTPRINT*
2.4
0.094
1.9
0.075
0.95
0.037
0.95
0.037
0.7
0.028
1.0
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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11
MIN
0.035
0.001
0.010
0.004
0.114
0.051
0.034
0.008
0.099
0°
INCHES
NOM
0.039
0.002
0.014
0.007
0.118
0.059
0.037
0.016
0.108
−
MAX
0.043
0.004
0.020
0.010
0.122
0.067
0.041
0.024
0.118
10°
NLAST4599
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
D
e
6
5
4
1
2
3
HE
DIM
A
A1
A3
b
C
D
E
e
L
HE
−E−
b 6 PL
0.2 (0.008)
M
E
M
MILLIMETERS
MIN
NOM MAX
0.80
0.95
1.10
0.00
0.05
0.10
0.20 REF
0.10
0.21
0.30
0.10
0.14
0.25
1.80
2.00
2.20
1.15
1.25
1.35
0.65 BSC
0.10
0.20
0.30
2.00
2.10
2.20
INCHES
NOM MAX
0.037 0.043
0.002 0.004
0.008 REF
0.004 0.008 0.012
0.004 0.005 0.010
0.070 0.078 0.086
0.045 0.049 0.053
0.026 BSC
0.004 0.008 0.012
0.078 0.082 0.086
MIN
0.031
0.000
A3
C
A
A1
L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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