FQD10N20C / FQU10N20C N-Channel QFET® MOSFET 200 V, 7.8 A, 360 mΩ Description Features This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor®’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. • 7.8 A, 200 V, RDS(on) = 360 mΩ (Max.)@ VGS = 10 V, ID = 3.9 A • Low Gate Charge (Typ. 20 nC) • Low Crss (Typ. 40.5 pF) • 100% Avalanche Tested D ! D ● ◀ G S D-PAK (TO252) Absolute Maximum Ratings Symbol VDSS ID I-PAK (TO251) G D S Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR EAR TL ! TC = 25°C unless otherwise noted IDM TJ, TSTG ● ● S - Continuous (TC = 100°C) dv/dt PD ▲ G! - Pulsed (Note 1) FQD10N20C / FQU10N20C 200 Unit V 7.8 A 5.0 A 31.2 A ± 30 V (Note 2) 210 mJ Avalanche Current (Note 1) 7.8 A Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 5.0 5.5 50 0.4 -55 to +150 mJ V/ns W W/°C °C 300 °C FQD10N20C / FQU10N20C Unit °C/W (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case, Max. RθJA Thermal Resistance, Junction-to-Ambient* RθJA Thermal Resistance, Junction-to-Ambient, Max. 2.5 50 °C/W 110 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET July 2013 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Unit 200 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.28 IDSS IGSSF IGSSR VDS = 200 V, VGS = 0 V -- -- 10 µA VDS = 160 V, TC = 125°C -- -- 100 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 2.0 -- 4.0 V Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 3.9 A -- 0.29 0.36 Ω gFS Forward Transconductance VDS = 40 V, ID = 3.9 A -- 5.6 -- S VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 395 510 pF -- 97 125 pF -- 40.5 53 pF Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 100 V, ID = 9.5 A, RG = 25 Ω (Note 4) VDS = 160 V, ID = 9.5 A, VGS = 10 V (Note 4) -- 11 30 ns -- 92 190 ns -- 70 150 ns -- 72 160 ns -- 20 26 nC -- 3.1 -- nC -- 10.5 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 7.8 A ISM -- -- 31.2 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 7.8 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 9.5 A, dIF / dt = 100 A/µs -- 158 -- ns -- 0.97 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 5.2mH, IAS = 7.8A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 9.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Essentially independent of operating temperature ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Electrical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top : ID, Drain Current [A] 1 10 ID, Drain Current [A] 1 10 0 10 o 150 C o 25 C o -55 C 0 10 ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -1 10 ※ Notes : 1. VDS = 40V 2. 250μ s Pulse Test -1 -1 0 10 10 1 10 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 1.5 IDR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 1 10 1.0 VGS = 10V VGS = 20V 0.5 ※ Note : TJ = 25℃ 0.0 0 10 150℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test -1 0 5 10 15 20 25 30 10 0.2 0.4 ID, Drain Current [A] 1200 Ciss Coss 600 Crss 400 ※ Note ; 1. VGS = 0 V 2. f = 1 MHz 200 0 -1 10 1.0 1.2 1.4 1.6 12 VDS = 40V 10 VGS , Gate-Source Voltage [V] 800 0.8 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1000 0.6 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Capacitances [pF] 25℃ VDS = 100V VDS = 160V 8 6 4 2 ※ Note : ID = 9.5A 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 0 0 4 8 12 16 20 24 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 3.9 A 0.5 0.0 -100 200 -50 0 50 100 150 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 2 10 200 o o 10 Operation in This Area is Limited by R DS(on) 8 ID, Drain Current [A] ID, Drain Current [A] 100 µs 1 10 1 ms 10 ms DC 0 10 ※ Notes : o 1. TC = 25 C 4 2 o 2. TJ = 150 C 3. Single Pulse -1 10 6 0 1 10 0 25 2 10 10 50 150 ※ N o te s : 1 . Z θJC(t) = 2 .5 ℃ /W M a x . 2 . D u t y F a c to r , D = t 1 / t 2 3 . T JM - T C = P DM * Z θJC(t) 0 .2 0 .0 5 10 125 Figure 10. Maximum Drain Current vs Case Temperature 0 .1 10 100 D = 0 .5 0 -1 0 .0 2 0 .0 1 PDM s in g le p u ls e θJ C Z (t), T h e rm a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] t1 t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Typical Characteristics FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Gate Charge Test Circuit & Waveform 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL VDS 90% VDD VGS VGS DUT 10V 10% td(on) tr td(off) t on t off tf Unclamped Inductive Switching Test Circuit & Waveforms VDS BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L BVDSS IAS ID RG VDD DUT 10V tp ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 ID (t) VDS (t) VDD tp Time www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Mechanical Dimensions D-PAK TO-252 (DPAK) MOLDED, 3 LEAD, OPTION AA Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT25 2-003 ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 Dimensions in Millimeters www.fairchildsemi.com FQD10N20C / FQU10N20C N-Channel QFET® MOSFET Mechanical Dimensions I-PAK TO-251 (IPAK) MOLDED, 3LEAD, OPTION AA Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT25 1-003 Dimensions in Millimeters ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. C1 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I64 ©2009 Fairchild Semiconductor Corporation FQD10N20C / FQU10N20C Rev. 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