TI1 LP5900SDX-3.3 Lp5900 ultra low noise, 150 ma linear regulator for rf/analog circuits requires no bypass capacitor Datasheet

LP5900
www.ti.com
SNVS358O – JULY 2005 – REVISED MAY 2013
LP5900 Ultra Low Noise, 150 mA Linear Regulator for RF/Analog Circuits Requires No
Bypass Capacitor
Check for Samples: LP5900
FEATURES
PACKAGE
1
•
2
•
•
•
•
Stable with 0.47 μF Ceramic Input and Output
Capacitors
No Noise Bypass Capacitor Required
Logic Controlled Enable
Thermal-Overload and Short-Circuit Protection
−40°C to +125°C Junction Temperature Range
for Operation
•
•
•
KEY SPECIFICATIONS
•
•
•
•
•
•
•
•
•
•
4-Bump DSBGA (YZR), 1.057 mm x 1.083 mm x
0.600 mm
(lead free)
Extreme Thin 4-Bump DSBGA (YPF), 1.067 mm
x 1.092 mm x 0.250 mm
(lead free)
6-Pin WSON, 2.2 mm x 2.5 mm x 0.8 mm
(SC70 footprint, halogen free)
APPLICATIONS
Input Voltage Range, 2.5V to 5.5V
Output Voltage Range, 1.5V to 4.5V
Output Current, 150 mA
Low Output Voltage Noise, 6.5 μVRMS
PSRR, 75 dB at 1 kHz
Output Voltage Tolerance, ± 2%
Virturally Zero IQ (Disabled), <1 µA
Very Low IQ (Enabled), 25 μA
Startup Time, 150 μs
Low Dropout, 80 mV Typ.
•
•
•
Cellular Phones
PDA Handsets
Wireless LAN Devices
DESCRIPTION
The LP5900 is a linear regulator capable of supplying
150 mA output current. Designed to meet the
requirements of RF/Analog circuits, the LP5900
device provides low noise, high PSRR, low quiescent
current, and low line transient response figures. Using
new innovative design techniques the LP5900 offers
class-leading device noise performance without a
noise bypass capacitor.
Typical Application Circuit
VOUT
VIN
INPUT
0.47 PF
OUTPUT
0.47 PF
LP5900
ENABLE
VEN
GND
GND
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2013, Texas Instruments Incorporated
LP5900
SNVS358O – JULY 2005 – REVISED MAY 2013
www.ti.com
DESCRIPTION (CONTINUED)
The device is designed to work with 0.47 μF input and output ceramic capacitors. (No Bypass Capacitor is
required)
The device is available in DSBGA (YZR) package and WSON package. Also available in Extreme Thin SDBGA
(YPF) package. For all other package options, contact your local Texas Instruments sales office.
This device is available with 1.5V,1.575V, 1.8V, 1.9V, 2.0V, 2.1V, 2.2V, 2.3V, 2.5V, 2.6V, 2.65V, 2.7V, 2.75V
2.8V, 2.85V 3.0V, 3.3V and 4.5V outputs. Please contact your local sales office for any other voltage options.
Connection Diagrams
VIN
VOUT
VOUT
VIN
A2
B2
B2
A2
A1
VEN
B1
B1
A1
GND
GND
VEN
BOTTOM VIEW
TOP VIEW
Figure 1. 4-Bump Thin DSBGA (YZR) Package and Extreme Thin DSBGA (YPF) Package, Large Bump
(See Package Number YZR0004/YPF0004)
VOUT 1
Device
Code
N/C 2
GND 3
6 VIN
VIN 6
1 VOUT
5 N/C
N/C 5
2 N/C
4 VEN
V EN 4
3 GND
PAD
GND
PAD
GND
Top View
Bottom View
Figure 2. WSON-6 Package
(See Package Number NGF0006A)
PIN DESCRIPTIONS
Pin No.
2
Symbol
Name and Function
4
VEN
Enable input; disables the regulator when ≤ 0.4V. Enables the regulator when ≥
1.2V. An internal 1 MΩ pulldown resistor connects this input to ground.
B1
3
GND
Common ground
B2
1
VOUT
Output voltage. A 0.47 μF Low ESR capacitor should be connected to this Pin.
Connect this output to the load circuit.
A2
6
VIN
DSBGA
WSON
A1
Input voltage supply. A 0.47 µF capacitor should be connected at this input.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
LP5900
www.ti.com
SNVS358O – JULY 2005 – REVISED MAY 2013
PIN DESCRIPTIONS (continued)
Pin No.
DSBGA
WSON
Pad
Symbol
GND
Name and Function
Common Ground. Connect to Pin 3.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2) (3)
VIN Pin: Input Voltage
-0.3 to 6.0V
VOUT Pin: Output Voltage
-0.3 to (VIN + 0.3V) to 6.0V (max)
VEN Pin: Enable Input Voltage
Continuous Power Dissipation
-0.3 to (VIN + 0.3V) to 6.0V (max)
(4)
Internally Limited
Junction Temperature (TJMAX)
150°C
Storage Temperature Range
-65 to 150°C
Maximum Lead Temperature (Soldering, 10 sec.)
ESD Rating
260°C
(5)
Human Body Model
2 kV
Machine Model
(1)
(2)
(3)
(4)
(5)
200V
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits
and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Internal thermal shutdown circuitry protects the device from permanent damage.
The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin. MIL-STD-883 3015.7
Operating Ratings
(1) (2)
VIN: Input Voltage Range
2.5V to 5.5V
VEN: Enable Voltage Range
0 to (VIN + 0.3V) to 5.5V (max)
Recommended Load Current
0 to 150 mA
(3)
Junction Temperature Range (TJ)
-40°C to +125°C
Ambient Temperature Range (TA)
-40°C to +85°C
(3)
(1)
(2)
(3)
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits
and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). See applications section.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
3
LP5900
SNVS358O – JULY 2005 – REVISED MAY 2013
www.ti.com
Thermal Properties
Junction to Ambient Thermal Resistance θJA (1)
JEDEC Board (DSBGA)
(2)
88°C/W
4L Cellphone Board (DSBGA)
157.4°C/W
JEDEC Board (WSON-6) (2)
(1)
77.3°C/W
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design.
Detailed description of the board can be found in JESD51-7
(2)
Electrical Characteristics
Limits in standard typeface are for TA = 25ºC. Limits in boldface type apply over the full operating junction temperature range
(-40°C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP5900 Typical Application Circuit (pg. 1) with: VIN
= VOUT (NOM) + 1.0V, VEN = 1.2V, CIN = COUT = 0.47 μF, IOUT = 1.0 mA. (1), (2)
Symbol
Parameter
Conditions
Min
Max
Units
2.5
Typ
5.5
V
−2
2
VIN
Input Voltage
ΔVOUT
Output Voltage Tolerance
VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1
mA to 150mA
Line Regulation
VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1
mA
0.05
%/V
Load Regulation
IOUT = 1 mA to 150 mA
0.001
%/mA
ILOAD
(3)
Load Current
0
Maximum Output Current
IQ
Quiescent Current
(4)
Ground Current
VDO
Dropout Voltage (6)
ISC
Short Circuit Current Limit
PSRR
Power Supply Rejection Ratio
(8)
en
Output Noise Voltage
(8)
TSHUTDOWN
Thermal Shutdown
mA
150
VEN = 1.2V, IOUT = 0 mA
25
50
VEN = 1.2V, IOUT = 150 mA
160
230
0.003
1.0
VEN = 0.3V (Disabled)
(5)
IG
IOUT = 0 mA (VOUT = 2.5V)
30
IOUT = 150 mA
80
(7)
85
f = 1 kHz, IOUT = 150 mA
75
f = 10 kHz, IOUT = 150 mA
65
f = 50 kHz, IOUT = 150 mA
52
f = 100 kHz, IOUT = 150 mA
40
BW = 10 Hz to 100
kHz, VIN = 4.2V
7
IOUT = 1 mA
10
IOUT = 150 mA
6.5
Temperature
160
Hysteresis
20
µA
µA
150
300
f = 100 Hz, IOUT = 150 mA
IOUT = 0 mA
%
mV
mA
dB
μVRMS
ºC
Login Input Thresholds
VIL
Low Input Threshold (VEN)
VIN = 2.5V to 5.5V
VIH
High Input Threshold (VEN)
VIN = 2.5V to 5.5V
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
4
0.4
1.2
V
V
All voltages are with respect to the potential at the GND pin.
Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most
likely norm.
The device maintains a stable, regulated output voltage without a load current.
Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.
Ground current is defined here as the total current flowing to ground as a result of all input voltages applied to the device.
Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its
nominal value. This parameter only applies to output voltages above 2.5V.
Short Circuit Current is measured with VOUT pulled to 0v and VIN worst case = 6.0V.
This specification is specified by design.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
LP5900
www.ti.com
SNVS358O – JULY 2005 – REVISED MAY 2013
Electrical Characteristics (continued)
Limits in standard typeface are for TA = 25ºC. Limits in boldface type apply over the full operating junction temperature range
(-40°C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP5900 Typical Application Circuit (pg. 1) with: VIN
= VOUT (NOM) + 1.0V, VEN = 1.2V, CIN = COUT = 0.47 μF, IOUT = 1.0 mA. (1), (2)
Symbol
IEN
Parameter
Input Current at VEN Pin
(9)
Conditions
Min
Typ
VEN = 5.5V and VIN = 5.5V
5.5
VEN = 0.0V and VIN = 5.5V
0.001
Max
Units
μA
Transient Characteristics
ΔVOUT
Line Transient
(8)
VIN = (VOUT(NOM) + 1.0V) to (VOUT(NOM) +
1.6V) in 30 μs, IOUT = 1 mA
−2
mV
VIN = (VOUT(NOM) + 1.6V) to (VOUT(NOM) +
1.0V) in 30 μs, IOUT = 1 mA
Load Transient
(8)
2
IOUT = 1 mA to 150 mA in 10 μs
−110
IOUT = 150 mA to 1 mA in 10 μs
Overshoot on Startup
(8)
Turn on Time
(9)
mV
50
To 95% of VOUT(NOM)
150
20
mV
300
μs
There is a 1 MΩ resistor between VEN and ground on the device.
Output & Input Capacitor, Recommended Specifications
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
ESR
Output/Input Capacitance
Conditions
Min
Nom
Capacitance for stability
0.33
0.47
0.33
0.47
5
Max
Units
µF
10
500
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
mΩ
5
LP5900
SNVS358O – JULY 2005 – REVISED MAY 2013
www.ti.com
Typical Performance Characteristics.
Unless otherwise specified,CIN = COUT = 0.47µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.2V, IOUT = 1mA , T A = 25°C.
6
Output Noise Density
Power Supply Rejection Ratio
Figure 3.
Figure 4.
Power Supply Rejection Ratio
Output Voltage Change
vs
Temperature
Figure 5.
Figure 6.
Ground Current
vs
VIN, I LOAD = 0mA
Ground Current
vs
VIN, I LOAD = 1mA
Figure 7.
Figure 8.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
LP5900
www.ti.com
SNVS358O – JULY 2005 – REVISED MAY 2013
Typical Performance Characteristics. (continued)
Unless otherwise specified,CIN = COUT = 0.47µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.2V, IOUT = 1mA , T A = 25°C.
Ground Current
vs
VIN, I LOAD = 100mA
Ground Current
vs
Load Current
Figure 9.
Figure 10.
Short Circuit Current
Load Transient
Figure 11.
Figure 12.
Line Transient
Enable Startup Time, (I L= 1mA, VOUT = 2.8V)
Figure 13.
Figure 14.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
7
LP5900
SNVS358O – JULY 2005 – REVISED MAY 2013
www.ti.com
Typical Performance Characteristics. (continued)
Unless otherwise specified,CIN = COUT = 0.47µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.2V, IOUT = 1mA , T A = 25°C.
8
Enable Startup Time, (I L= 100mA, VOUT = 2.8V)
Enable Startup Time, (I L= 1mA, VOUT = 2.8V)
Figure 15.
Figure 16.
Enable Startup Time, (I L= 100mA, VOUT = 2.8V)
Dropout Over Temperature (100mA)
Figure 17.
Figure 18.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
LP5900
www.ti.com
SNVS358O – JULY 2005 – REVISED MAY 2013
APPLICATION HINTS
POWER DISSIPATION AND DEVICE OPERATION
The permissible power dissipation for any package is a measure of the capability of the device to pass heat from
the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power
dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces
between the die and ambient air. As stated in Operating Ratings, the allowable power dissipation for the device
in a given package can be calculated using the equation:
(TJMAX - TA)
PD =
TJA
(1)
The actual power dissipation across the device can be represented by the following equation:
PD = (VIN – VOUT) x IOUT
(2)
This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage
drop across the device, and the continuous current capability of the device. These two equations should be used
to determine the optimum operating conditions for the device in the application.
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP5900 requires external capacitors for regulator stability. The LP5900 is
specifically designed for portable applications requiring minimum board space and smallest components. These
capacitors must be correctly selected for good performance.
INPUT CAPACITOR
An input capacitor is required for stability. The input capacitor should be at least equal to or greater than the
output capacitor. It is recommended that a 0.47 µF capacitor be connected between the LP5900 input pin and
ground.
This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean
analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
Important: To ensure stable operation it is essential that good PCB practices are employed to minimize ground
impedance and keep input inductance low. If these conditions cannot be met, or if long leads are to be used to
connect the battery or other power source to the LP5900, then it is recommended to increase the input capacitor
to at least 2.2 µF. Also, tantalum capacitors can suffer catastrophic failures due to surge current when connected
to a low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at
the input, it must be ensured by the manufacturer to have a surge current rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and
temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain
0.47 μF ±30% over the entire operating temperature range.
OUTPUT CAPACITOR
The LP5900 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor
(dielectric types X5R or X7R) in the 0.47 μF to 10 μF range, and with ESR between 5 mΩ to 500 mΩ, is suitable
in the LP5900 application circuit. For this device the output capacitor should be connected between the VOUT pin
and a good ground connection and should be mounted within 1 cm of the device.
It may also be possible to use tantalum or film capacitors at the device output, VOUT, but these are not as
attractive for reasons of size and cost (see the CAPACITOR CHARACTERISTICS section below).
The output capacitor must meet the requirement for the minimum value of capacitance and have an ESR value
that is within the range 5 mΩ to 500 mΩ for stability.
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
9
LP5900
SNVS358O – JULY 2005 – REVISED MAY 2013
www.ti.com
CAPACITOR CHARACTERISTICS
The LP5900 is designed to work with ceramic capacitors on the input and output to take advantage of the
benefits they offer. For capacitance values in the range of 0.47 μF to 4.7 μF, ceramic capacitors are the smallest,
least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise.
The ESR of a typical 0.47 μF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR
requirement for stability for the LP5900.
The temperature performance of ceramic capacitors varies by type and manufacturer. Most large value ceramic
capacitors (≥ 2.2 µF) are manufactured with Z5U or Y5V temperature characteristics, which results in the
capacitance dropping by more than 50% as the temperature goes from 25°C to 85°C.
A better choice for temperature coefficient in a ceramic capacitor is X7R. This type of capacitor is the most stable
and holds the capacitance within ±15% over the temperature range. Tantalum capacitors are less desirable than
ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance
and voltage ratings in the 0.47 μF to 4.7 μF range.
Another important consideration is that tantalum capacitors have higher ESR values than equivalent size
ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the
stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic
capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about
2:1 as the temperature goes from 25°C down to −40°C, so some guard band must be allowed.
NO-LOAD STABILITY
The LP5900 will remain stable and in regulation with no external load.
ENABLE CONTROL
The LP5900 may be switched ON or OFF by a logic input at the ENABLE pin. A high voltage at this pin will turn
the device on. When the enable pin is low, the regulator output is off and the device typically consumes 3nA.
However if the application does not require the shutdown feature, the VEN pin can be tied to VIN to keep the
regulator output permanently on. In this case the supply voltage must be fully established 500 μs or less to
ensure correct operation of the startup circuit. Failure to comply with this condition may cause a delayed startup
time of several seconds.
A 1MΩ pulldown resistor ties the VEN input to ground, this ensures that the device will remain off when the
enable pin is left open circuit. To ensure proper operation, the signal source used to drive the VEN input must be
able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics
section under VIL and VIH.
DSBGA MOUNTING
The DSBGA package requires specific mounting techniques, which are detailed in Texas Instruments Application
Note AN-1112, SNVS009.
For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the
micro SMD device.
DSBGA LIGHT SENSITIVITY
Exposing the DSBGA device to direct light may cause incorrect operation of the device. Light sources such as
halogen lamps can affect electrical performance if they are situated in proximity to the device.
Light with wavelengths in the red and infra-red part of the spectrum has the most detrimental effect; thus, the
fluorescent lighting used inside most buildings has very little effect on performance.
10
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
LP5900
www.ti.com
SNVS358O – JULY 2005 – REVISED MAY 2013
REVISION HISTORY
Changes from Revision N (April 2013) to Revision O
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 10
Submit Documentation Feedback
Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LP5900
11
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LP5900SD-1.5
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L15
LP5900SD-1.5/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L15
LP5900SD-1.8
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L17
LP5900SD-1.8/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L17
LP5900SD-2.0
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L18
LP5900SD-2.0/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L18
LP5900SD-2.2
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L19
LP5900SD-2.2/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L19
LP5900SD-2.5
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L13
LP5900SD-2.5/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L13
LP5900SD-2.7
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L14
LP5900SD-2.7/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L14
LP5900SD-2.8
ACTIVE
WSON
NGF
6
1000
TBD
Call TI
Call TI
-40 to 125
L12
LP5900SD-2.8/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L12
LP5900SD-3.0/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L20
LP5900SD-3.3/NOPB
ACTIVE
WSON
NGF
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L16
LP5900SDX-1.5
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L15
LP5900SDX-1.5/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L15
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
2-May-2013
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LP5900SDX-1.8
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L17
LP5900SDX-1.8/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L17
LP5900SDX-2.0
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L18
LP5900SDX-2.0/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L18
LP5900SDX-2.2
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L19
LP5900SDX-2.2/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L19
LP5900SDX-2.5
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L13
LP5900SDX-2.5/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L13
LP5900SDX-2.7
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L14
LP5900SDX-2.7/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L14
LP5900SDX-2.8
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L12
LP5900SDX-2.8/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L12
LP5900SDX-3.0
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L20
LP5900SDX-3.0/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L20
LP5900SDX-3.3
ACTIVE
WSON
NGF
6
4500
TBD
Call TI
Call TI
-40 to 125
L16
LP5900SDX-3.3/NOPB
ACTIVE
WSON
NGF
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
L16
LP5900TL-1.5/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-1.575/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-1.8/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
2-May-2013
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
(3)
(4)
LP5900TL-1.9/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.0/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.1/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.2/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.3/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.5/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.6/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.65/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.7/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.75/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.8/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-2.85/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-3.0/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-3.3/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TL-4.5/NOPB
ACTIVE
DSBGA
YZR
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-1.5/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-1.575/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-1.8/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
Addendum-Page 3
Top-Side Markings
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
2-May-2013
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
(3)
(4)
LP5900TLX-1.9/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.0/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.1/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.2/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.3/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.5/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.6/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.65/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.7/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.75/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.8/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-2.85/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-3.0/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-3.3/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900TLX-4.5/NOPB
ACTIVE
DSBGA
YZR
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900XR-1.8/NOPB
ACTIVE
DSBGA
YPF
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900XR-2.8/NOPB
ACTIVE
DSBGA
YPF
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
LP5900XRX-1.8/NOPB
ACTIVE
DSBGA
YPF
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
Addendum-Page 4
Top-Side Markings
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
2-May-2013
Status
(1)
LP5900XRX-2.8/NOPB
ACTIVE
Package Type Package Pins Package
Drawing
Qty
DSBGA
YPF
4
3000
Eco Plan
Lead/Ball Finish
(2)
Green (RoHS
& no Sb/Br)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
SNAGCU
Level-1-260C-UNLIM
(4)
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 5
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LP5900SD-1.5
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-1.5/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-1.8
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-1.8/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.0
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.0/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.2
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.2/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.5
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.5/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.7
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.7/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.8
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-2.8/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-3.0/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SD-3.3/NOPB
WSON
NGF
6
1000
178.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-1.5
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-1.5/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LP5900SDX-1.8
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-1.8/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.0
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.0/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.2
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.2/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.5
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.5/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.7
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.7/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.8
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-2.8/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-3.0
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-3.0/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-3.3
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900SDX-3.3/NOPB
WSON
NGF
6
4500
330.0
12.4
2.8
2.5
1.0
8.0
12.0
Q1
LP5900TL-1.5/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-1.575/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-1.8/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-1.9/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.0/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.1/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.2/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.3/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.5/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.6/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.65/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.7/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.75/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.8/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-2.85/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-3.0/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-3.3/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TL-4.5/NOPB
DSBGA
YZR
4
250
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-1.5/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-1.575/NOPB DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-1.8/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-1.9/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.0/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.1/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.2/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.3/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.5/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LP5900TLX-2.6/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.65/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.7/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.75/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.8/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-2.85/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-3.0/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-3.3/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900TLX-4.5/NOPB
DSBGA
YZR
4
3000
178.0
8.4
1.15
1.16
0.79
4.0
8.0
Q1
LP5900XR-1.8/NOPB
DSBGA
YPF
4
250
178.0
8.4
1.16
1.2
0.4
4.0
8.0
Q1
LP5900XR-2.8/NOPB
DSBGA
YPF
4
250
178.0
8.4
1.16
1.2
0.4
4.0
8.0
Q1
LP5900XRX-1.8/NOPB
DSBGA
YPF
4
3000
178.0
8.4
1.16
1.2
0.4
4.0
8.0
Q1
LP5900XRX-2.8/NOPB
DSBGA
YPF
4
3000
178.0
8.4
1.16
1.2
0.4
4.0
8.0
Q1
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LP5900SD-1.5
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-1.5/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-1.8
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-1.8/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LP5900SD-2.0
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.0/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.2
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.2/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.5
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.5/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.7
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.7/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.8
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-2.8/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-3.0/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SD-3.3/NOPB
WSON
NGF
6
1000
210.0
185.0
35.0
LP5900SDX-1.5
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-1.5/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-1.8
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-1.8/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.0
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.0/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.2
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.2/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.5
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.5/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.7
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.7/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.8
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-2.8/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-3.0
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-3.0/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-3.3
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900SDX-3.3/NOPB
WSON
NGF
6
4500
367.0
367.0
35.0
LP5900TL-1.5/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-1.575/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-1.8/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-1.9/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.0/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.1/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.2/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.3/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.5/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.6/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.65/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.7/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.75/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-2.8/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
Pack Materials-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LP5900TL-2.85/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-3.0/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-3.3/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TL-4.5/NOPB
DSBGA
YZR
4
250
210.0
185.0
35.0
LP5900TLX-1.5/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-1.575/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-1.8/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-1.9/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.0/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.1/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.2/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.3/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.5/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.6/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.65/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.7/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.75/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.8/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-2.85/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-3.0/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-3.3/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900TLX-4.5/NOPB
DSBGA
YZR
4
3000
210.0
185.0
35.0
LP5900XR-1.8/NOPB
DSBGA
YPF
4
250
210.0
185.0
35.0
LP5900XR-2.8/NOPB
DSBGA
YPF
4
250
210.0
185.0
35.0
LP5900XRX-1.8/NOPB
DSBGA
YPF
4
3000
210.0
185.0
35.0
LP5900XRX-2.8/NOPB
DSBGA
YPF
4
3000
210.0
185.0
35.0
Pack Materials-Page 5
MECHANICAL DATA
NGF0006A
www.ti.com
MECHANICAL DATA
YPF0004
D
0.250±0.045
E
TOP SIDE OF PACKAGE
BOTTOM SIDE OF PACKAGE
XRA04XXX (Rev C)
D: Max = 1.108 mm, Min =1.047 mm
E: Max = 1.083 mm, Min =1.022 mm
4215204/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
www.ti.com
12/12
MECHANICAL DATA
YZR0004xxx
D
0.600±0.075
E
TLA04XXX (Rev D)
D: Max = 1.108 mm, Min =1.047 mm
E: Max = 1.083 mm, Min =1.022 mm
4215042/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
www.ti.com
12/12
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated