TI NA556 Dual precision timer Datasheet

NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
FEATURES
•
•
•
•
•
Two Precision Timing Circuits Per Package
Astable or Monostable Operation
TTL-Compatible Output Can Sink or Source
up to 150 mA
Active Pullup or Pulldown
Designed to Be Interchangeable With
Signetics NE556, SA556, and SE556
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
Precision Timers From Microseconds to
Hours
Pulse-Shaping Circuits
Missing-Pulse Detectors
Tone-Burst Generators
Pulse-Width Modulators
Pulse-Position Modulators
Sequential Timers
Pulse Generators
Frequency Dividers
Application Timers
Industrial Controls
Touch-Tone Encoders
SLFS023G – APRIL 1978 – REVISED JUNE 2006
NA556...D OR N PACKAGE
NE556...D, N, OR NS PACKAGE
SA556...D OR N PACKAGE
SE556...J PACKAGE
(TOP VIEW)
1DISCH
1THRES
1CONT
1RESET
1OUT
1TRIG
GND
1
14
2
13
3
12
4
11
5
10
6
7
9
8
VCC
2DISCH
2THRES
2CONT
2RESET
2OUT
2TRIG
DESCRIPTION/ORDERING INFORMATION
These devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each
package. These circuits can be operated in the astable or the monostable mode with external resistor-capacitor
(RC) timing control. The basic timing provided by the RC time constant can be controlled actively by modulating
the bias of the control-voltage input.
The threshold (THRES) and trigger (TRIG) levels normally are two-thirds and one-third, respectively, of VCC.
These levels can be altered by using the control voltage (CONT) terminal. When the trigger input falls below
trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the
threshold input is above the threshold level, the flip-flop is reset, and the output is low. The reset (RESET) input
can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop
is reset and the output goes low. When the output is low, a low-impedance path is provided between the
discharge (DISCH) terminal and ground (GND).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1978–2006, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006
ORDERING INFORMATION
TA
VT (MAX)
VCC = 15 V
PACKAGE (1)
PDIP – N
0°C to 70°C
11.2 V
–40°C to 85°C
11.2 V
–40°C to 105°C
–55°C to 125°C
(1)
NE556N
Tube of 50
NE556D
Reel of 2500
NE556DR
SOP – NS
Reel of 2000
NE556NSR
NE556
PDIP – N
Tube of 25
SA556N
SA556N
PDIP – N
Tube of 25
NA556N
NA556N
Tube of 50
NA556D
Reel of 2500
NA556DR
SOIC – D
10.6 V
CDIP – J
Tube of 25
NE556N
NE556
NA556
SE556J
SE556J
SE556JB
SE556JB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each timer)
RESET
TRIGGER
VOLTAGE (1)
THRESHOLD
VOLTAGE (1)
OUTPUT
DISCHARGE
SWITCH
Low
Irrelevant
Irrelevant
Low
On
High
<1/3 VDD
Irrelevant
High
Off
High
>1/3 VDD
>2/3 VDD
Low
On
High
>1/3 VDD
<2/3 VDD
(1)
As previously established
Voltage levels shown are nominal.
FUNCTIONAL BLOCK DIAGRAM, EACH TIMER
VCC
RESET
THRES
CONT
OUT
TRIG
DISCH
GND
RESET can override TRIG, which can override THRES.
2
TOP-SIDE MARKING
Tube of 25
SOIC – D
11.2 V
ORDERABLE PART NUMBER
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NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
VCC
Supply voltage (2)
VI
Input voltage
IO
Output current
θJA
Package thermal impedance (3) (4)
θJC
Package thermal impedance (5) (6)
TJ
Operating virtual junction temperature
CONT, RESET, THRES, and TRIG
(1)
(2)
(3)
(4)
(5)
(6)
UNIT
18
V
VCC
V
±225
mA
D package
86
N package
80
NS package
Tstg
MAX
°C/W
76
J package
15.05
°C/W
150
°C
Lead temperature 1,6 mm (1/16 in) from case for 60 s
J package
300
°C
Lead temperature 1,6 mm (1/16 in) from case for 10 s
D, N, or NS package
260
°C
150
°C
Storage temperature range
–65
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) – TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with MIL-STD-883.
Recommended Operating Conditions
VCC
Supply voltage
VI
Input voltage
IO
Output current
TA
Operating free-air temperature
MIN
MAX
NA556, NE556, SA556
4.5
16
SE556
4.5
18
CONT, RESET, THRES, and TRIG
V
VCC
V
±200
mA
NA556
–40
105
NE556
0
70
SA556
–40
85
SE556
–55
125
Submit Documentation Feedback
UNIT
°C
3
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006
Electrical Characteristics
VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
PARAMETER
VT
Threshold voltage
level
IT
Threshold current (1)
TEST CONDITIONS
TYP
MAX
MIN
TYP
MAX
8.8
10
11.2
9.4
10
10.6
VCC = 5 V
2.4
3.3
4.2
2.7
3.3
4
30
250
5
5.2
1.67
1.9
Trigger voltage level
Trigger current
VRESET
Reset voltage level
IRESET
Reset current
IDISCH
Discharge switch
off-state current
VCONT
Control voltage
(open circuit)
250
5
5.6
4.8
1.1
1.67
2.2
1.45
0.5
2
0.7
1
TA = –55°C to 125°C
3
1.1
0.1
0.4
0.1
0.4
1.5
–0.4
–1
20
100
20
100
10
11
10
10.4
VCC = 15 V,
IOL = 100 mA
9
TA = –55°C to 125°C
2.6
4
0.1
2.9
3.3
3.8
0.25
0.1
0.15
0.4
0.75
0.4
0.5
2
2.5
2
2.2
µA
V
mA
nA
V
1
TA = –55°C to 125°C
2.7
2.5
V
2.5
TA = –55°C to 125°C
0.35
0.1
0.25
0.1
TA = –55°C to 125°C
0.15
0.8
0.15
12.75
0.3
13.3
0.15
13
TA = –55°C to 125°C
0.25
13.3
12
12.5
2.75
12.5
3.3
3
TA = –55°C to 125°C
Output high,
No load
V
0.2
TA = –55°C to 125°C
VCC = 15 V
nA
3.8
TA = –55°C to 125°C
Output low,
No load
Supply current
4
10.4
2.9
VCC = 15 V, IOH = –200 mA
VCC = 5 V,
IOH = –100 mA
3.3
TA = –55°C to 125°C
VCC = 15 V, IOL = 200 mA
VCC = 15 V,
IOH = –100 mA
9.6
9.6
VCC = 5 V, IOL = 8 mA
(1)
1
–0.4
VCC = 5 V,
IOL = 5 mA
ICC
0.9
0.7
RESET at 0 V
VCC = 5 V,
IOL = 3.5 mA
High-level
output voltage
0.3
RESET at VCC
VCC = 15 V
V
1.9
0.5
TA = –55°C to 125°C
VCC = 15 V,
IOL = 50 mA
VOH
6
TA = –55°C to 125°C
0.3
VCC = 15 V,
IOL = 10 mA
VOL
30
4.5
TRIG at 0 V
VCC = 5 V
Low-level
output voltage
UNIT
MIN
VCC = 5 V
ITRIG
SE556
VCC = 15 V
VCC = 15 V
VTRIG
NA556
NE556
SA556
V
3.3
2
20
30
20
24
VCC = 5 V
6
VCC = 15 V
18
12
6
10
26
18
20
VCC = 5 V
4
10
4
8
mA
This parameter influences the maximum value of the timing resistors R and RB in the circuit of Figure 1. For example, when VCC = 5 V,
the maximum value is R = RA + RB ≈ 3.4 MΩ, and for VCC = 15 V, the maximum value is ≈ 10 MΩ.
Submit Documentation Feedback
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006
Operating Characteristics
VCC = 5 V and 15 V
PARAMETER
NA556
NE556
SA556
TEST
CONDITIONS (1)
MIN
Initial error of timing
interval (2)
Each timer,
monostable (3)
Each timer, astable (5)
TA = 25°C
Supply voltage
sensitivity of timing
interval
TYP
MAX
1
3
MIN
MAX
0.5
1.5 (4)
1.5%
±1
±0.5
50
30
150
90
Timer 1 – Timer 2
±10
±10
Each timer,
monostable (3)
0.1
Each timer,
monostable (3)
Each timer, astable (5)
Each timer, astable (5)
TA = MIN to MAX
TA = 25°C
Timer 1 – Timer 2
0.5
UNIT
TYP
2.25%
Timer 1 – Timer 2
Temperature
coefficient of timing
interval
SE556
0.05
0.3
0.15
±0.2
±0.1
100 (4)
ppm/°C
0.2 (4)
%/V
Output-pulse rise time
CL = 15 pF,
TA = 25°C
100
300
100
200 (4)
ns
Output-pulse fall time
CL = 15 pF,
TA = 25°C
100
300
100
200 (4)
ns
(1)
(2)
(3)
(4)
(5)
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
Timing-interval error is defined as the difference between the measured value and the average value of a random sample from each
process run.
Values specified are for a device in a monostable circuit similar to Figure 2, with the following component values: RA = 2 kΩ to 100 kΩ,
C = 0.1 µF.
On products compliant to MIL-PRF-38535, this parameter is not production tested.
Values specified are for a device in an astable circuit similar to Figure 1, with the following component values: RA = 1 kΩ to 100 kΩ,
C = 0.1 µF.
Submit Documentation Feedback
5
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS
www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006
APPLICATION INFORMATION
VCC
(5 V to 15 V)
VCC
(5 V to 15 V)
Open
(see Note A)
CONT
RA
0.01 µF
RA
VCC
RESET
CONT
RL
RESET
DISCH
OUT
RB
RL
DISCH
OUT
OUT
THRES
TRIG
VCC
OUT
THRES
GND
TRIG
Input
C
GND
C
NOTE A: Bypassing the control-voltage input to ground with a
capacitor might improve operation. This should be evaluated
for individual applications.
Figure 1. Circuit for Astable Operation
6
Submit Documentation Feedback
Figure 2. Circuit for Monostable Operation
PACKAGE OPTION ADDENDUM
www.ti.com
31-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
JM38510/10902BCA
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
NA556D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NA556DG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NA556DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NA556DRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NA556N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NA556NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE556D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556DBR
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556DBRE4
ACTIVE
SSOP
DB
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556DE4
ACTIVE
SOIC
D
14
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE556NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
NE556NSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
NE556NSRE4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
50
Lead/Ball Finish
MSL Peak Temp (3)
N / A for Pkg Type
SA556D
OBSOLETE
SOIC
D
14
TBD
Call TI
Call TI
SA556DR
OBSOLETE
SOIC
D
14
TBD
Call TI
Call TI
SA556N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SA556NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SE556FKB
OBSOLETE
LCCC
FK
20
TBD
Call TI
SE556J
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
N / A for Pkg Type
SE556JB
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
N / A for Pkg Type
(1)
Call TI
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
31-Jul-2006
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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