Burr-Brown OPA277AIDRMTG4 High precision operational amplifier Datasheet

OPA
OPA
277
227
OPA277
OPA2277
OPA4277
OPA
4277
7
OPA2
277
OPA2
77
OPA4
277
OPA2
77
OPA2
277
SBOS079A – MARCH 1999 – REVISED APRIL 2005
High Precision
OPERATIONAL AMPLIFIERS
FEATURES
DESCRIPTION
● ULTRA LOW OFFSET VOLTAGE: 10µV
● ULTRA LOW DRIFT: ±0.1µV/°C
● HIGH OPEN-LOOP GAIN: 134dB
● HIGH COMMON-MODE REJECTION: 140dB
● HIGH POWER SUPPLY REJECTION: 130dB
● LOW BIAS CURRENT: 1nA max
● WIDE SUPPLY RANGE: ±2V to ±18V
● LOW QUIESCENT CURRENT: 800µA/amplifier
● SINGLE, DUAL, AND QUAD VERSIONS
● REPLACES OP-07, OP-77, OP-177
The OPA277 series precision op amps replace the industry
standard OP-177. They offer improved noise, wider output
voltage swing, and are twice as fast with half the quiescent
current. Features include ultra low offset voltage and drift, low
bias current, high common-mode rejection, and high power
supply rejection. Single, dual, and quad versions have identical
specifications for maximum design flexibility.
OPA277 series op amps operate from ±2V to ±18V supplies with
excellent performance. Unlike most op amps which are specified
at only one supply voltage, the OPA277 series is specified for
real-world applications; a single limit applies over the ±5V to
±15V supply range. High performance is maintained as the
amplifiers swing to their specified limits. Because the initial offset
voltage (±20µV max) is so low, user adjustment is usually not
required. However, the single version (OPA277) provides external trim pins for special applications.
APPLICATIONS
●
●
●
●
●
●
●
TRANSDUCER AMPLIFIER
BRIDGE AMPLIFIER
TEMPERATURE MEASUREMENTS
STRAIN GAGE AMPLIFIER
PRECISION INTEGRATOR
BATTERY POWERED INSTRUMENTS
TEST EQUIPMENT
OPA277 op amps are easy to use and free from phase inversion
and overload problems found in some other op amps. They are
stable in unity gain and provide excellent dynamic behavior over
a wide range of load conditions. Dual and quad versions feature
completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded.
Single (OPA277) and dual (OPA2277) versions are available
in DIP-8, SO-8, and DFN-8 (4mm x 4mm) packages. The quad
(OPA4277) comes in DIP-14 and SO-14 surface-mount packages. All are fully specified from –40°C to +85°C and operate
from –55°C to +125°C.
OPA277
Offset Trim
1
8
Offset Trim
–In
2
7
V+
+In
3
6
Output
V–
4
5
NC
8-Pin DIP, SO-8
OPA277AIDRM
Out A
1
14
Out D
–In A
2
13
–In D
+In A
3
12
+In D
V+
4
11
V–
A
Out A
1
–In A
2
+In A
3
V–
4
A
B
8
V+
7
Out B
6
–In B
5
+In B
D
+In B
5
10
+In C
–In B
6
9
–In C
Out B
7
8
Out C
B
OPA2277
Offset Trim
OPA4277
1
Pin 1
Indicator
8
Offset Trim
7
V+
−In
2
+In
3
6
Output
V−
4
5
NC
OPA2277AIDRM
Out A
1
8
Out B
−In A
2
7
V+
+In A
3
6
−In B
V−
4
5
+In B
C
Pin 1
Indicator
DFN-8 4mm x 4mm
(top view)
Thermal Pad
on Bottom
(Connect to V−)
14-Pin DIP, SO-14
8-Pin DIP, SO-8
NC = No connection.
DFN-8 4mm x 4mm
(top view)
Thermal Pad
on Bottom
(Connect to V−)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 1999-2005, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
Supply Voltage .................................................................................... 36V
Input Voltage ..................................................... (V–) –0.7V to (V+) +0.7V
Output Short-Circuit(2) .............................................................. Continuous
Operating Temperature .................................................. –55°C to +125°C
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature ...................................................................... 150°C
Lead Temperature (soldering, 10s) ................................................. 300°C
ESD Rating (Human Body Model) .................................................. 2000V
(Machine Model) ........................................................... 100V
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
NOTE: (1) Stresses above these rating may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short-circuit to ground, one amplifier per package.
PACKAGE/ORDERING INFORMATION(1)
OFFSET
VOLTAGE
max, µV
OFFSET
VOLTAGE DRIFT
max, µV/°C
PACKAGE-LEAD
Single
OPA277PA
OPA277P
OPA277UA
OPA277U
OPA277AIDRM
±50
±20
±50
±20
±100
±1
±0.15
±1
±0.15
±1
DIP-8
DIP-8
SO-8 Surface Mount
SO-8 Surface Mount
DFN-8 (4mm x 4mm)
Dual
OPA2277PA
OPA2277P
OPA2277UA
OPA2277U
OPA2277AIDRM
±50
±25
±50
±25
±100
±1
±0.25
±1
±0.25
±1
DIP-8
DIP-8
SO-8 Surface Mount
SO-8 Surface Mount
DFN-8 (4mm x 4mm)
Quad
OPA4277PA
OPA4277UA
±50
±50
±1
±1
DIP-14
SO-14 Surface Mount
PRODUCT
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet or visit the TI web site
at www.ti.com.
PIN DESCRIPTIONS
OPA277
OPA2277AIDRM
Offset Trim
1
8
Offset Trim
–In
2
7
V+
+In
3
6
Output
V–
4
5
NC(1)
Out A
1
Pin 1
Indicator
8
Out B
7
V+
−In A
2
+In A
3
6
−In B
V−
4
5
+In B
OPA4277
8-Pin DIP, SO-8
Out A
1
–In A
2
A
14
Out D
13
–In D
DFN-8 4mm x 4mm
(top view)
D
+In A
3
12
+In D
V+
4
11
V–
+In B
5
10
+In C
Thermal Pad
on Bottom
(Connect to V−)
OPA277AIDRM
B
C
–In B
6
9
–In C
Out B
7
8
Out C
OPA2277
Offset Trim
1
Pin 1
Indicator
8
Offset Trim
7
V+
−In
2
+In
3
6
Output
V−
4
5
NC
14-Pin DIP, SO-14
Out A
1
–In A
2
+In A
3
V–
4
A
B
8-Pin DIP, SO-8
2
8
V+
7
Out B
6
–In B
5
+In B
DFN-8 4mm x 4mm
(top view)
NOTE: (1) NC = No connection.
Thermal Pad
on Bottom
(Connect to V−)
OPA277, OPA2277, OPA4277
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SBOS079A
ELECTRICAL CHARACTERISTICS: VS = ±5V to VS = ±15V
At TA = +25°C, and RL = 2kΩ, unless otherwise noted.
Boldface limits apply over the specified temperature range, –40°C to +85°C.
OPA277PA, UA
OPA2277PA, UA
OPA4277PA, UA
OPA277P, U
OPA2277P, U
PARAMETER
CONDITION
OFFSET VOLTAGE
Input Offset Voltage:
OPA277P, U (high grade, single)
OPA2277P, U (high grade, dual)
All PA, UA, Versions
AIDRM Versions
VOS
TYP(1)
MAX
±10
±10
±20
±25
TYP(1)
MAX
MIN
TYP(1)
Input Offset Voltage Drift
dVOS/dT
OPA277P, U (high grade, single)
OPA2277P, U (high grade, dual)
All PA, UA, AIDRM Versions
TA = –40°C to +85°C
TA = –40°C to +85°C
TA = –40°C to +85°C
PSRR
INPUT BIAS CURRENT
Input Bias Current
TA = –40°C to +85°C
Input Offset Current
TA = –40°C to +85°C
–40°C
–40°C
–40°C
–40°C
to
to
to
to
+85°C
+85°C
+85°C
+85°C
±30
±50
±0.1
±0.1
0.2
±0.3
VS = ±2V to ±18V
VS = ±2V to ±18V
dc
±0.5
IOS
±0.5
Input Voltage Noise Density, f = 10Hz en
f = 100Hz
f = 1kHz
f = 10kHz
Current Noise Density, f = 1kHz
in
0.22
0.035
12
8
8
8
0.2
NOISE
Input Voltage Noise, f = 0.1 to 10Hz
INPUT IMPEDANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
AOL
TA = –40°C to +85°C
FREQUENCY RESPONSE
Gain-Bandwidth Product
GBW
Slew Rate
SR
Settling Time, 0.1%
0.01%
Overload Recovery Time
Total Harmonic Distortion + Noise THD+N
VCM = (V–) +2V to (V+) –2V
VCM = (V–) +2V to (V+) –2V
±0.15
✻
✻
±0.5
±0.5
(V–) +2
130
128
±1
±0.15
✻
✻
±1
±1
✻
0.1
IB
VCM
CMRR
±100
±0.15
±0.25
±1
±2
±1
±2
✻
✻
(V+) –2
✻
115
115
±2.8
±4
±2.8
±4
±100
µV
µV
µV
µV
±165
µV
µV
µV
µV
±1
µV/°C
µV/°C
µV/°C
±1
±1
µV/mo
µV/V
µV/V
µV/V
±2.8
±4
±2.8
±4
nA
nA
nA
nA
µVPP
µVrms
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
✻
✻
✻
✻
✻
✻
✻
✻
✻
UNITS
✻
✻
✻
✻
✻
✻
✻
✻
140
MAX
±50
±35
TA =
TA =
TA =
TA =
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection
TA = –40°C to +85°C
MIN
±20
Input Offset Voltage Over Temperature
OPA277P, U (high grade, single)
OPA2277P, U (high grade, dual)
All PA, UA, Versions
AIDRM Versions
Input Offset Voltage: (all models)
vs Time
vs Power Supply
TA = –40°C to +85°C
Channel Separation (dual, quad)
MIN
OPA277AIDRM,
OPA2277AIDRM
✻
115
115
✻
✻
V
dB
dB
VCM = (V–) +2V to (V+) –2V
100 || 3
250 || 3
✻
✻
✻
✻
MΩ || pF
GΩ || pF
VO = (V–)+0.5V to
(V+)–1.2V, RL = 10kΩ
140
✻
✻
dB
✻
dB
VO = (V–)+1.5V to
(V+)–1.5V, RL = 2kΩ
126
VO = (V–)+1.5V to
(V+)–1.5V, RL = 2kΩ
126
VS = ±15V, G = 1, 10V Step
VS = ±15V, G = 1, 10V Step
VIN • G = VS
1kHz, G = 1, VO = 3.5Vrms
134
✻
✻
✻
1
0.8
14
16
3
0.002
✻
✻
✻
✻
✻
✻
✻
✻
dB
✻
✻
✻
✻
✻
✻
MHz
V/µs
µs
µs
µs
%
✻ Specifications same as OPA277P, U.
NOTE: (1) VS = ±15V.
OPA277, OPA2277, OPA4277
SBOS079A
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3
ELECTRICAL CHARACTERISTICS: VS = ±5V to VS = ±15V
(CONT)
At TA = +25°C, and RL = 2kΩ, unless otherwise noted.
Boldface limits apply over the specified temperature range, –40°C to +85°C.
OPA277PA, UA
OPA2277PA, UA
OPA4277PA, UA
OPA277P, U
OPA2277P, U
PARAMETER
CONDITION
OUTPUT
Voltage Output
TA = –40°C to +85°C
TA = –40°C to +85°C
Short-Circuit Current
Capacitive Load Drive
VO
(V–)
(V–)
(V–)
(V–)
+0.5
+0.5
+1.5
+1.5
IQ
(V+)
(V+)
(V+)
(V+)
±5
±2
VS
MAX
–1.2
–1.2
–1.5
–1.5
MIN
±790
IO = 0
IO = 0
–40
–55
–55
TYP(1)
✻
✻
✻
✻
±35
See Typical Curve
ISC
CLOAD
POWER SUPPLY
Specified Voltage Range
Operating Voltage Range
Quiescent Current (per amplifier)
TA = –40°C to +85°C
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance
SO-8 Surface-Mount
DIP-8
DIP-14
SO-14 Surface-Mount
DFN-8(2)
RL = 10kΩ
RL = 10kΩ
RL = 2kΩ
RL = 2kΩ
TYP(1)
MIN
OPA277AIDRM,
OPA2277AIDRM
MAX
MIN
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
±15
±18
±825
±900
✻
✻
+85
+125
+125
✻
✻
✻
✻
TYP(1)
UNITS
✻
✻
✻
✻
V
V
V
V
mA
✻
✻
✻
✻
V
V
µA
µA
✻
✻
✻
°C
°C
°C
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
θJA
150
100
80
100
MAX
✻
✻
✻
✻
45
°C/W
°C/W
°C/W
°C/W
°C/W
✻ Specifications same as OPA277P, U.
NOTES: (1) VS = ±15V.
(2) Thermal pad soldered to printed circuit board (PCB).
4
OPA277, OPA2277, OPA4277
www.ti.com
SBOS079A
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
POWER SUPPLY AND COMMON-MODE
REJECTION vs FREQUENCY
OPEN-LOOP GAIN/PHASE
vs FREQUENCY
140
140
0
100
–30
80
–60
φ
60
–90
40
–120
20
–150
0
–180
120
+PSR
–PSR
PSR, CMR (dB)
AOL (dB)
120
CL = 0
CL = 1500pF
Phase (°)
G
100
80
CMR
60
40
20
0
–20
0.1
1
10
100
1k
10k
100k
1M
0.1
10M
1
10
100
1k
10k
Frequency (Hz)
Frequency (Hz)
INPUT NOISE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
INPUT NOISE VOLTAGE vs TIME
100k
1M
Noise signal is bandwidth limited to
lie between 0.1Hz and 10Hz.
Current Noise
100
50nV/div
Voltage Noise (nV/√Hz)
Current Noise (fA/√Hz)
1000
Voltage Noise
10
1
1
10
100
1k
10k
1s/div
Frequency (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
CHANNEL SEPARATION vs FREQUENCY
140
1
120
THD+Noise (%)
Channel Separation (dB)
VOUT = 3.5Vrms
100
Dual and quad devices. G = 1,
all channels. Quad measured
channel A to D or B to C—other
combinations yield similar or
improved rejection.
80
60
0.1
G = 10, RL = 2kΩ, 10kΩ
0.01
G = 1, RL = 2kΩ, 10kΩ
0.001
40
10
100
1k
10k
100k
1M
10
Frequency (Hz)
1k
10k
100k
Frequency (Hz)
OPA277, OPA2277, OPA4277
SBOS079A
100
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5
TYPICAL CHARACTERISTICS (CONT)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
16
12
Typical distribution
of packaged units.
Single, dual, and
quad included.
30
Percent of Amplifiers (%)
10
8
6
4
25
20
15
10
5
2
0
0
–50–45–40–35–30–25–20–15–10 –5 0 5 10 15 20 25 30 35 40 45 50
Offset Voltage (µV)
0
0.1
160
2
150
AOL, CMR, PSR (dB)
Offset Voltage Change (µV)
0.4
0.5
0.6
0.7
0.8
0.9
1.0
AOL, CMR, PSR vs TEMPERATURE
3
1
0
–1
–2
CMR
140
AOL
130
PSR
120
110
–3
0
15
30
45
60
75
90
105
100
–75
120
–50
–25
0
25
50
75
100
Time from Power Supply Turn-On (s)
Temperature (°C)
INPUT BIAS CURRENT vs TEMPERATURE
QUIESCENT CURRENT AND
SHORT-CIRCUIT CURRENT vs TEMPERATURE
125
5
1000
100
4
950
90
3
900
80
Quiescent Current (µA)
Input Bias Current (nA)
0.3
Offset Voltage (µV/°C)
WARM-UP OFFSET VOLTAGE DRIFT
2
1
0
–1
–2
Curves represent typical
production units.
70
850
±IQ
800
60
50
750
–ISC
700
40
+ISC
650
30
600
20
–4
550
10
–5
500
–75
–3
–75
–50
–25
0
25
50
75
100
125
Temperature (°C)
6
0.2
Short-Circuit Current (mA)
Percent of Amplifiers (%)
35
Typical distribution
of packaged units.
Single, dual, and
quad included.
14
0
–50
–25
0
25
50
75
100
125
Temperature (°C)
OPA277, OPA2277, OPA4277
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SBOS079A
TYPICAL CHARACTERISTICS (CONT)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
CHANGE IN INPUT BIAS CURRENT
vs POWER SUPPLY VOLTAGE
CHANGE IN INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
2.0
2.0
Curve shows normalized change in
bias current with respect to VS = ±10V
(+20V). Typical IB may range from
–0.5nA to +0.5nA at VS = ±10V.
1.5
1.0
1.0
VS = ±5V
∆IB (nA)
∆IB (nA)
0.5
0.0
Curve shows normalized change in bias current
with respect to VCM = 0V. Typical IB may range
from –05.nA to +0.5nA at VCM = 0V.
1.5
VCM = 0V
0.5
0.0
–0.5
–0.5
–1.0
–1.0
–1.5
–1.5
VS = ±15V
–2.0
–2.0
0
5
10
15
20
25
30
35
40
–15
–10
Supply Voltage (V)
QUIESCENT CURRENT vs SUPPLY VOLTAGE
5
10
15
100
10V step
CL = 1500pF
per amplifier
Settling Time (µs)
900
800
700
50
0.01%
0.1%
20
600
10
500
0
±5
±10
±15
±20
±1
±10
Supply Voltage (V)
±100
Gain (V/V)
MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+)
30
(V+) – 1
Output Voltage Swing (V)
VS = ±15V
25
Output Voltage (VPP)
0
SETTLING TIME vs CLOSED-LOOP GAIN
1000
Quiescent Current (µA)
–5
Common-Mode Voltage (V)
20
15
10
VS = ±5V
5
–55°C
(V+) – 2
(V+) – 3
125°C
(V+) – 4
25°C
(V+) – 5
(V–) + 5
25°C
125°C
(V–) + 4
(V–) + 3
(V–) + 2
–55°C
(V–) + 1
(V–)
0
1k
10k
100k
0
1M
OPA277, OPA2277, OPA4277
SBOS079A
±5
±10
±15
±20
±25
±30
Output Current (mA)
Frequency (Hz)
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7
TYPICAL CHARACTERISTICS (CONT)
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
LARGE-SIGNAL STEP RESPONSE
G = +1, CL = 1500pF, VS = +15V
60
Gain = –1
40
Gain = +1
2V/div
Overshoot (%)
50
30
20
Gain = ±10
10
0
10
100
1k
10k
100k
10µs/div
Load Capacitance (pF)
20mV/div
SMALL-SIGNAL STEP RESPONSE
G = +1, CL = 1500pF, VS = ±15V
20mV/div
SMALL-SIGNAL STEP RESPONSE
G = +1, CL = 0, VS = ±15V
1µs/div
8
1µs/div
OPA277, OPA2277, OPA4277
www.ti.com
SBOS079A
APPLICATIONS INFORMATION
The OPA277 series is unity-gain stable and free from unexpected output phase reversal, making it easy to use in a wide
range of applications. Applications with noisy or high impedance power supplies may require decoupling capacitors
close to the device pins. In most cases 0.1µF capacitors are
adequate.
connecting a potentiometer as shown in Figure 1. This
adjustment should be used only to null the offset of the op
amp. This adjustment should not be used to compensate for
offsets created elsewhere in a system since this can introduce additional temperature drift.
V+
Trim Range: Exceeds
Offset Voltage Specification
The OPA277 series has very low offset voltage and drift. To
achieve highest performance, circuit layout and mechanical
conditions should be optimized. Offset voltage and drift can
be degraded by small thermoelectric potentials at the op amp
inputs. Connections of dissimilar metals will generate thermal
potential which can degrade the ultimate performance of the
OPA277 series. These thermal potentials can be made to
cancel by assuring that they are equal in both input terminals.
• Keep thermal mass of the connections made to the two
input terminals similar.
• Locate heat sources as far as possible from the critical
input circuitry.
• Shield op amp and input circuitry from air currents such as
cooling fans.
OPERATING VOLTAGE
OPA277 series op amp operate from ±2V to ±18V supplies
with excellent performance. Unlike most op amps which are
specified at only one supply voltage, the OPA277 series is
specified for real-world applications; a single limit applies
over the ±5V to ±15V supply range. This allows a customer
operating at VS = ±10V to have the same assured performance as a customer using ±15V supplies. In addition, key
parameters are assured over the specified temperature range,
–40°C to +85°C. Most behavior remains unchanged through
the full operating voltage range (±2V to ±18V). Parameters
which vary significantly with operating voltage or temperature
are shown in typical performance curves.
OFFSET VOLTAGE ADJUSTMENT
The OPA277 series is laser-trimmed for very low offset
voltage and drift so most circuits will not require external
adjustment. However, offset voltage trim connections are
provided on pins 1 and 8. Offset voltage can be adjusted by
0.1µF
20kΩ
7
1
2
8
3
0.1µF
OPA277
4
6
OPA277 single op amp only.
Use offset adjust pins only to null
offset voltage of op amp—see text.
V–
FIGURE 1. OPA277 Offset Voltage Trim Circuit.
INPUT PROTECTION
The inputs of the OPA277 series are protected with 1kΩ
series input resistors and diode clamps. The inputs can
withstand ±30V differential inputs without damage. The protection diodes will, of course, conduct current when the
inputs are over-driven. This may disturb the slewing behavior
of unity-gain follower applications, but will not damage the op
amp.
INPUT BIAS CURRENT CANCELLATION
The input stage base current of the OPA277 series is
internally compensated with an equal and opposite cancellation circuit. The resulting input bias current is the difference
between the input stage base current and the cancellation
current. This residual input bias current can be positive or
negative.
When the bias current is canceled in this manner, the input
bias current and input offset current are approximately the
same magnitude. As a result, it is not necessary to use a bias
current cancellation resistor as is often done with other op
amps (Figure 2). A resistor added to cancel input bias current
errors may actually increase offset voltage and noise.
R2
R2
R1
R1
Op Amp
OPA277
RB = R2 || R1
No bias current
cancellation resistor
(see text)
(a)
(b)
Conventional op amp with external bias
current cancellation resistor.
OPA277 with no external bias current
cancellation resistor.
FIGURE 2. Input Bias Current Cancellation.
OPA277, OPA2277, OPA4277
SBOS079A
www.ti.com
9
V+
1/2
OPA2277
VOUT = (V1 – V2)(1 +
R2
R1
)
R2
V–
R–∆R
Load
Cell
V1
R+∆R
V+
R+∆R
V2
R1
1/2
OPA2277
R–∆R
V–
R2
R1
For integrated solution see: INA126, INA2126 (dual)
INA125 (on-board reference)
INA122 (single-supply)
FIGURE 3. Load Cell Amplifier.
IREG ∼ 1mA
5V
12
V+
Type J
VLIN
1/2
OPA2277
13
RF
10kΩ
4
R
412Ω
+
VIN
1
IR1
3
11
VREG
10
V+
RG
RG
1250Ω
RF
10kΩ
14
IR2
XTR105
B
E
RG
9
8
IO
1/2
OPA2277
1kΩ
2
25Ω
7
IRET
V–
50Ω
–
VIN
6
+
–
IO = 4mA + (VIN – VIN) 40
RG
RCM = 1250Ω
(G = 1 +
2RF
= 50)
R
0.01µF
FIGURE 4. Thermocouple Low Offset, Low Drift Loop Measurement with Diode Cold Junction Compensation.
10
OPA277, OPA2277, OPA4277
www.ti.com
SBOS079A
DFN PACKAGE
LAYOUT GUIDELINES
The OPA277 series uses the 8-lead DFN (also known as
SON), which is a QFN package with contacts on only two
sides of the package bottom. This leadless, near-chip-scale
package maximizes board space and enhances thermal and
electrical characteristics through an exposed pad.
The leadframe die pad should be soldered to a thermal pad
on the PCB. Mechanical drawings located at the end of this
data sheet list the physical dimensions for the package and
pad.
DFN packages are physically small, have a smaller routing
area, improved thermal performance, and improved electrical
parasitics, with a pinout scheme that is consistent with other
commonly-used packages, such as SO and MSOP. Additionally, the absence of external leads eliminates bent-lead
issues.
Soldering the exposed pad significantly improves board-level
reliability during temperature cycling, key push, package
shear, and similar board-level tests. Even with applications
that have low-power dissipation, the exposed pad must be
soldered to the PCB to provide structural integrity and longterm reliability.
The DFN package can be easily mounted using standard
printed circuit board (PCB) assembly techniques. See Application Note, QFN/SON PCB Attachment (SLUA271) and
Application Report, Quad Flatpack No-Lead Logic Packages
(SCBA017), both available for download at www.ti.com.
The exposed leadframe die pad on the bottom of the
package should be connected to V–.
OPA277, OPA2277, OPA4277
SBOS079A
www.ti.com
11
PACKAGE OPTION ADDENDUM
www.ti.com
28-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
OPA2277AIDRMR
PREVIEW
SON
DRM
8
3000
TBD
Call TI
Call TI
OPA2277AIDRMRG4
ACTIVE
SON
DRM
8
3000
TBD
Call TI
Call TI
OPA2277AIDRMT
ACTIVE
SON
DRM
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA2277AIDRMTG4
ACTIVE
SON
DRM
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA2277P
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA2277PA
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA2277PAG4
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA2277PG4
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA2277U
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA2277U/2K5
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA2277U/2K5G4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA2277UA
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA2277UA/2K5
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-3-260C-168 HR
OPA2277UA/2K5E4
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-3-260C-168 HR
OPA2277UAE4
ACTIVE
SOIC
D
8
100
TBD
Call TI
OPA2277UAG4
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA2277UG4
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA277AIDRMR
ACTIVE
SON
DRM
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA277AIDRMRG4
ACTIVE
SON
DRM
8
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA277AIDRMT
ACTIVE
SON
DRM
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA277AIDRMTG4
ACTIVE
SON
DRM
8
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA277P
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA277PA
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA277PAG4
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA277PG4
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA277U
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
Addendum-Page 1
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
28-Jun-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
OPA277U/2K5
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA277U/2K5G4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA277UA
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA277UA/2K5
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-3-260C-168 HR
OPA277UA/2K5E4
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-3-260C-168 HR
OPA277UAE4
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA277UAG4
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA277UG4
ACTIVE
SOIC
D
8
100
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA4277PA
ACTIVE
PDIP
N
14
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA4277PAG4
ACTIVE
PDIP
N
14
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
OPA4277UA
ACTIVE
SOIC
D
14
58
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA4277UA/2K5
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-3-260C-168 HR
OPA4277UA/2K5E4
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-3-260C-168 HR
OPA4277UAE4
ACTIVE
SOIC
D
14
58
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
OPA4277UAG4
ACTIVE
SOIC
D
14
58
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
28-Jun-2007
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
2-Jul-2007
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA2277AIDRMT
DRM
8
MLA
180
12
4.3
4.3
1.5
8
12
Q2
OPA2277UA/2K5
D
8
MLA
330
12
6.9
5.4
2.0
8
12
Q1
OPA277AIDRMR
DRM
8
MLA
330
12
4.3
4.3
1.5
8
12
Q2
OPA277AIDRMT
DRM
8
MLA
180
12
4.3
4.3
1.5
8
12
Q2
OPA277UA/2K5
D
8
MLA
330
12
6.9
5.4
2.0
8
12
Q1
OPA4277UA/2K5
D
14
MLA
330
16
6.5
9.5
2.1
8
16
Q1
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
OPA2277AIDRMT
DRM
8
MLA
190.0
212.7
31.75
OPA2277UA/2K5
D
8
MLA
346.0
346.0
29.0
OPA277AIDRMR
DRM
8
MLA
346.0
346.0
29.0
OPA277AIDRMT
DRM
8
MLA
190.0
212.7
31.75
OPA277UA/2K5
D
8
MLA
390.0
348.0
63.0
OPA4277UA/2K5
D
14
MLA
346.0
346.0
33.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Jul-2007
Pack Materials-Page 3
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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