AGR21060E 60 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET Introduction Table 1. Thermal Characteristics The AGR21060E is a high-voltage, gold-metalized, enhancement-mode, laterally diffused metal oxide semiconductor (LDMOS) RF power transistor suitable for wideband code division multiple access (W-CDMA), single and multicarrier class AB wireless base station power amplifier applications. ) AGR21060EU (unflanged) 5B 03 STYLE 1 AGR21060EF (flanged) Figure 1. Available Packages Features Typical performance for two carrier 3GPP W-CDMA systems. F1 = 2135 MHz and F2 = 2145 MHz with 3.84 MHz channel bandwidth (BW), adjacent channel BW = 3.84 MHz at F1 – 5 MHz and F2 + 5 MHz. Third-order distortion is measured over 3.84 MHz BW at F1 – 10 MHz and F2 + 10 MHz. Typical P/A ratio of 8.5 dB at 0.01% (probability) CCDF: — Output power: 13.5 W. — Power gain: 14.5 dB. — Efficiency: 26%. — IM3: –34 dBc. — ACPR: –37 dBc. — Return loss: –12 dB. High-reliability gold-metalization process. Low hot carrier injection (HCI) induced bias drift over 20 years. Internally matched. High gain, efficiency, and linearity. Integrated ESD protection. Device can withstand a 10:1 voltage standing wave ratio (VSWR) at 28 Vdc, 2140 MHz, 60 W continuous wave (CW) output power. Large signal impedance parameters available. Parameter Thermal Resistance, Junction to Case: AGR21060EU AGR21060EF Sym Value Unit Rı JC Rı JC 1.0 1.0 °C/W °C/W Table 2. Absolute Maximum Ratings* Parameter Drain-source Voltage Gate-source Voltage Total Dissipation at TC = 25 °C: AGR21060EU AGR21060EF Derate Above 25 °C: AGR21060EU AGR21060EF Operating Junction Temperature Storage Temperature Range Sym Value Unit VDSS 65 Vdc VGS –0.5, 15 Vdc PD PD 175 175 W W — — TJ 1.0 1.0 200 W/°C W/°C °C TSTG –65, 150 °C * Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 3. ESD Rating* AGR21060E HBM MM CDM Minimum (V) 500 50 1500 Class 1B A 4 * Although electrostatic discharge (ESD) protection circuitry has been designed into this device, proper precautions must be taken to avoid exposure to ESD and electrical overstress (EOS) during all handling, assembly, and test operations. PEAK Agere Devices employs a human-body model (HBM), a machine model (MM), and a charged-device model (CDM) qualification requirement in order to determine ESD-susceptibility limits and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used in each of the models, as defined by JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and JESD22-C101A (CDM) standards. Caution: MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. AGR 21060 E 60 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET Electrical Characteristics Recommended operating conditions apply unless otherwise specified: TC = 30 °C. Table 4. dc Characteristics Parameter Off Characteristics 300 µA) Drain-source Breakdown Voltage (VGS = 0, ID = 100 Gate-source Leakage Current (VGS = 5 V, VDS = 0 V) Zero Gate Voltage Drain Leakage Current (VDS = 28 V, VGS = 0 V) On Characteristics Forward Transconductance (VDS = 10 V, ID = 1 A) Gate Threshold Voltage (VDS = 10 V, ID = 180 µA) Gate Quiescent Voltage (VDS = 28 V, ID = 500 mA) Drain-source On-voltage (VGS = 10 V, ID = 0.45 A) Symbol M in Typ Max Unit V(BR)DSS IGSS IDSS 65 — — — — — — 1.8 5.5 100 Vdc µAdc µAdc GFS — — — — 4.0 — 3.8 0.08 — 4.8 — — S Vdc Vdc Vdc Symbol Min Typ Max Un i t CRSS — 1.3 — pF — dB VGS(TH) VGS(Q) VDS(ON) Table 5. RF Characteristics Parameter Dynamic Characteristics Reverse Transfer Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) (This part is internally matched on both the input and output.) (in Supplied Test Fixture) Functional Tests (in Agere Systems Supplied Test Fixture) Common-source Amplifier Power Gain* Drain Efficiency* Third-order Intermodulation Distortion* (IMD3 measured over 3.84 MHz BW @ f1 – 10 MHz and f2 + 10 MHz) Adjacent Channel Power Ratio* (ACPR measured over BW of 3.84 MHz @ f1 – 5 MHz and f2 + 5 MHz) Output Power, 1 dB Compression Point (VDD = 28 V, POUT = 60 W (CW), fC = 2140.0 MHz) Input Return Loss* Output Mismatch Stress (VDD = 28 V, POUT = 60 W (CW), IDQ = 500 mA, fC = 2140.0 MHz VSWR = 10:1; [all phase angles]) — 14.5 IM3 — –34 — dBc ACPR — –37 — dBc P1dB — 60 — W — –12 — dB GPS η IRL ψ * 3GPP W-CDMA, typical P/A ratio of 8.5 dB at 0.01% CCDF, f1 = 2135.0 MHz, and f2 = 2145 MHz. VDD = 28 Vdc, IDQ = 500 mA, and POUT = 13.5 W avg. — 26 — % No degradation in output power. AG R210 60E 60 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET Test Circuit Illustrations for AGR21060E FB1 VGG R1 VDD1 R3 R2 + C3 C4 C5 C6 Z8 C7A C8A C9A RF INPUT Z2 Z3 Z4 Z5 Z6 C15A VDD2 Z9 C1 C10A C11A C12A C13A C14A Z7 Z15 C7B C8B C9B Z1 + + + 2 1 3 Z10 DUT + + C10B C11B C12B C13B C14B Z11 PINS: 1. DRAIN 2. GATE 3. SOURCE Z12 Z13 C2 C15B Z14 RF OUTPUT A. Schematic Parts List: ? Microstrip Line: Z1 0.361 in. x 0.065 in.; Z2 0.207 in. x 0.150 in.; Z3 0.085 in. x 0.087 in.; Z4 0.130 in. x 0.357 in.; Z5 0.436 in. x 0.087 in.; Z6 0.414 in. x 0.900 in.; Z7 0.424 in. x 0.050 in.; Z8 1.170 in. x 0.050 in.; Z9 0.520 in. x 0.624 in.; Z10 0.120 in. x 0.147 in.; Z11 0.180 in. x 0.250 in.; Z12 0.469 in. x 1.200 in.; Z13 0.068 in. x 0.068 in.; Z14 0.278 in. x 0.065 in.; Z15 1.170 in. x 0.050 in ® ? ATC chip capacitor: C1, C2: 15 pF 100B150JCA500X; C6, C7: 8.2 pF 100B8R2JCA500X; C11: 1.2 pF 100B1R2JCA500X; C14, C15: 5.6 pF 100B5R6JCA500X. ® ? Sprague tantalum surface-mount chip capacitor: C3, C4, C12, C13: 22 µF, 35 V, T491D226K035AS. ® ? Vitramon chip capacitor: C5, C9: 22000 pF. ? 0805 size chip capacitor: C8 0.01 µF. ? 1206 size chip capacitor: C10 0.1 µF. ? 1206 size 0.25 W chip resistors: R1 1 kΩ; R2 560 kΩ; R3 4.7 Ω. ® ? Fair-Rite ferrite bead: FB1 2743019447. ® ? Taconic ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, εr = 3.5. B. Component Layout Figure 2. AGR21060E Test Circuit AGR 21060 E 60 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET U CT 0.6 90 IN D 0. 8 10 0.1 0.4 20 50 20 10 5.0 4.0 3.0 1.8 2.0 1.6 1.4 1.2 50 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.2 0.2 20 0.4 0.1 ) / Yo (-jB CE 1. 0 0 2. 1.8 1.2 1.0 5 -4 0.14 -80 0.35 0.9 0 -4 0.15 0.36 -110 0 -70 -5 6 4 0.11 -100 -90 0.13 0.1 9 0.0 0 -12 -70 40 -1 (-j 0. 07 30 -1 0. 43 8 0.0 0.4 2 0.4 1 0.4 0.39 0.38 F 0.37 0.12 0.6 1.6 1.4 0.7 0.1 0.3 0.8 35 5 3 -60 -5 0.3 7 VE -60 0.1 CA P AC I TI 0 -65 .5 0.2 -30 32 CE CO M T 06 Z X/ 18 0. RE AC TA N EN 0. 0 -5 -25 0. PO N 4 0. 0.4 0.0 -20 5 ,O o) R 0.6 0 3. -75 IN DU IV CT 0.8 31 0. 19 0. 4 4.0 -85 AN PT CE US ES 0 1. -15 0.3 5 0.4 0.2 8 0.2 0 -4 4 0. 0.2 2 0.3 0.2 9 0.2 1 -30 6 0.4 4 0.0 0 -15 -80 8 0. 5.0 0.2 -10 0.48 10 0.6 -20 D L OA D < OW A R 7 HST 0.4 N GT -170 EL E V WA <Ð -90 -160 Ð RESISTANCE COMPONENT (R/Zo), OR CONDUCTANCE COMPONENT (G/Yo) 50 0.49 0.25 0.2 6 0.24 0.27 0.23 0.25 0.24 0.26 0.23 0.27 REFL ECTI ON COEFFI CI EN T I N D EG REES L E OF ANG I SSI ON COEFFI CI EN T I N TRA N SM D EGR EES L E OF ANG Z0 = 10 Ω 0.0 Ð > W A V EL E N GTH S TOW A RD 0.0 0.49 0.48 ± 180 170 Typical Performance Characteristics MHz (f ) 2110 (f1) 2140 (f2) 2170 (f3) ZL Ω ZS Ω (Complex Source Impedance) (Complex Optimum Load Impedance) TB D TB D TB D TB D TB D TB D GATE (2) ZS DRAIN (1) ZL SOURCE (3) INPUT MATCH DUT OUTPUT MATCH Figure 3. Series Equivalent Input and Output Impedances AG R210 60E 60 W, 2.110 GHz—2.170 GHz, N-Channel E-Mode, Lateral MOSFET Package Dimensions All dimensions are in inches. Tolerances are ±0.005 in. unless specified. AGR21060EU PINS: 1. DRAIN 2. GATE 3. SOURCE PEAK DEVICES AGR21060EU XXXX AGR21060EF PINS: 1. DRAIN 2. GATE 3. SOURCE PEAK DEVICES AGR21060EF XXXX XXXX - 4 DIGIT TRACE CODE