Fairchild FODM8061 High noise immunity, 3.3v/5v, 10mbit/sec logic gate output (open collector) optocoupler Datasheet

FODM8061
High Noise Immunity, 3.3V/5V, 10Mbit/sec
Logic Gate Output (Open Collector) Optocoupler
Features
Description
■ High Noise Immunity characterized by common mode
The FODM8061 is a 3.3V/5V high-speed logic gate
output (open collector) optocoupler, which supports
isolated communications allowing digital signals to
communicate between systems without conducting
ground loops or hazardous voltages. It utilizes Fairchild’s
patented coplanar packaging technology, Optoplanar®,
and optimized IC design to achieve high noise immunity,
characterized by high common mode transient immunity
specifications.
transient immunity (CMTi)
– 20kV/µs Minimum CMTi
■ High Speed
– 10Mbit/sec Date Rate (NRZ)
– 80ns max. Propagation Delay
– 25ns max. Pulse Width Distortion
– 40ns max. Propagation Delay Skew
■ 3.3V LVTTL/LVCMOS Compatibility
■ Specifications guaranteed over 3V to 5.5V supply
voltage and -40°C to +110°C temperature range
■ Safety and regulatory approvals
– UL1577, 3750 VACRMS for 1 min.
– IEC60747-5-2 (pending approval)
Applications
■ Microprocessor system interface
I2C
■
■
■
■
■
– SPI,
Industrial fieldbus communications
– DeviceNet, CAN, RS485
Programmable logic control
Isolated data acquisition system
Voltage level translator
Isolating MOSFET/IGBT gate drivers
This optocoupler consists of an AlGaAS LED at the
input, optically coupled to a high speed integrated photodetector logic gate. The output of the detector IC is an
open collector schottky-clamped transistor. The coupled
parameters are guaranteed over the wide temperature
range of -40°C to +110°C. A maximum input signal of
5mA will provide a minimum output sink current of 13mA
(fan out of 8).
Related Resources
■ www.fairchildsemi.com/products/opto/
■ www.fairchildsemi.com/pf/FO/FODM611.html
■ www.fairchildsemi.com/pf/FO/FODM8071.html
Functional Schematic
Truth Table
ANODE 1
6 VCC
5 VO
CATHODE 3
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
LED
Output
Off
High
On
Low
4 GND
www.fairchildsemi.com
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
May 2010
Number
Name
Function Description
1
ANODE
3
CATHODE
Anode
4
GND
Cathode
Output Ground
5
VO
Output Voltage
6
VCC
Output Supply Voltage
Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin)
As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for “safe electrical insulation” only within the
safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For rated main voltage < 150Vrms
I-IV
For rated main voltage < 300Vrms
I-III
Climatic Classification
40/110/21
Pollution Degree (DIN VDE 0110/1.89)
2
CTI
Comparative Tracking Index
175
VPR
Input to Output Test Voltage, Method b,
VIORM x 1.875 = VPR, 100% Production Test with
tm = 1 sec, Partial Discharge < 5 pC
1060
VPR
Input to Output Test Voltage, Method a,
VIORM x 1.5 = VPR, Type and Sample Test with
tm = 60 sec, Partial Discharge < 5 pC
848
VIORM
Max Working Insulation Voltage
565
Vpeak
VIOTM
Highest Allowable Over Voltage
4000
Vpeak
5.0
mm
External Creepage
TCase
RIO
External Clearance
5.0
mm
Insulation thickness
0.5
mm
Safety Limit Values, Maximum Values allowed in the event
of a failure, Case Temperature
150
°C
Insulation Resistance at TS, VIO = 500V
109
Ω
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
2
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Pin Definitions
Symbol
TSTG
Parameter
Storage Temperature
TOPR
TJ
Units
-40 to +125
ºC
Operating Temperature
-40 to +110
ºC
Junction Temperature
-40 to +125
ºC
260 for 10sec
ºC
Lead Solder Temperature
(Refer to Reflow Temperature Profile)
TSOL
Value
IF
Forward Current
50
mA
VR
Reverse Voltage
5.0
V
VCC
Supply Voltage
0 to 7.0
V
VO
Output Voltage
-0.5 to VCC+0.5
V
Average Output Current
50
mA
PDI
Input Power Dissipation(1)(2)
100
mW
PDO
Output Power Dissipation(1)(2)
85
mW
IO
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
VCC, VDD
Min.
Max.
Unit
Ambient Operating Temperature
Parameter
-40
+110
ºC
Supply Voltages(3)
3.0
5.5
V
0
0.8
V
6.3
15
mA
VFL
Logic Low Input Voltage
IFH
Logic High Input Current(4)
IFL
Logic Low Input Current
N
Fan Out (at RL = 1kΩ)
RL
Output Pull-up Resistor
330
250
µA
5
TTL Loads
4k
Ω
Isolation Characteristics (TA=25ºC)
Symbol
Parameter
Test Conditions
VISO
Input-Output Isolation Voltage
freq= 60Hz, t = 1.0min,
II-O ≤ 10µA(5)(6)
RISO
Isolation Resistance
VI-O = 500V(5)
CISO
Isolation Capacitance
VI-O = 0V,
freq=1.0MHz(5)
Min.
Typ.
3750
Max.
Units
VacRMS
1012
Ω
0.6
pF
Notes:
1. No derate required to 110ºC.
2. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
3. 0.1µF bypass capacitor must be connected between pins 4 and 6.
4. Recommended IFH is 9.3mA for operation above TA =100ºC.
5. Device is considered a two terminal device: Pins 1 and 3 are shorted, and Pins 4, 5, and 6 are shorted together.
6. 3,750 VACRMS for 1 minute duration is equivalent to 4,500 VACRMS for 1 second duration.
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
3
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Absolute Maximum Ratings (TA=25ºC unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
(TA = -40ºC to +110ºC, 3.0V ≤ VCC ≤ 5.5V), unless otherwise specified.
Typical value is measured at TA = 25ºC and VCC = 3.3V.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
IF = 10mA, Fig. 1
1.05
1.45
1.8
V
5.0
INPUT CHARACTERISTICS
VF
Forward Voltage
BVR
Input Reverse Breakdown Voltage
IR = 10µA
IFHL
Threshold Input Current
VO = 0.6V, IOL(sinking) = 13mA,
TA < 85ºC, Fig. 2
V
TA = 85ºC to 110 ºC
3.4
5.0
4.2
7.5
mA
OUTPUT CHARACTERISTICS
VOL
Logic LOW Output Voltage
IF = rated IFHL,
IOL(sinking) = 13mA, Fig.3
0.4
0.6
V
IOH
Logic HIGH Output Current
IF = 250µA, VO = 3.3V, Fig. 4
8.0
50.0
µA
IF = 250µA, VO = 5.0V, Fig. 4
2.1
30.0
µA
IF = 10mA, VCC = 3.3V, Fig. 5, 7
6.0
8.5
mA
IF = 10mA, VCC = 5.0V, Fig. 5, 7
7.5
10.0
mA
IF = 0mA, VCC = 3.3V, Fig. 6, 7
4.0
7.0
mA
IF = 0mA, VCC = 5.0V, Fig. 6, 7
6.0
9.0
mA
ICCL
ICCH
Logic LOW Output Supply Current
Logic HIGH Output Supply Current
Switching Characteristics (Apply over all recommended conditions)
(TA = -40ºC to +110ºC, 3.0V ≤ VCC ≤ 5.5V, IF = 7.5mA), unless otherwise specified.
Typical value is measured at TA = 25ºC and VCC = 3.3V
Symbol
Parameter
Date Rate
Test Conditions
Min.
Typ.
RL = 350Ω
Max.
Units
10
Mbps
tPHL
Propagation Delay Time to Logic RL = 350Ω, CL = 15pF,
Low Output
Fig. 8 and 11
43
80
ns
tPLH
Propagation Delay Time to Logic RL = 350Ω, CL = 15pF,
High Output
Fig. 8 and 11
50
80
ns
PWD
Pulse Width Distortion,
| tPHL - tPLH|
RL = 350Ω, CL = 15pF,
Fig. 9
7
25
ns
tPSK
Propagation Delay Skew
RL = 350Ω, CL = 15pF(7)
40
ns
tR
Output Rise Time, (10% to 90%) RL = 350Ω, CL = 15pF,
Fig. 10 and 11
20
ns
tF
Output Fall Time, (90% to 10%)
RL = 350Ω, CL = 15pF,
Fig. 10 and 11
10
ns
|CMH|
Common Mode Transient
Immunity at Output High
IF = 0mA, VO > 0.8 x VCC,
VCM = 1000V(8), Fig. 12
20
40
kV/µs
|CML|
Common Mode Transient
Immunity at Output Low
IF = 7.5mA, VO < 0.8V,
VCM = 1000V(8), Fig. 12
20
40
kV/µs
Notes
7. tPSK is equal to the magnitude of the worst case difference in tPHL and/or tPLH that will be seen between any two units
from the same manufacturing date code that are operated at same case temperature (±5°C), at same operating
conditions, with equal loads (RL = 350Ω and CL = 15pF), and with an input rise time less than 5ns.
8. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of
the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity
at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm, to
assure that the output will remain low.
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
4
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Electrical Characteristics (Apply over all recommended conditions)
Fig. 2 Threshold Input Current vs Ambient Temperature
Fig. 1 Input LED Current vs Forward Voltage
6
IFHT – THRESHOLD INPUT CURRENT (mA)
IF – INPUT LED CURRENT (mA)
100
10
TA = 110°C
1
TA = -40°C
TA = 25°C
0.1
0.01
0.001
0.6
0.8
1.0
1.2
1.4
1.6
VF – FORWARD VOLTAGE (V)
1.8
ICCL – TYPICAL LOGIC LOW OUTPUT SUPPLY CURRENT (mA)
IOH – LOGIC HIGH OUTPUT CURRENT (µA)
VCC = 3.3V
0.45
VCC = 5.0V
0.40
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
100
Fig. 5 Typical Logic Low Output Supply Current
vs. Ambient Temperature
10
IF = 10mA
9
8
7
VCC = 5.0V
6
VCC = 3.3V
5
4
3
-20
VCC = 3.3V
3
2
-20
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
100
120
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
100
IF = 250µA
VO = 3.3V
15
10
VCC = 3.3V
5
VCC = 5.0V
0
-40
120
ICCH – TYPICAL LOGIC HIGH OUTPUT SUPPLY CURRENT (mA)
VOL – LOW LEVEL OUTPUT VOLTAGE (V)
0.50
2
-40
VCC = 5.0V
20
0.55
-20
4
Fig. 4 Logic High Output Current vs Ambient Temperature
IOL = 13mA
IF = 5mA
0.35
-40
5
1
-40
2.0
Fig. 3 Low Level Output Voltage vs. Ambient Temperature
0.60
IOL = 13mA
120
-20
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
100
120
Fig. 6 Typical Logic High Output Supply Current
vs. Ambient Temperature
10
IF = 0mA
8
6
VCC = 5.0V
4
VCC = 3.3V
2
0
-40
-20
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
100
120
www.fairchildsemi.com
5
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Typical Performance Curves
Fig. 8 Typical Propagation Delay vs. Ambient Temperature
10
10
IF = 0mA (for ICCH), 10mA (for ICCL)
TA = 25°C
tP – PROPAGATION DELAY (ns)
ICC – TYPICAL LOGIC OUTPUT SUPPLY CURRENT (mA)
Fig. 7 Typical Logic Output Supply Current
vs. Output Supply Voltage
8
6
ICCL
4
ICCH
2
Frequency = 5MHz
Duty Cycle = 50%
IF = 7.5mA
8 RL = 350Ω
6
tPLH @ VCC = 3.3V
4
tPHL @ VCC = 3.3V
2
tPLH @ VCC = 5.0V
0
3.0
3.5
4.0
4.5
5.0
0
-40
5.5
-20
VCC – OUTPUT SUPPLY VOLTAGE (V)
Fig. 9 Typical Pulse Width Distortion vs. Ambient Temperature
100
120
40
Frequency = 5MHz
Duty Cycle = 50%
IF = 7.5mA
8 RL = 350Ω
VCC = 3.3V
6
4
VCC = 5.0V
2
0
-40
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
Fig. 10 Typical Rise and Fall Time vs. Ambient Temperature
10
tR, tF – RISE, FALL TIME (ns)
( | tPHL – tPLH | ) – PULSE WIDTH DISTORTION (ns)
tPHL @ VCC = 5.0V
-20
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
100
Frequency = 5MHz
Duty Cycle = 50%
IF = 7.5mA
RL = 350Ω
30
tR @ VCC = 5.0V
tF @ VCC = 3.3V
10
tF @ VCC = 5.0V
0
-40
120
tR @ VCC = 3.3V
20
-20
0
20
40
60
80
TA – AMBIENT TEMPERATURE (°C)
100
120
www.fairchildsemi.com
6
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Typical Performance Curves (Continued)
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Schematics
Pulse Gen.
5MHz
tf = tr = 5ns
DC = 50%
IF
0.1µF
Bypass
350Ω
CL
Input
Monitoring
Mode
VO Monitoring
Node
RM
(IF = 7.5mA)
Input
50%
tf
tr
90%
1.5V
10%
VOL
Output
tPHL
tPLH
Figure 11. Test Circuit for Propagation Delay Time, Rise Time and Fall Time
IF
VCC
0.1µF
Bypass
SW
350Ω
CL
VO Monitoring
Node
RM
VCM
Pulse Gen
1kV
VCM 90%
10%
0V
tr
tf
VOH
VO (IF = 0mA)
0.8 VCC
0.8V
VO (IF = 7.5mA)
VOL
Figure 12. Test Circuit for Instantaneous Common Mode Rejection Voltage
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
7
Notes:
1. No standard applies to this package.
2. All dimensions are in millimeters.
3. Dimensions are exclusive of burrs, mold flash, and tie bar extrusion.
4. Drawings filesname and revision: MKT-MFP05A.
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
8
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Package Dimensions
Option
Order Entry Identifier
(Example)
No Suffix
FODM8061
R2
FODM8061R2
Description
Mini-Flat 5-pin, shipped in tubes (100 units per tube)
Mini-Flat 5-pin, tape and reel (2,500 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
1
V
3
M8061
2
X YY M
6
4
5
Definitions
1
Fairchild logo
2
Device number
3
IEC60747-5-2 (VDE marking)
4
One digit year code, e.g., ‘9’
5
Two digit work week ranging from ‘01’ to ‘53’
6
Assembly package code
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
9
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Ordering Information
K0
P2
P0
t
D0
E
A0
W1
W
B0
d
F
D1
P
2.54 Pitch
Symbol
Dimensions (mm)
Tape Width
W
12.00 +0.30 / -0.10
Tape Thickness
t
0.30 ±0.05
Sprocket Hole Pitch
P0
4.00 ±0.10
Sprocket Hole Diameter
Description
D0
1.50 +0.10 / -0.0
Sprocket Hole Location
E
1.75 ±0.10
Pocket Location
F
5.50 ±0.10
P2
2.00 ±0.10
Pocket Pitch
P
8.00 ±0.10
Pocket Dimension
A0
4.40 ±0.10
Pocket Hole Diameter
B0
7.30 ±0.10
K0
2.30 ±0.10
D1
1.50 Min.
Cover Tape Width
W1
Cover Tape Thickness
d
Max. Component Rotation or Tilt
10° Max.
Devices Per Reel
2500
Reel Diameter
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
9.20
0.065 ±0.010
330mm (13")
www.fairchildsemi.com
10
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Tape and Reel Dimensions
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
Reflow Profile
Temperature (°C)
TP
260
240
TL
220
200
180
160
140
120
100
80
60
40
20
0
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
tP
Tsmax
tL
Preheat Area
Tsmin
ts
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Feature
Pb-Free Assembly Profile
Temperature Min. (Tsmin)
150°C
Temperature Max. (Tsmax)
200°C
Time (tS) from (Tsmin to Tsmax)
60–120 seconds
Ramp-up Rate (tL to tP)
3°C/second max.
Liquidous Temperature (TL)
217°C
Time (tL) Maintained Above (TL)
60–150 seconds
Peak Body Package Temperature
260°C +0°C / –5°C
Time (tP) within 5°C of 260°C
30 seconds
Ramp-down Rate (TP to TL)
6°C/second max.
Time 25°C to Peak Temperature
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
8 minutes max.
www.fairchildsemi.com
11
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" SerDes™
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet
Identification
Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I49
©2009 Fairchild Semiconductor Corporation
FODM8061 Rev. 1.0.3
www.fairchildsemi.com
12
FODM8061 — High Noise Immunity, 3.3V/5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler
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