Maxim MAX9952DCCB-TD Dual per-pin parametric measurement unit Datasheet

19-3247; Rev 4; 11/09
Dual Per-Pin Parametric
Measurement Units
The MAX9951/MAX9952 dual parametric measurement
units (PMUs) feature a small package size, wide force and
measurement range, and high accuracy, making the
devices ideal for automatic test equipment (ATE) and other
instrumentation that requires a PMU per pin or per site.
The MAX9951/MAX9952 force or measure voltages in the
-2V to +7V through -7V to +13V ranges, dependent upon
the supply voltage (VCC and VEE). The devices handle
supply voltages of up to +30V (VCC to VEE) and a 20V
device-under-test (DUT) voltage swing at full current. The
MAX9951/MAX9952 also force or measure currents up to
±64mA with a lowest full-scale range of ±2µA. Integrated
support circuitry facilitates use of an external buffer amplifier for current ranges greater than ±64mA.
A voltage proportional to the measured output voltage
or current is provided at the MSR_ output. Integrated
comparators, with externally set voltage thresholds,
provide detection for both voltage and current levels.
The MSR_ and comparator outputs can be placed in a
high-impedance state. Separate FORCE and SENSE
connections are short-circuit protected for voltages
from (VEE - 0.3V) to (VCC + 0.3V). The FORCE output
also features a low-leakage, high-impedance state.
Integrated voltage clamps limit the force output to levels set externally. The force-current or the measure-current voltage can be offset -0.2V to +4.4V (IOS). This
feature allows for the centering of the control or measured signal within the external DAC or ADC range.
The MAX9951D/MAX9952D feature an integrated 10kΩ
force-sense resistor between FORCE_ and SENSE_.
The MAX9951F/MAX9952F have no internal force-sense
resistor. These devices are available in a 64-pin, 10mm
x 10mm, 0.5mm pitch TQFP package with an exposed
8mm x 8mm die pad on the top (MAX9951) or the bottom (MAX9952) of the package for efficient heat
removal. The exposed pad is internally connected to
VEE. The MAX9951/MAX9952 are specified over the
commercial 0°C to +70°C temperature range.
Applications
Memory Testers
Features
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
Force Voltage/Measure Current (FVMI)
Force Current/Measure Voltage (FIMV)
Force Voltage/Measure Voltage (FVMV)
Force Current/Measure Current (FIMI)
Force Nothing/Measure Voltage (FNMV)
Force Nothing/Measure Current (FNMI,
Range E Only)
Termination/Measure Current
Termination/Measure Voltage
Five Programmable Current Ranges
±20µA
±20µA
±200µA
±2mA
±64mA
-2V to +7V Through -7V to +13V Input-Voltage
Range
Force-Current/Measure-Current AdjustableVoltage Offset (IOS)
Programmable Voltage Clamps at Force Output
Low-Leakage, High-Impedance Measure, and
Force States
3-Wire Serial Interface
Low 6mA (max) Quiescent Current per PMU
Ordering Information
PART
MAX9951DCCB+D
TEMP RANGE
PIN-PACKAGE
0°C to +70°C
64 TQFP-EPR*
MAX9951DCCB+TD
0°C to +70°C
64 TQFP-EPR*
MAX9951DCCB-D
0°C to +70°C
64 TQFP-EPR*
MAX9951DCCB-TD
0°C to +70°C
64 TQFP-EPR*
MAX9951FCCB+
0°C to +70°C
64 TQFP-EPR*
MAX9951FCCB+T
0°C to +70°C
64 TQFP-EPR*
MAX9951FCCB-D
0°C to +70°C
64 TQFP-EPR*
MAX9951FCCB-TD
0°C to +70°C
64 TQFP-EPR*
MAX9952DCCB+
0°C to +70°C
64 TQFP-EP**
MAX9952DCCB+T
0°C to +70°C
64 TQFP-EP**
MAX9952DCCB-D
0°C to +70°C
64 TQFP-EP**
64 TQFP-EP**
MAX9952DCCB-TD
0°C to +70°C
VLSI Testers
MAX9952FCCB+
0°C to +70°C
64 TQFP-EP**
System-on-a-Chip Testers
MAX9952FCCB+T
0°C to +70°C
64 TQFP-EP**
Structural Testers
MAX9952FCCB-D
0°C to +70°C
64 TQFP-EP**
Pin Configurations and Selector Guide appear at end of
data sheet.
MAX9952FCCB-TD
0°C to +70°C
64 TQFP-EP**
+Denotes a lead(Pb)-free/RoHS-compliant package.
-Denotes a package containing lead(Pb).
*EPR = Top side exposed pad.
D = Dry pack.
**EP = Exposed pad.
T = Tape and reel.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX9951/MAX9952
General Description
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
ABSOLUTE MAXIMUM RATINGS
VCC to AGND .......................................................................+20V
VEE to AGND.........................................................................-15V
VCC to VEE ...........................................................................+32V
VL to AGND............................................................................+6V
AGND to DGND.....................................................-0.5V to +0.5V
Digital Inputs/Outputs ..................................-0.3V to (VL + 0.3V)
All Other Pins to AGND ....................(VEE - 0.3V) to (VCC + 0.3V)
Continuous Power Dissipation (TA = +70°C)
MAX9951_CCB (derate 125mW/°C above +70°C) ...10,000mW
MAX9952_CCB (derate 43.5mW/°C above +70°C) .....3478mW
θJA MAX9951_CCB (Note 1) ...........................................+8°C/W
θJC MAX9951_CCB (Note 1) ...........................................+2°C/W
θJA MAX9952_CCB (Note 1) .........................................+23°C/W
θJC MAX9952_CCB (Note 1) ...........................................+2°C/W
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Operating Temperature Range (commercial) ........0°C to +70°C
Lead Temperature (soldering 10s) ..................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +12V, VEE = -7V, VL = +3.3V, TA = +25°C, unless otherwise noted. Specifications at TA = TMIN and TA = TMAX are guaranteed
by design and characterization. Typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCC - 2.5
V
FORCE VOLTAGE
Force Input Voltage
Range
VIN0_,
VIN1_
Forced Voltage
VDUT
VEE + 2.5
DUT current at full scale
VCC = +12V, VEE = -7V
-2
+7
VCC = +18V, VEE = -12V
-7
+13
VEE + 2.5
VCC - 2.5
DUT current = 0
Input Bias Current
Forced-Voltage Offset
±1
VFOS
-25
Forced-Voltage-Offset
Temperature Coefficient
Forced-Voltage Gain
Error
Nominal gain of +1
-1
Forced-Voltage-Gain
Temperature Coefficient
Forced-Voltage Linearity
Error
µA
+25
±100
VFGE
0.005
Gain and offset errors calibrated out (Notes 3, 4)
IMOS
(Note 3)
mV
µV/°C
+1
±10
VFLER
V
%
ppm/°C
-0.02
+0.02
%FSR
-1
+1
%FSR
MEASURE CURRENT
Measure-Current Offset
Measure-Current-Offset
Temperature Coefficient
Measure-Current Gain
Error
±20
IMGE
(Note 5)
-1
Measure-Current-Gain
Temperature Coefficient
Linearity Error
2
ppm/°C
+1
±20
IMLER
Gain and offset errors calibrated out
(Notes 3, 4, 6)
-0.02
_______________________________________________________________________________________
%
ppm/°C
+0.02
%FSR
Dual Per-Pin Parametric
Measurement Units
(VCC = +12V, VEE = -7V, VL = +3.3V, TA = +25°C, unless otherwise noted. Specifications at TA = TMIN and TA = TMAX are guaranteed
by design and characterization. Typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
Measure-Output-Voltage
Range Over Full-Current
Range
VMSR
Current-Sense Amp
Offset-Voltage Input
VIOS
Rejection of OutputMeasure Error Due to
Common-Mode Sense
Voltage
CONDITIONS
MIN
MAX
UNITS
-4
+4
VIOS_ = 4V + VDUTGND
0
+8
-0.2
+4.4
V
+0.007
%FSR/V
V
Relative to VDUTGND
CMVRLER (Notes 5 and 7)
Measure-Current Range
TYP
VIOS_ = VDUTGND
+0.001
Range E, R_E = 500kΩ
-2
+2
Range D, R_D = 50kΩ
-20
+20
Range C, R_C = 5kΩ
-200
+200
Range B, R_B = 500Ω
-2
+2
Range A, R_A = 15.6Ω
-64
+64
µA
mA
FORCE CURRENT
Input Voltage Range for
Setting Forced Current
Over Full Range
VIN0_,
VIN1_
VIOS_ = VDUTGND
-4
+4
VIOS_ = 4V + VDUTGND
0
+8
Current-Sense Amp
Offset-Voltage Input
VIOS
Relative to VDUTGND
-0.2
+4.4
V
+1
%FSR
V
IOS_ Input Bias Current
±1
Forced-Current Offset
(Note 3)
-1
Forced-Current-Offset
Temperature Coefficient
±20
Forced-Current Gain
Error
(Note 5)
-1
Forced-Current-Gain
Temperature Coefficient
Forced-Current Linearity
Error
Rejection of Output Error
Due to Common-Mode
Load Voltage
Forced-Current Range
µA
ppm/°C
+1
±20
IFLER
Gain and offset errors calibrated out
(Notes 3, 4, 6)
-0.02
CMRIOER (Notes 5 and 7)
+0.001
%
ppm/°C
+0.02
%FSR
+0.007
%FSR/V
Range E, R_E = 500kΩ
-2
+2
Range D, R_D = 50kΩ
-20
+20
Range C, R_C = 5kΩ
-200
+200
Range B, R_B = 500Ω
-2
+2
Range A, R_A = 15.6Ω
-64
+64
µA
mA
_______________________________________________________________________________________
3
MAX9951/MAX9952
DC ELECTRICAL CHARACTERISTICS (continued)
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +12V, VEE = -7V, VL = +3.3V, TA = +25°C, unless otherwise noted. Specifications at TA = TMIN and TA = TMAX are guaranteed
by design and characterization. Typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
+25
mV
MEASURE VOLTAGE
Measure-Voltage-Offset
VMOS
-25
Measure-Voltage-Offset
Temperature Coefficient
Gain Error
±100
VMGER
Nominal gain of +1
-1
Measure-Voltage-Gain
Temperature Coefficient
Measure-Voltage
Linearity Error
Measure-Output-Voltage
Range Over Full DUT
Voltage
±0.005
µV/°C
+1
±10
VMLER
VMSR
Gain and offset errors calibrated out
(Notes 3, 4, 6)
DUT current at full scale
VCC = +12V, VEE = -7V
VCC = +18V, VEE = -12V
ppm/°C
-0.02
+0.02
-2
+7
-7
+13
VEE + 2.5
VCC - 2.5
-1
+1
ILIM-
-92
-65
ILIM+
+65
+92
DUT current = 0
%
%FSR
V
FORCE OUTPUT
Off-State Leakage
Current
Short-Circuit Current
Limit
Force-to-Sense Resistor
RFS
D option only
8
10
12
nA
mA
kΩ
SENSE INPUT
Input Voltage Range
Leakage Current
F option only
VEE + 2.5
VCC - 2.5
V
-1
+1
nA
VEE + 2.5
VCC - 2.5
V
-25
+25
mV
COMPARATOR INPUTS
Input Voltage Range
Offset Voltage
Input Bias Current
±1
µA
VOLTAGE CLAMPS
Input Control Voltage
VCLLO_,
VCLHI_
Clamp Voltage
Accuracy
(Note 8)
VEE + 2.4
VCC - 2.4
V
-100
+100
mV
DIGITAL INPUTS
Input High Voltage
(Note 9)
Input Low Voltage
(Note 9)
VIH
VIL
VL = 5V
+3.5
VL = 3.3V
+2.0
VL = 2.5V
+1.7
V
VL = 5V or 3.3V
+0.8
VL = 2.5V
+0.7
V
Input Current
IIN
±1
µA
Input Capacitance
CIN
3.0
pF
4
_______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
(VCC = +12V, VEE = -7V, VL = +3.3V, TA = +25°C, unless otherwise noted. Specifications at TA = TMIN and TA = TMAX are guaranteed
by design and characterization. Typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
COMPARATOR OUTPUTS
Output High Voltage
VOH
VL = +2.375V to +5.5V, RPUP = 1kΩ
Output Low Voltage
VOL
VL = +2.375V to +5.5V, RPUP = 1kΩ
VL - 0.2
V
+0.4
V
High-Impedance-State
Leakage Current
±1
µA
High-Impedance-State
Output Capacitance
6.0
pF
DIGITAL OUTPUTS
Output High Voltage
VOH
IOUT = 1mA, VL = +2.375V to +5.5V,
relative to DGND
Output Low Voltage
VOL
IOUT = -1mA, VL = +2.375V to +5.5V,
relative to DGND
VCC
(Note 2)
+10
+12
VEE
(Note 2)
-15
-7
VL - 0.25
V
+0.2
V
+18
V
POWER SUPPLY
Positive Supply
Negative Supply
Total Supply Voltage
VCC - VEE (Note 10)
V
V
+5.5
V
Logic Supply
VL
Positive Supply Current
ICC
No load, clamps enabled
10.0
mA
Negative Supply Current
IEE
No load, clamps enabled
10.0
mA
IL
No load, all digital inputs at rails
Logic Supply Current
+2.375
-5
+30
1.2
mA
Analog Ground Current
IAGND
No load, clamps enabled
0.9
mA
Digital Ground Current
IDGND
No load, all digital inputs at rails
1.4
mA
Power-Supply Rejection
Ratio
PSRR
1MHz, measured at force output
20
60Hz, measured at force output
85
dB
_______________________________________________________________________________________
5
MAX9951/MAX9952
DC ELECTRICAL CHARACTERISTICS (continued)
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
AC ELECTRICAL CHARACTERISTICS
(VCC = +12V, VEE = -7V, VL = +3.3V, CCM = 120pF, CL = 100pF, TA = +25°C, unless otherwise noted. Specifications at TA = TMIN
and TA = TMAX are guaranteed by design and characterization. Typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
30
µs
55
µs
FORCE VOLTAGE (Notes 10, 11)
Settling Time
Range E, R_E = 500kΩ
150
Range D, R_D = 50kΩ
50
Range C, R_C = 5kΩ
20
Range B, R_B = 500Ω
20
Range A, R_A = 15.6Ω
25
FORCE VOLTAGE/MEASURE CURRENT (Notes 11, 12)
Settling Time
Range Change
Switching
Range E, R_E = 500kΩ
500
Range D, R_D = 50kΩ
100
Range C, R_C = 5kΩ
30
Range B, R_B = 500Ω
25
Range A, R_A = 15.6Ω
25
In addition to force-voltage and measure-current
settling times, range A to range B, R_A = 15.6Ω,
R_B = 500Ω
12
µs
FORCE CURRENT/MEASURE VOLTAGE (Notes 11, 12)
Settling Time
Range Change
Switching
Range E, R_E = 500kΩ
2500
Range D, R_D = 50kΩ
350
Range C, R_C = 5kΩ
30
60
µs
Range B, R_B = 500Ω
25
Range A, R_A = 15.6Ω
25
In addition to force-current and measure-voltage
settling times, range A to range B, R_A = 15.6Ω,
R_B = 500Ω
12
µs
0.2
µs
SENSE INPUT TO MEASURE OUTPUT PATH
Propagation Delay
CLMSR = 100pF
MEASURE OUTPUT
Maximum Stable Load
Capacitance
1000
pF
COMPARATORS (CLCOMP = 20pF, RPUP = 1kΩ)
Propagation Delay
50mV overdrive, 1VP-P, measured from inputthreshold zero crossing to 50% of output voltage
(Note 13)
75
ns
Rise Time
20% to 80%
60
ns
Fall Time
80% to 20%
5
ns
SERIAL PORT (VL = +3.3V, CDOUT = 10pF)
Serial Clock Frequency
fSCLK
SCLK Pulse-Width High
tCH
12
ns
SCLK Pulse-Width Low
tCL
12
ns
6
(Note 14)
20
_______________________________________________________________________________________
MHz
Dual Per-Pin Parametric
Measurement Units
(VCC = +12V, VEE = -7V, VL = +3.3V, CCM = 120pF, CL = 100pF, TA = +25°C, unless otherwise noted. Specifications at TA = TMIN
and TA = TMAX are guaranteed by design and characterization. Typical values are at TA = +25°C, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
SCLK Fall to DOUT Valid
tDO
CONDITIONS
MIN
TYP
MAX
UNITS
22
ns
CS Low to SCLK High
Setup
tCSS0
10
ns
SCLK High to CS High
Hold
tCSH1
22
ns
SCLK High to CS Low
Hold
tCSH0
0
ns
CS High to SCLK High
Setup
tCSS1
5
ns
DIN to SCLK High Setup
tDS
DIN to SCLK High Hold
tDH
(Note 13)
10
ns
0
ns
CS Pulse-Width High
tCSWH
10
ns
CS Pulse-Width Low
tCSWL
10
ns
LOAD Pulse-Width Low
tLDW
20
ns
VDD High to CS Low
(Power-Up)
(Note 13)
500
ns
Note 2: The device operates properly with different supply voltages with equally different voltage swings.
Note 3: Interpret errors expressed in terms of %FSR (percent of full-scale range) as a percentage of the end-point-to-end-point
range, i.e., for the ±64mA range, the full-scale range = 128mA, and a 1% error = 1.28mA.
Note 4: Case must be maintained ±5°C for linearity specifications.
Note 5: Tested in range C.
Note 6: Current linearity specifications are maintained to within 700mV of the clamp voltages when the clamps are enabled.
Note 7: Specified as the percent of full-scale range change at the output per volt change in the DUT voltage.
Note 8: VCLLO_ and VCLHI_ should differ by at least 700mV.
Note 9: The digital interface accepts +5V, +3.3V, and +2.5V CMOS logic levels. The voltage at VL adjusts the threshold.
Note 10: Guaranteed by design.
Note 11: Settling times are to 0.1% of FSR. Cx_ = 60pF.
Note 12: All settling times are specified using a single compensation capacitor (Cx_) across all current-sense resistors. Use an individual capacitor across each sense resistor for better performance across all current ranges, particularly the lower ranges.
Note 13: The propagation delay time is only guaranteed over the force-voltage output range. Propagation delay is measured by
holding VSENSE_ steady and transitioning THMAX_ or THMIN_.
Note 14: Maximum serial clock frequency may diminish at VL < +3.3V.
_______________________________________________________________________________________
7
MAX9951/MAX9952
AC ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VCC = +12V, VEE = -7V, CL = 100pF, CCM_ = 120pF, CCX_ = 60pF, RL to +2.5V, range A: R_A = 15.6Ω, RL = 70.3Ω; range B: R_B =
500Ω, RL = 2.25kΩ; range C: R_C = 5kΩ, RL = 22.5kΩ; range D: R_D = 50kΩ, RL = 225kΩ; range E: R_E = 500kΩ, RL = 2.25MΩ, TA
= +25°C.)
TRANSIENT RESPONSE
FVMI MODE, RANGES A, B, C
TRANSIENT RESPONSE
FVMI MODE, RANGE E
TRANSIENT RESPONSE
FVMI MODE, RANGE D
MAX9551 toc01
MAX9551 toc03
MAX9551 toc02
IN_
5V/div
IN_
5V/div
IN_
5V/div
0
0
0
FORCE_
5V/div
FORCE_
5V/div
FORCE_
5V/div
0
0
0
20μs/div
1ms/div
100μs/div
TRANSIENT RESPONSE
FVMV MODE, RANGE C
TRANSIENT RESPONSE
FIMI MODE, RANGE D
TRANSIENT RESPONSE
FIMI MODE, RANGES A, B, C
MAX9551 toc04
MAX9551 toc06
MAX9551 toc05
IN_
5V/div
IN_
5V/div
IN_
5V/div
0
0
0
FORCE_
5V/div
FORCE_
5V/div
FORCE_
5V/div
0
0
0
20μs/div
100μs/div
20μs/div
TRANSIENT RESPONSE
FIMI MODE, RANGE E
TRANSIENT RESPONSE
FIMI MODE, RANGE C
MAX9551 toc07
IOS vs. POWER SUPPLIES
MAX9551 toc08
IN_
5V/div
IN_
5V/div
0
0
FORCE_
5V/div
FORCE_
5V/div
0
0
MAX9951 toc09
20
VCC
15
VOLTAGE (V)
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
11.2
10
4.4
5
0
3.2
IOS (MAX)
IOS (MIN)
-5
VEE
-10
-15
2ms/div
8
1.8
-0.2
40μs/div
_______________________________________________________________________________________
-7
Dual Per-Pin Parametric
Measurement Units
PIN
MAX9951 MAX9952
NAME
FUNCTION
1
48
SENSEA
PMU-A Sense Input. A Kelvin connection to the DUT. Provides the feedback signal in FVMI
mode and the measured signal in FIMV mode for PMU-A.
2
47
FORCEA
PMU-A Driver Output. Forces a current or voltage to the DUT for PMU-A.
3
46
CCA
PMU-A Compensation Capacitor Connection. Provides compensation for the PMU-A main
amplifier. Connect a 120pF capacitor from CCA to CCOMA.
5, 15,
34, 44
5, 15,
34, 44
VEE
Negative Analog-Supply Input
4, 14,
35, 45
4, 14,
35, 45
VCC
Positive Analog-Supply Input
6
43
CCOMA
7
42
RAAS
8
41
RAA
Common Connection of CMA and CXA for PMU-A
PMU-A Range Setting Resistor-Sense Connection
PMU-A Range A Setting Resistor Connection
9
40
RAB
PMU-A Range B Setting Resistor Connection
10
39
RAC
PMU-A Range C Setting Resistor Connection
11
38
RAD
PMU-A Range D Setting Resistor Connection
12
37
RAE
PMU-A Range E Setting Resistor Connection
13
36
RAX
PMU-A Current-Range Sense-Resistor Connection. Connects to the external current range
sense resistor for PMU-A.
16
33
EXTSELA
17
32
DUTLA
PMU-A Window Comparator Lower Comparator Output. A high output indicates that the sensed
voltage at the window comparator is above VTHMINA. DUTLA is an open-drain output.
18
31
DUTHA
PMU-A Window Comparator Higher Comparator Output. A high output indicates that the
sensed voltage at the window comparator is below VTHMAXA. DUTHA is an open-drain output.
19
30
HI-ZA
20
29
INSELA
21
28
TEMP
Temperature Output. VTEMP = 10mV/°C. TDIE(°C) = (100)VTEMP - 273.
22
27
DGND
Digital Ground
23
26
VL
24
25
DOUT
25
24
DIN
26
23
LOAD
PMU-A External Current-Range Selector. Selects the external current range for PMU-A.
MSRA Tri-State Control Input. A logic-low places MSRA in a high-impedance state.
Input Select PMU-A. INSELA is a logic input that selects between IN0A and IN1A. Force
INSELA low to select IN0A. INSELA is OR’ed with control register bit INMODEA.
Logic-Supply Voltage Input. The voltage applied at VL sets the upper logic-voltage level.
Serial-Data Output. A standard SPI™-compatible output. Data appears at DOUT MSB first.
Serial-Data Input. Load data into DIN MSB first.
Serial-Port Load Input. A logic-low asynchronously loads data from the input registers into the
PMU registers.
SPI is a trademark of Motorola, Inc.
_______________________________________________________________________________________
9
MAX9951/MAX9952
Pin Description
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
Pin Description (continued)
PIN
MAX9951 MAX9952
10
NAME
FUNCTION
27
22
SCLK
28
21
CS
Serial-Clock Input. SCLK accepts external clock frequencies up to 20MHz.
29
20
INSELB
30
19
HI-ZB
31
18
DUTHB
PMU-B Window Comparator Higher Comparator Output. A high output indicates that the
sensed voltage at the window comparator is below VTHMAXB. DUTHB is an open-drain output.
32
17
DUTLB
PMU-B Window Comparator Lower Comparator Output. A high output indicates that the sensed
voltage at the window comparator is above VTHMINB. DUTLB is an open-drain output.
33
16
EXTSELB
36
13
RBX
37
12
RBE
PMU-B Range E Setting Resistor Connection
38
11
RBD
PMU-B Range D Setting Resistor Connection
39
10
RBC
PMU-B Range C Setting Resistor Connection
40
9
RBB
PMU-B Range B Setting Resistor Connection
41
8
RBA
PMU-B Range A Setting Resistor Connection
42
7
RBAS
43
6
CCOMB
46
3
CCB
47
2
FORCEB
PMU-B Driver Output. Forces a current or voltage to the DUT for PMU-B.
48
1
SENSEB
PMU-B Sense Input. A Kelvin connection to the DUT. Provides the feedback signal in FVMI
mode and the measured signal in FIMV mode for PMU-B.
49
64
THMAXB
PMU-B Window Comparator Upper Threshold Voltage Input. Sets the upper voltage threshold
for the PMU-B window comparator.
50
63
THMINB
PMU-B Window Comparator Lower Threshold Voltage Input. Sets the lower voltage threshold for
the PMU-B window comparator.
51
62
CLHIB
PMU-B Upper-Clamp Voltage Input. Sets the upper-clamp voltage level.
52
61
CLLOB
PMU-B Lower-Clamp Voltage Input. Sets the lower-clamp voltage level.
53
60
IN0B
Force-Threshold Current Input for PMU-B. Sets the forced voltage in FV mode or the forced
current in FI mode.
54
59
IN1B
Force-Threshold Voltage Input for PMU-B. Sets the forced voltage in FV mode or the forced
current in FI mode
Chip-Select Input. Force CS low to enable the serial interface.
Input Select PMU-B. INSELB is a logic input that selects between IN0B and IN1B. Force
INSELB low to select IN0B. INSELB is OR’ed with control register bit INMODEB.
MSRB Tri-State Control Input. A logic-low places MSRB in a high-impedance state.
PMU-B External Current-Range Selector. Selects the external current range for PMU-B.
PMU-B Current-Range Sense-Resistor Connection. Connects to the external current-range
sense resistor for PMU-B.
PMU-B Range A Setting Resistor-Sense Connection
Common Connection of CMB and CXB for PMU-B
PMU-B Compensation Capacitor Connection. Provides compensation for the PMU-B main
amplifier. Connect a 120pF capacitor from CCB to CCOMB.
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
PIN
MAX9951 MAX9952
NAME
55
58
MSRB
56
57
AGND
FUNCTION
PMU-B Measurement Output. Provides a voltage equal to the SENSE voltage in FIMV mode,
and provides a voltage proportional to the DUT current in FVMI mode for PMU-B. Force HI-ZB
low to place MSRB in a high-impedance state.
Analog Ground
Offset-Voltage Input. Sets an offset voltage for the internal current-sense amplifiers of both
channels.
57
56
IOS
58
55
MSRA
PMU-A Measurement Output. Provides a voltage equal to the SENSE voltage in FIMV mode,
and provides a voltage proportional to the DUT current in FVMI mode for PMU-A. Force HI-ZA
low to place MSRA in a high-impedance state.
59
54
IN1A
Force-Threshold Voltage Input for PMU-A. Sets the forced voltage in FV mode or the forced
current in FI mode.
60
53
IN0A
Force-Threshold Current Input for PMU-A. Sets the forced voltage in FV mode or the forced
current in FI mode.
61
52
CLLOA
PMU-A Lower-Clamp Voltage Input. Sets the lower-clamp voltage level.
62
51
CLHIA
PMU-A Upper-Clamp Voltage Input. Sets the upper-clamp voltage level.
63
50
THMINA
PMU-A Window Comparator Lower Threshold Voltage Input. Sets the lower voltage threshold for
the PMU-A window comparator.
64
49
THMAXA
PMU-A Window Comparator Upper Threshold Voltage Input. Sets the upper voltage threshold
for the PMU-A window comparator.
—
—
EP
Exposed Pad. Internally biased to VEE. Connect to a large ground plane or heatsink to
maximize thermal performance. Not intended as an electrical connection point.
______________________________________________________________________________________
11
MAX9951/MAX9952
Pin Description (continued)
Dual Per-Pin Parametric
Measurement Units
MAX9951/MAX9952
Functional Diagram
TO EXTERNAL CURRENT BOOSTER
FOR HIGHEST RANGE
CX_
RE
RD
RC
RB
RA
CM_
VCC
IN1_
IN0_
VEE
VL
CC_
CCOM_
EXTSEL_
R_X
R_E
R_D
R_C R_B
R_A
R_AS**
1
0
RANGE RESISTOR SELECT
FORCE_
OR
GATE
INSEL_
1.5MΩ
DGND
CLLO_
CLENABLE_
RS2_
RS1_
HI-ZFORCE_
INMODE_
RS0_
IOS
1
CLHI_
CS
0
SCLK
SERIAL
INTERFACE
LOAD
FMODE_
DIN
MMODE_
1.5MΩ
HI-ZMEAS_
VL
DISABLE_
DOUT
RFS*
10
TO OTHER PMU CHANNEL
1
HI-Z_
MSR_
0
SENSE_
THMAX_
DUTH_
MAX9951
MAX9952
DUTL_
THMIN_
AGND
DGND
*RFS INTERNAL TO MAX9951D/MAX9952D ONLY
12
**CONNECT R_AS AS CLOSE TO RESISTOR “RA” AS POSSIBLE
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
Serial Interface
The MAX9951/MAX9952 force or measure voltages in
the -2V to +7V through -7V to +13V ranges, dependent
upon the supply voltage range (VCC and VEE). These
devices also force or measure currents up to ±64mA,
with a lowest full-scale range of ±2µA. Use an external
buffer amplifier for current ranges greater than ±64mA.
MSR_ presents a voltage proportional to the measured
voltage or current. Place MSR_ in a low-leakage, highimpedance state by forcing HI-Z_ low. Integrated comparators with externally programmable voltage
thresholds provide “too low” (DUTL_) and “too high”
(DUTH_) voltage-monitoring outputs. Each comparator
output features a selectable high-impedance state. The
devices feature separate FORCE_ and SENSE_ connections and are fully protected against short circuits.
The FORCE_ output has two voltage clamps, negative
(CLLO_) and positive (CLHI_), to limit the voltage to
externally provided levels. Two control-voltage inputs,
selected independently of the PMU mode, allow for
greater flexibility.
The MAX9951/MAX9952 use a standard 3-wire
SPI/QSPI™/MICROWIRE™-compatible serial port.
Once the input data register fills, the data becomes
available at DOUT MSB first. This data output allows for
daisy-chaining multiple devices. Figures 1, 2, and 3
show the serial interface timing diagrams.
Serial Port Operation
The serial interface has two ranks (Figure 4). Each PMU
has an input register that loads from the serial port shift
register. Each PMU also has a PMU register that loads
from the input register. Data does not affect the PMU
until it reaches the PMU register. This register configuration permits loading of the PMU data into the input register at one time and then latching the input register data
into the PMU register later, at which time the PMU function changes accordingly. The register configuration also
provides the ability to change the state of the PMU asynchronously, with respect to the loading of that PMU’s
data into the serial port. Thus, the PMU easily updates
simultaneously with other PMUs or other devices.
CS
INPUT
REGISTER(S)
UPDATED
SCLK
DIN
DOUT
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
FIRST BIT FROM
PREVIOUS WRITE
Q0
LAST BIT FROM
PREVIOUS WRITE
LOAD
PMU REGISTERS
UPDATED
Figure 1. Serial Port Timing with Asynchronous Load
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
______________________________________________________________________________________
13
MAX9951/MAX9952
Detailed Description
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
CS
INPUT AND PMU
REGISTER(S)
UPDATED
SCLK
DIN
D15
DOUT
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
LAST BIT FROM
PREVIOUS WRITE
FIRST BIT FROM
PREVIOUS WRITE
LOAD
LOAD = 0
Figure 2. Serial Port Timing with Synchronous Load
tCH
SCLK
tCL
tCSSO
tCSS1
tCSH1
tCSHO
CS
tCSWH
tDH
tDS
DIN
DOUT
D15
D15last
D14
D14last
D13
D12
D11
D10
D13last
D12last
D11last
D10last
D1
D1last
D0
D0last
tDO
tLDW
LOAD
Figure 3. Detailed Serial Port Timing Diagram
14
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
CS
SCLK
DIN
SHIFT REGISTER /16
4
CONTROL
DECODE
DOUT
12
INPUT REGISTER A
INPUT REGISTER B
12
12
LOAD
PMU REGISTER A
PMU REGISTER B
12
12
TO PMUA
TO PMUB
Figure 4. Dual PMU Serial Port Block Diagram
Use LOAD to asynchronously load all input registers
into the PMU registers. If LOAD remains low when data
latches into an input register, the data also transfers to
the PMU register.
Bit Order
BIT
BIT NAME
0 (LSB)
INMODE
1
FMODE
2
MMODE
3
RS2
4
RS1
5
RS0
6
CLENABLE
7
HI-ZFORCE
8
HI-ZMSR
9
DISABLE
10
B2
11
B1
12
A2
13
A1
14
C2
15 (MSB)
C1
MAX9951/MAX9952
Table 1. Bit Assignments
Table 2. Address Bit
(BIT 12) (BIT 13)
A2
A1
OPERATION
The MAX9951/MAX9952 use the bit order, MSB first in
and first out. Table 1 shows bit asignments.
0
0
Do not update any input register (NOP).
0
1
Only update input register A.
PMU Control
1
0
Only update input register B.
1
1
Update both input registers with the same
data.
Programming both PMUs with the same data requires a
16-bit word. Programming each PMU with separate
data requires two 16-bit words.
The address bits specify which input registers the shiftregister loads. Table 2 describes the function of the
address bits.
Bits C1 and C2 specify how the data loads into the second rank PMU registers. These 2 control bits serve a
similar function as the LOAD input. The specified
actions occur when CS goes high, whereas the LOAD
input loads the PMU register at anytime. When either
C1 or C2 is low, the corresponding PMU register is
transparent. Table 3 describes the function of the 2
control bits.
The NOP operation requires A1 = A2 = C1 = C2 = 0. In
this case, the data transfers through the shift register
without changing the state of the device.
Table 3. Control Bit
(BIT 14) (BIT 15)
C2
C1
OPERATION
0
0
Data stays in input register.
0
1
Transfer PMU-A input register to PMU
register.
1
0
Transfer PMU-B input register to PMU
register.
1
1
Transfer both input registers to the PMU
registers.
______________________________________________________________________________________
15
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
C1 = C2 = 0 allows for data transfer from the shift register to the input register without transferring data to the
PMU register (unless LOAD is low). This permits the
latching of data into the PMU register at a later time by
LOAD or subsequent command. Table 4 summarizes
the possible control and address bit combinations.
When asynchronously latching only one PMU’s data,
the input register of the other PMU maintains the same
data. Therefore, loading both PMU registers would
update the one PMU with new data while the other PMU
remains in its current state.
Mode Selection
Four bits from the control word select between the various force-measure modes of operation. INMODE
selects between the two input analog control voltages.
FMODE selects whether the PMU forces a voltage or a
current. MMODE selects whether the DUT current or
DUT voltage is directed to MSR_. HI-ZFORCE places
the driver amplifier in a high-output-impedance state.
Table 5 describes the various force and measure
modes of operation.
Table 4. PMU Operation Using Control and Address Bits
16
BIT (12:13)
BIT (14:15)
A2
A1
C2
C1
0
0
0
0
0
0
0
1
Transfer PMU register A from input register A.
NOP.
0
0
1
0
NOP.
Transfer PMU register B from input register B.
0
0
1
1
Transfer PMU register A from input register A.
Transfer PMU register B from input register B.
0
1
0
0
Transfer input register A from shift register.
NOP.
0
1
0
1
Transfer input register A and PMU register A
from shift register.
NOP.
0
1
1
0
Transfer input register A from shift register.
Transfer PMU register B from input register B.
0
1
1
1
Transfer input register A and PMU register A
from shift register.
Transfer PMU register B from input register B.
1
0
0
0
NOP.
Transfer input register B from shift register.
1
0
0
1
Transfer PMU register A from input register A.
Transfer input register B from shift register.
1
0
1
0
NOP.
Transfer input register B and PMU register B
from shift register.
1
0
1
1
Transfer PMU register A from input register A.
Transfer input register B and PMU register B
from shift register.
1
1
0
0
Transfer input register A from shift register.
Transfer input register B from shift register.
1
1
0
1
Transfer input register A and PMU register A
from shift register.
Transfer input register B from shift register.
1
1
1
0
Transfer input register A from shift register.
Transfer input register B and PMU register B
from shift register.
1
1
1
1
Transfer input register A and PMU register A
from shift register.
Transfer input register B and PMU register B
from shift register.
PMU-A OPERATION
PMU-B OPERATION
NOP: data just passes through
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
(BIT 0)
IN MODE*
(BIT 1)
F MODE
(BIT 2)
M MODE
(BIT 7)
HI-ZFORCE
PMU MODE
FORCE
OUTPUT
MEASURE
OUTPUT
ACTIVE
INPUT
0
0
1
1
FVMI
Voltage
IDUT
VIN0
1
0
1
1
FVMI
Voltage
IDUT
VIN1
0
0
0
1
FVMV
Voltage
VDUT
VIN0
1
0
0
1
FVMV
Voltage
VDUT
VIN1
0
1
1
1
FIMI
Current
IDUT
VIN0
1
1
1
1
FIMI
Current
IDUT
VIN1
0
1
0
1
FIMV
Current
VDUT
VIN0
1
1
0
1
FIMV
Current
VDUT
VIN1
X
0
1
0
FNMI
(range E only)
HighImpedance
IDUT
X
X
0
0
0
FNMV
HighImpedance
VDUT
X
0
1
0
0
Termination
Voltage
VDUT
VIN0
1
1
0
0
Termination
Voltage
VDUT
VIN1
0
1
1
0
Termination
Voltage
IDUT
VIN0
1
1
1
0
Termination
Voltage
IDUT
VIN1
MAX9951/MAX9952
Table 5. PMU Force-Measure Mode Selection
*INSEL = 0
Table 6. Current-Range Selection
Clamp Enable
The CLENABLE bit enables the force-output-voltage
clamps when high and disables the clamps when low.
There is hysteresis equal to approximately 5% of the
current range for clamp when serial bit 11 is 1. For bit
11 = 0, no hysteresis, but clamp voltage is less accurate.
RANGE
NOMINAL
RESISTOR VALUE
(Ω)
X
±2µA
R_E = 500k
0
±20µA
R_D = 50k
Measure Output High-Impedance Control
1
1
±200µA
R_C = 5k
1
0
0
±2mA
R_B = 500
1
X
1
±64mA
R_A = 15.6
1
1
0
External
—
MSR_ attains a low-leakage, high-impedance state by
using the HI-ZMSR control bit, or the HI-Z_ input. HI-Z_ is
internally pulled up to VL with a 1.5MΩ resistor. The 2
bits are logically ANDed together to control the MSR_
output. HI-Z_ allows external multiplexing among several
PMU MSR_ outputs without using the serial interface.
Table 7 explains the various output modes for the MSR_
output.
(BIT 3)
RS2
(BIT 4)
RS1
(BIT 5)
RS0
0
0
0
1
0
Table 7. MSR_ Output Truth Table
(BIT 8) HI-ZMSR
HI-Z_
MSR_
1
1
Measure output enabled
0
1
High impedance
1
0
High impedance
0
0
High impedance
Current-Range Selection
Digital Output (DOUT)
The digital output follows the last output of the serialshift register and clocks out on the falling edge of
SCLK. DOUT serially shifts the first bit of the incoming
serial data word 16.5 clock cycles later. This allows for
daisy-chaining additional devices using DOUT and the
same clock.
Three bits from the control word, RS0, RS1, and RS2,
control the full-scale current range for either FI (force
current) or MI (measure current). Table 6 describes the
full-scale current-range control.
______________________________________________________________________________________
17
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
“Quick Load” Using Chip Select
If CS goes low and then returns high without any clock
activity, the data from the input registers latch into the
PMU registers. This extra function is not standard for
SPI/QSPI/MICROWIRE interfaces. The quick load mimics the function of LOAD without forcing LOAD low.
Comparators
Two comparators configured as a window comparator
monitor MSR_. THMAX_ and THMIN_ set the high and
low thresholds that determine the window. Both outputs are open drain and share a single disable control
that places the outputs in a high-impedance, low-leakage state. Table 8 describes the comparator output
states of the MAX9951/MAX9952.
Applications Information
In force-voltage (FV) mode, the voltage at FORCE_ is
directly proportional to the input control voltage. In
force-current (FI) mode, the current flowing out of
FORCE_ is proportional to the input control voltage.
Positive current flows out of the PMU.
In force-nothing (FN) mode, FORCE_ is high impedance.
In measure-current (MI) mode, the voltage at MSR_ is
directly proportional to the current exiting FORCE_.
Positive current flows out of the PMU.
In measure-voltage (MV) mode, the voltage at MSR_ is
directly proportional to the voltage at SENSE_.
Current-Sense-Amplifier
Offset-Voltage Input
and convert the sensed DUT current to the MSR_ output voltage (MI). When IOS equals zero relative to
DUTGND (the GND voltage at the DUT, which the levelsetting DACs and the ADC are presumed to use as a
ground reference), the nominal voltage range that corresponds to ±full-scale current is -4V to +4V. Any voltage applied to IOS adds directly to this control
input/measure output voltage range, i.e., applying +4V
to IOS forces the voltage range that corresponds to
±full-scale current from 0 to +8V.
The following equations determine the minimum and
maximum currents for each current range corresponding to the input voltage or measure voltage:
VMAXCURRENT = VIOS + 4V
VMINCURRENT = VIOS - 4V
Choose IOS so the limits of MSR_ do not go closer than
2.8V to either VEE or VCC. For example, with supplies of
+10V and -5V, limit the MSR_ output to -2.2V and
+7.2V. Therefore, set IOS between +1.8V and +3.2V.
MSR_ could clip if IOS is not within this range. Use
these general equations for the limits on IOS:
Minimum VIOS = VEE + 6.8V
Maximum VIOS = VCC - 6.8V
Current Booster for Highest Current Range
An external buffer amplifier can be used to provide a
current range greater than the MAX9951/MAX9952
maximum ±64mA output current (Figure 5). This function operates as follows:
IOS is a buffered input to the current-sense amplifiers.
The current-sense amplifiers convert the input control
voltage (IN0_ or IN1_) to the forced DUT current (FI),
REXT
RA
Table 8. Comparator Truth Table
RE
0
X
High-Z
High-Z
1
VMSR > VTHMAX and VTHMIN
0
1
1
VTHMAX > VMSR > VTHMIN
1
1
1
VTHMAX and VTHMIN > VMSR
1
0
1
VTHMIN > VMSR > VTHMAX*
0
0
CCOM_
VIN_
*VTHMAX > VTHMIN constitutes normal operation. This condition,
however, has VTHMIN > VTHMAX and does not cause any problems with the operation of the comparators.
EXTSEL_
50Ω
A
MAIN AMP
DUT
FORCE_
E
X
MAX9951
MAX9952
A
E
CURRENT- x4
SENSE AMP
MSR_
SENSE_
PMU
Figure 5. External Current Boost
18
R_E
DUTL
R_AS
DUTH
R_A
CONDITION
R_X
(BIT 9)
DISABLE
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
Voltage Clamps
The voltage clamps limit FORCE_ and operate over the
entire specified current range. Set the clamp voltages
externally at CLHI_ and CLLO_. The voltage at FORCE_
triggers the clamps independent of the voltage at
SENSE_. When enabled, the clamps function in FI
mode only. Use clamp voltages of 0.7V above and
below the FORCE_ voltage range to ensure proper
operation of the PMU.
Current Limit
The FORCE_ current-limiting circuitry, 92mA (maximum),
ensures a well-behaved MSR_ output for currents
between the full current range and the current limits. For
currents greater than the full-scale current, the MSR_
voltage is greater than +4V, and for currents less than
the full-scale current, the MSR_ voltage is less than -4V.
Additionally, serial interface bit B2 enables a range-sensitive current limit of 2.5 times the nominal current range.
Table 9 shows the current-limit operation.
Independent Control of the Feedback
Switch and the Measure Switch
Two single-pole-double-throw (SPDT) switches determine the mode of operation of the PMU. One switch
determines whether the sensed DUT current or DUT
voltage feeds back to the input, and thus determines
whether the MAX9951/MAX9952 force current or voltage. The other switch determines whether MSR_ senses the DUT current or DUT voltage.
Independent control of these switches and the HIZFORCE state permits flexible modes of operation
beyond the traditional force-voltage/measure-current
(FVMI) and force-current/measure-voltage (FIMV)
modes. The MAX9951/MAX9952 support the following
eight modes:
• FVMI
• FIMV
• FVMV
• FIMI
• FNMV
• FNMI (range E only)
• Terminate/Measure V
• Terminate/Measure I
Figure 6 shows the internal path structure for force-voltage/measure-current mode. In force-voltage/measurecurrent mode, the current across the appropriate
external sense resistor (R_A to R_E) provides a voltage
at MSR_. SENSE_ samples the voltage at the DUT and
feeds the buffered result back to the negative input of
the voltage amplifier. The voltage at MSR_ is proportional to the FORCE_ current in accordance with the following formula:
VMSR_ = IFORCE_ x RSENSE x 4
Figure 7 shows the internal path structure for the forcecurrent/measure-voltage mode. In force-current/measure-voltage mode, the appropriate external sense
resistor (R_A to R_E) provides a feedback voltage to
IN1_
RSENSE
FORCE_
DUT
Table 9. Current Limit
B2
(BIT 10)
AV = +4
FMODE
RANGE
CURRENT LIMIT
X
Any
0
65mA to 92mA
0
A
1
65mA to 92mA
0
B
1
5mA
0
C
1
500µA
0
D
1
50µA
0
E
1
5µA
SENSE_
DUTGND
MSR_
Figure 6. Force-Voltage/Measure-Current Functional Diagram
______________________________________________________________________________________
19
MAX9951/MAX9952
A digital output decoded from the range select bits,
EXTSEL_, indicates when to activate the booster.
CCOM_ serves as an input to an external buffer through
an internal 50Ω current-limit series resistor. Connect the
external buffer output to the external current-sense resistor, REXT, and to R_X. Connect the other side of R_X to
FORCE_. Ensure that the external switch is low leakage.
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
VDUT_
IN1_
RSENSE
VCC - 2.5V
FORCE_
VCC - 5V
DUT
AV = +4
IDUT_
SENSE_
DUTGND
VEE + 5V
MSR_
VEE + 2.5V
IMIN
Figure 7. Force-Current/Measure-Voltage Functional Diagram
the inverting input of the voltage amplifier. SENSE_
samples the voltage at the DUT and provides a
buffered result at MSR_.
High-Impedance States
The FORCE_, MSR_, and comparator outputs feature
individual high-impedance control that places them into
a high-impedance, low-leakage state. The high-impedance state allows busing of MSR_ and comparator outputs with other PMU measure and comparator outputs.
The FORCE_ output high-impedance state allows for
additional modes of operation as described in Table 5
and can eliminate the need for a series relay in some
applications.
The FORCE_, MSR_, and comparator outputs power up
in the high-impedance state.
Input Source Selection
Either one of two input signals, IN0_ or IN1_, can control both the forced voltage and the forced current. In
this case, the two input signals represent alternate forcing values that can be selected either with the serial
interface or INSEL_. Alternatively, each input signal can
be dedicated to control a single forcing function (i.e.,
voltage or current).
Short-Circuit Protection
FORCE_ and SENSE_ input can withstand a short to
any voltage between the supply rails.
20
IMAX
Figure 8. PMU Force-Output Capability
Mode and Range Change Transients
The MAX9951/MAX9952 feature make-before-break
switching to minimize glitches. The integrated voltage
clamps also reduce glitching at the output.
DUT Voltage Swing vs. DUT Current
and Power-Supply Voltages
Several factors limit the actual DUT voltage that the
PMU delivers:
• The overhead required by the device amplifiers and
other integrated circuitry; this is typically 2.5V from
each rail independent of load.
• The voltage drop across the current-range select
resistor and internal circuitry in series with the sense
resistor. At full current, the combined voltage drop is
typically 2.5V.
• Variations in the power supplies.
• Variation of DUT ground vs. PMU ground.
Neglecting the effects of the third and fourth items,
Figure 8 demonstrates the force-output capabilities of
the PMU. For zero DUT current, the DUT voltage swings
from (VEE + 2.5V) to (VCC - 2.5V). For larger positive DUT
currents, the positive swing drops off linearly until it
reaches (VCC - 5V) at full current. Similarly, for larger
negative DUT currents, the negative voltage swing drops
off linearly until it reaches (VEE + 5V) at full current.
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
Temperature Monitor
Each device supplies a single temperature output signal,
TEMP, that asserts a nominal output voltage of 2.98V at a
die temperature of +25°C (298K). The output voltage
increases proportionately with temperature at a rate of
10mV/°C. The temperature sensor output impedance is
15kΩ (typ). Determine the die temperature using:
TDIE = (100) x VTEMP - 273 [°C]
Settling Times and
Compensation Capacitors
The data in the Electrical Characteristics table reflects
the circuit shown in the Functional Diagram that
includes a single compensation capacitor (CX_) effectively across all the sense resistors. Placing individual
capacitors, CRA, CRB, CRC, CRD, and CRE directly
across the sense resistors, R_A, R_B, R_C, R_D, and
R_E, independently optimizes each range.
The combination of the capacitance across the sense
resistors, along with the main amplifier compensation
comparator, CM_, ensures stability into the maximum
expected load capacitance while optimizing settling
time for a given load.
Exposed Pad
The exposed pad is internally biased to VEE. Connect
to a large ground plane or heatsink to maximize thermal
performance. Not intended as an electrical connection
point. Leave EP electrically unconnected, or connect to
VEE. Do not connect EP to ground.
Selector Guide
PART
DESCRIPTION
MAX9951DCCB
Internal 10kΩ force-sense resistor
MAX9951FCCB
External force-sense resistor
MAX9952DCCB
Internal 10kΩ force-sense resistor
MAX9952FCCB
External force-sense resistor
Digital Inputs (SCLK, DIN, CS, and LOAD)
The digital inputs incorporate hysteresis to mitigate
issues with noise, as well as provide for compatibility
with opto-isolators that can have slow edges.
Chip Information
PROCESS: BiCMOS
______________________________________________________________________________________
21
MAX9951/MAX9952
Ground, DUT Ground, and IOS
The MAX9951/MAX9952 utilize two local grounds,
AGND (analog ground) and DGND (digital ground).
Connect AGND and DGND together on the PC board.
In a typical ATE system, the PMU force voltage is relative to DUT ground. In this case, reference the input
voltages IN0_ and IN1_ to DUT ground. Similarly, reference IOS to DUT ground. If it is not desired to offset the
current control and measure voltages, connect IOS to
DUT ground potential.
Reference the MSR_ output to DUT ground.
Dual Per-Pin Parametric
Measurement Units
THMINA
CLHIA
CLLOA
IN0A
IN1A
MSRA
IOS
AGND
MSRB
IN1B
IN0B
CLLOB
CLHIB
THMINB
THMAXB
TOP VIEW
THMAXA
MAX9951/MAX9952
Pin Configurations
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
SENSEA
1
48 SENSEB
FORCEA
2
47 FORCEB
CCA
3
46 CCB
VCC
4
45 VCC
VEE
5
44 VEE
CCOMA
6
43 CCOMB
RAAS
7
42 RBAS
RAA
8
RAB
41 RBA
MAX9951
9
40 RBB
RAC 10
39 RBC
RAD 11
38 RBD
RAE 12
37 RBE
RAX 13
36 RBX
*EP
VCC 14
35 VCC
VEE 15
34 VEE
33 EXTSELB
INSELA
TEMP
DGND
VL
26
27
28
29
30
31
32
DUTLB
HI-ZA
25
DUTHB
DUTHA
24
HI-ZB
23
INSELB
22
CS
21
SCLK
20
LOAD
19
DIN
18
DOUT
17
DUTLA
EXTSELA 16
TQFP-EPR
*EP = EXPOSED PAD.
22
______________________________________________________________________________________
Dual Per-Pin Parametric
Measurement Units
THMAXB
THMINB
CLHIB
CLLOB
IN0B
IN1B
MSRB
AGND
IOS
MSRA
IN1A
IN0A
CLLOA
CLHIA
THMINA
THMAXA
TOP VIEW
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
SENSEB
1
48 SENSEA
FORCEB
2
47 FORCEA
CCB
3
46 CCA
VCC
4
45 VCC
VEE
5
44 VEE
CCOMB
6
43 CCOMA
RBAS
7
42 RAAS
RBA
8
RBB
41 RAA
MAX9952
9
40 RAB
RBC 10
39 RAC
RBD 11
38 RAD
RBE 12
37 RAE
RBX 13
36 RAX
*EP
VCC 14
35 VCC
VEE 15
34 VEE
33 EXTSELA
20
21
22
23
24
25
26
27
28
29
DUTHB
HI-ZB
INSELB
CS
SCLK
LOAD
DIN
DOUT
VL
DGND
TEMP
INSELA
30
31
32
DUTLA
19
DUTHA
18
HI-ZA
17
DUTLB
EXTSELB 16
TQFP-EP
*EP = EXPOSED PAD.
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
64 TQFP-EPR
C64E-6
21-0084
64 TQFP-EP
C64E-9R
21-0162
______________________________________________________________________________________
23
MAX9951/MAX9952
Pin Configurations (continued)
MAX9951/MAX9952
Dual Per-Pin Parametric
Measurement Units
Revision History
REVISION
NUMBER
REVISION
DATE
4
10/09
DESCRIPTION
Corrected bit ordering in Figures 1, 2, and 3; updated Ordering Information;
added exposed pad information
PAGES
CHANGED
1, 11, 13, 14,
21, 22, 23
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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© 2009 Maxim Integrated Products
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