MC100LVELT20 Product Preview 3.3VLVTTL/LVCMOS to Differential LVPECL Translator http://onsemi.com Description The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only + 3.3 V and ground are required. The small outline SOIC−8 package and the single gate of the MC100LVELT20 makes it ideal for those applications where space, performance, and low power are at a premium. The 100 Series contains temperature compensation. Features • • • • • • 390 ps Typical Propagation Delay Maximum Input Clock Frequency > 0.8 GHz Typical Operating Range VCC = 3.0 V to 3.6 V with GND = 0 V PNP TTL Input for Minimal Loading Q Output will Default HIGH with Input Open Pb−Free Packages are Available MARKING DIAGRAM 8 8 1 SO−8 D SUFFIX CASE 751 A L Y W G 1 KVT20 ALYW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. P3 1 Publication Order Number: MC100LVELT20/D MC100LVELT20 Table 1. PIN DESCRIPTION NC Q Q 1 8 LVTTL 2 7 3 VCC Pin D 6 NC 5 GND Function Q, Q Differential PECL Outputs D LVTTL Input VCC Positive Supply GND Ground NC No Connect LVPECL NC 4 (Top View) Figure 1. 8−Lead Pinout and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 Flammability Rating Oxygen Index: 28 to 34 > 1.5 kV > 200 V > 2 kV Pb Pkg Pb−Free Pkg Level 1 Level 1 UL 94 V−0 @ 0.125 in Transistor Count 150 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit 6 V 6 V 50 100 mA mA VCC Power Supply GND = 0 V VI Input Voltage GND = 0 V Iout Output Current Continuous Surge TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W Tsol Wave Solder 265 265 °C Pb Pb−Free VI VCC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 MC100LVELT20 Table 4. LVTTL INPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V, TA = −40°C to +85°C Symbol Characteristic Min Typ Max Unit IIH Input HIGH Current (Vin = 2.7 V) 20 mA IIHH Input HIGH Current MAX (Vin = 6.0 V) 100 mA IIL Input LOW Current (Vin = 0.5 V) −0.6 mA VIK Input Clamp Voltage (Iin = −18 mA) −1.2 V VIH Input HIGH Voltage VIL Input LOW Voltage 2.0 V 0.8 V NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 5. 100LVELT PECL OUTPUT DC CHARACTERISTICS VCC = 3.3 V, GND = 0 V (Note 2) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 20 25 30 22 27 32 23 28 33 mA ICC Negative Power Supply Current VOH Output HIGH Voltage (Note 3) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 3) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Output parameters vary 1:1 with VCC. 3. All loading with 50 W to VCC − 2.0 V. Table 6. AC CHARACTERISTICS VCC = 3.0 V to 3.6 V, GND = 0 V (Note 4) −40°C Symbol Characteristic fmax Maximum Input Clock Frequency (Figure 2) tPLH, tPHL Propagation Delay to Output Differential tSKEW Device−to−Device Skew (Note 5) tJITTER Random Clock Jitter (RMS) (Figure 2) tr tf Output Rise/Fall Times (20% − 80%) Min Typ 600 800 280 350 25°C Max 430 Min Typ 600 800 300 370 250 Q, Q 70 <1 <2 100 225 85°C Max 450 Min Typ 600 800 320 400 250 80 <1 <2 120 225 90 Max Unit MHz 490 ps 250 ps <1 <2 ps 140 225 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Measured using a LVTTL source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. 5. Skew is measured between outputs under identical transitions. http://onsemi.com 3 MC100LVELT20 9 900 Amplitude 8 700 7 600 6 500 5 400 4 300 3 200 2 100 0 1 Jitter 0 200 400 600 RANDOM CLOCK JITTER (ps RMS) OUTPUT VOLTAGE AMPLITUDE (mV) 800 800 1000 INPUT CLOCK FREQUENCY (MHz) Figure 2. Output Voltage Amplitude (VOUTpp)/RMS Jitter vs. Input Clock Frequency at Ambient Temperature Zo = 50 W Q D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Package Shipping † SOIC−8 98 Units / Rail MC100LVELT20DG SOIC−8 (Pb−Free) 98 Units / Rail MC100LVELT20DR2 SOIC−8 2500 / Tape & Reel SOIC−8 (Pb−Free) 2500 / Tape & Reel Device MC100LVELT20D MC100LVELT20DR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 MC100LVELT20 Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 5 MC100LVELT20 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AH −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 1 0.25 (0.010) M Y M 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− H 0.10 (0.004) D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8 _ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC100LVELT20 ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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