LTM8023 2A, 36V DC/DC µModule FEATURES DESCRIPTION n The LTM®8023 is a complete 2A, DC/DC step-down power supply. Included in the package are the switching controller, power switches, inductor, and all support components. Operating over an input voltage range of 3.6V to 36V, the LTM8023 supports an output voltage range of 0.8V to 10V, and a switching frequency range of 200kHz to 2.4MHz, each set by a single resistor. Only the bulk input and output filter capacitors are needed to finish the design. n n n n n n n n Complete Step-Down Switch Mode Power Supply Wide Input Voltage Range: 3.6V to 36V 2A Output Current 0.8V to 10V Output Voltage Selectable Switching Frequency: 200kHz to 2.4MHz Current Mode Control (e4) RoHS Compliant Package with Gold Pad Finish Programmable Soft-Start Tiny, Low Profile (11.25mm × 9mm × 2.82mm) Surface Mount LGA Package The LTM8023 is packaged in a thermally enhanced, compact (11.25mm × 9mm) and low profile (2.82mm) over-molded Land Grid Array (LGA) package suitable for automated assembly by standard surface mount equipment. The LTM8023 is RoHS compliant. APPLICATIONS n n n n n The low profile package (2.82mm) enables utilization of unused space on the bottom of PC boards for high density point of load regulation. Automotive Battery Regulation Power for Portable Products Distributed Supply Regulation Industrial Supplies Wall Transformer Regulation L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. μModule is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 5.5VIN to 36VIN, 3.3V/2A DC/DC μModule™ Converter VIN* 5.5V TO 36V VIN VOUT AUX 2.2μF RUN/SS 2.2μF 90 1.8 85 1.6 1.4 80 EFFICIENCY (%) ADJ 1.2 75 1.0 70 0.8 65 0.6 60 GND SYNC 0.4 VIN = 12V VOUT = 3.3V f = 650 kHz 55 8023 TA01 49.9k 154k 50 0.01 *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS POWER LOSS (mW) PGOOD RT VOUT 3.3V 2A BIAS LTM8023 SELECTABLE OPERATING FREQUENCY Efficiency and Power Loss 0.1 1 LOAD CURRENT (A) 0.2 0 10 8023 TA01b 8023fb 1 LTM8023 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) VIN, RUN/SS Voltage .................................................40V ADJ, RT, SHARE Voltage .............................................5V VOUT, AUX .................................................................10V PGOOD, SYNC ..........................................................30V BIAS ..........................................................................16V VIN + BIAS .................................................................56V Internal Operating Temperature (Note 2)..................................................–40°C to 125°C Storage Temperature.............................. –55°C to 125°C Solder Temperature............................................... 250°C TOP VIEW BANK 3 7 6 5 4 3 BANK 2 BANK 1 2 1 A B C D E F G H LGA Package 50-Lead (11.25mm s 9mm s 2.82mm) TJMAX = 125°C, θJA = 24°C/W θJA DERIVED FROM 6.6cm × 5cm PCB WITH 4 LAYERS WEIGHT = 0.93g (SEE TABLE 3 PIN ASSIGNMENT) ORDER INFORMATION LEAD FREE FINISH PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE (Note 2) LTM8023EV#PBF LTM8023V 50-Lead (11.25mm × 9mm × 2.82mm) –40°C to 85°C LTM8023IV#PBF LTM8023V 50-Lead (11.25mm × 9mm × 2.82mm) –40°C to 85°C LTM8023MPV#PBF LTM8023MPV 50-Lead (11.25mm × 9mm × 2.82mm) –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ 8023fb 2 LTM8023 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, RT = 60.4k, COUT = 4.7μF unless otherwise specified. SYMBOL PARAMETER VIN Input DC Voltage VOUT Output DC Voltage 0A < IOUT ≤ 2A, RADJ Open, COUT = 51μF (Note 3) 0A < IOUT ≤ 2A, RADJ = 43.2k, COUT = 51μF (Note 3) RADJ(MIN) Minimum Allowable RADJ (Note 4) IOUT Continuous Output DC Current 4 ≤ VIN ≤ 36, COUT = 51μF IQVIN VIN Quiescent Current VRUN/SS = 0.2V, RT = 174k VBIAS = 3V, Not Switching, RT = 174k (E, I) VBIAS = 3V, Not Switching, RT = 174k (MP) VBIAS = 0V, Not Switching, RT = 174k l l IQBIAS BIAS Quiescent Current VRUN/SS = 0.2V, RT = 174k VBIAS = 3V, Not Switching, RT = 174k (E, I) VBIAS = 3V, Not Switching, RT = 174k (MP) VBIAS = 0V, Not Switching, RT = 174k l l ΔVOUT/VOUT Line Regulation 5 ≤ VIN ≤ 36, IOUT = 1A, VOUT = 3.3V, COUT = 51μF 0.1 ΔVOUT/VOUT Load Regulation VIN = 24V, 0 ≤ IOUT ≤ 2A, VOUT = 3.3V, COUT = 51μF 0.4 % VIN = 24V, IOUT = 2A, VOUT = 3.3V, COUT = 51μF 10 mV VOUT(AC_RMS) Output Ripple (RMS) CONDITIONS MIN l TYP 3.6 MAX UNITS 36 V 0.8 10 V V 42.2 kΩ 0 2 A 0.1 25 25 85 0.5 60 350 120 μA μA μA μA 0.03 50 50 1 0.5 120 200 5 μA μA μA μA % fSW Switching Frequency RT = 113k, COUT = 51μF 325 kHz ISC(OUT) Output Short Circuit Current VIN = 36V, VOUT = 0V 2.9 A VADJ Voltage at ADJ Pin COUT = 51μF VBIAS(MIN) Minimum BIAS Voltage for Proper Operation IADJ Current Out of ADJ Pin ADJ = 1V, COUT = 51μF 2 IRUN/SS RUN/SS Pin Current VRUN/SS = 2.5V 5 VIH(RUN/SS) RUN/SS Input High Voltage COUT = 51μF VIL(RUN/SS) RUN/SS Input Low Voltage COUT = 51μF VPG(TH) PG Threshold VOUT Rising IPGO PG Leakage VPG = 30V IPGSINK PG Sink Current VPG = 0.4V 200 VSYNCIL SYNC Input Low Threshold fSYNC = 550kHz, COUT = 51μF 0.5 VSYNCIH SYNC Input High Threshold fSYNC = 550kHz, COUT = 51μF ISYNCBIAS SYNC Pin Bias Current VSYNC = 0V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM8023E is guaranteed to meet performance specifications from 0°C to 85°C ambient. Specifications over the full –40°C to 85°C ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM8023I is guaranteed to meet specifications over the full –40°C to 85°C ambient operating temperature range. The LTM8023MP is guaranteed to meet specifications over the full –55°C to 125°C temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. l 765 790 805 mV 2.3 2.8 V 10 μA μA 2.5 V 0.2 730 0.1 V mV 1 800 μA μA V 0.7 0.1 V μA Note 3: COUT = 51μF is composed of a 4.7μF ceramic capacitor in parallel with a 47μF electrolytic. Note 4: Guaranteed by design. 8023fb 3 LTM8023 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency (8VOUT) Efficiency (5VOUT) 100 90 VOUT = 5V VOUT = 3.3V 85 85 80 80 80 70 60 50 40 EFFICIENCY (%) 90 EFFICIENCY (%) EFFICIENCY (%) Efficiency (3.3VOUT) 90 VOUT = 8V 75 70 65 60 12VIN 24VIN 36VIN 30 20 0.01 0.1 OUTPUT CURRENT (A) 55 50 0.01 1 70 65 0.1 OUTPUT CURRENT (A) 5VIN 12VIN 24VIN 36VIN 55 50 0.01 1 0.1 OUTPUT CURRENT (A) 8023 G02 Minimum Required Input Voltage vs Output Voltage 20 75 60 12VIN 24VIN 36VIN 8023 G01 1 8023 G03 36VIN Start-Up Waveforms (5VOUT) 36VIN Start-Up Waveforms (3.3VOUT) IOUT = 2A 18 16 INPUT VOLTAGE (V) TA = 25°C unless otherwise noted 14 OPERATING FREQUENCY AS RECOMMENDED IN TABLE 1 12 10 VOUT 2V/DIV IIN 0.2A/DIV VOUT 2V/DIV IIN 0.2A/DIV RUN/SS 5V/DIV RUN/SS 5V/DIV VIN = 36V IOUT = 2A VBIAS = 3V 8 6 50μs/DIV 8023 G05 VIN = 36V IOUT = 2A VBIAS = 3V 50μs/DIV 8023 G06 4 2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 8023 G04 Input Current vs Output Current Input Current vs Output Current VOUT = 5V VOUT = 8V 1400 800 600 400 12VIN 24VIN 36VIN 200 0 0 500 1000 1500 OUTPUT CURRENT (mA) 2000 8023 G07 1600 INPUT CURRENT (mA) 1000 VOUT = 3.3V 1800 1000 1200 INPUT CURRENT (mA) INPUT CURRENT (mA) Input Current vs Output Current 2000 1200 1600 800 12VIN 24VIN 36VIN 600 400 1400 1200 5VIN 12VIN 24VIN 36VIN 1000 800 600 400 200 200 0 0 0 500 1000 1500 OUTPUT CURRENT (mA) 2000 8023 G08 0 500 1000 1500 OUTPUT CURRENT (mA) 2000 8023 G09 8023fb 4 LTM8023 TYPICAL PERFORMANCE CHARACTERISTICS Output Short-Circuit Current vs Input Voltage Maximum Load Current vs Input Voltage (8VOUT) BIAS Current vs Load Current 30 3200 3000 2500 25 2600 2400 2200 2000 LOAD CURRENT (mA) 2800 BIAS CURRENT (mA) OUTPUT CURRENT (mA) TA = 25°C unless otherwise noted 20 3.3VOUT 5VOUT 8VOUT 15 10 2000 1500 1000 500 5 1800 0 0 1600 0 10 20 30 INPUT VOLTAGE (V) 0 40 500 1000 1500 LOAD CURRENT (mA) 2500 2500 2000 2000 1500 1000 500 0 20 30 INPUT VOLTAGE (V) 1500 1000 25°C 40°C 85°C 0 40 0 10 20 30 INPUT VOLTAGE (V) 8023 G14 3.3VOUT Junction Temperature vs Load 8VOUT Junction Temperature vs Load 80 60 45 30 25 20 15 10 12VIN 24VIN 36VIN 5 0 0 500 1000 1500 CURRENT (mA) 2000 2500 8023 G16 TEMPERATURE RISE (°C) TEMPERATURE RISE (°C) TEMPERATURE RISE (°C) 70 50 40 40 8023 G15 5VOUT Junction Temperature vs Load 50 40 8023 G13 500 25°C 40°C 85°C 35 20 30 INPUT VOLTAGE (V) Load Current vs Input Voltage (3.3VOUT) LOAD CURRENT (mA) LOAD CURRENT (mA) 10 8023 G11 Load Current vs Input Voltage (5VOUT) 10 0 2000 8023 G10 0 25°C 40°C 85°C 40 30 20 12VIN 24VIN 36VIN 10 0 0 500 1000 1500 CURRENT (mA) 2000 2500 8023 G17 60 50 40 30 20 16VIN 24VIN 36VIN 10 0 0 500 1000 1500 CURRENT (mA) 2000 2500 8023 G18 8023fb 5 LTM8023 PIN FUNCTIONS VIN (Bank 1): The VIN pin supplies current to the LTM8023’s internal regulator and to the internal power switch. This pin must be locally bypassed with an external, low ESR capacitor of at least 2.2μF. VOUT (Bank 2): Power Output Pins. Apply the output filter capacitor and the output load between these pins and GND pins. AUX (Pin F5): Low Current Voltage Source for BIAS. In many designs, the BIAS pin is simply connected to VOUT. The VAUX pin is internally connected to VOUT and is placed adjacent to the BIAS pin to ease printed circuit board routing. Although this pin is internally connected to VOUT, do NOT connect this pin to the load. If this pin is not tied to BIAS, leave it floating. BIAS (Pin G5): The BIAS pin connects to the internal power bus. Connect to a power source greater than 2.8V. If the output is greater than 2.8V, connect this pin there. If the output voltage is less, connect this to a voltage source between 2.8V and 16V. Also, make sure that BIAS + VIN is less than 56V. RUN/SS (Pin H5): Tie RUN/SS pin to ground to shut down the LTM8023. Tie to 2.5V or more for normal operation. If the shutdown feature is not used, tie this pin to the VIN pin. RUN/SS also provides a soft-start function; see the Applications Information section. RT (Pin G7): The RT pin is used to program the switching frequency of the LTM8023 by connecting a resistor from this pin to ground. The Applications Information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. Minimize capacitance at this pin. SHARE (Pin F7): Tie this to the SHARE pin of another LTM8023 when paralleling the outputs. Otherwise, do not connect. SYNC (Pin G6): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to a stable voltage source greater than 0.7V to disable Burst Mode operation. Do not leave this pin floating. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1μs. See synchronizing section in Applications Information. PGOOD (Pin H6): The PGOOD pin is the open-collector output of an internal comparator. PG remains low until the ADJ pin is within 10% of the final regulation voltage. PG output is valid when VIN is above 3.6V and RUN/SS is high. If this function is not used, leave this pin floating. ADJ (Pin H7): The LTM8023 regulates its ADJ pin to 0.79V. Connect the adjust resistor from this pin to ground. The value of RADJ is given by the equation RADJ = 394.21/(VOUT – 0.79), where RADJ is in k. GND (Bank 3): Tie these GND pins to a local ground plane below the LTM8023 and the circuit components. Return the feedback divider (RADJ) to this net. 8023fb 6 LTM8023 BLOCK DIAGRAM VIN VOUT 4.7μH 0.1μF 4.7pF 499k 10μF AUX BIAS SHARE RUN/SS PGOOD CURRENT MODE CONTROLLER SYNC GND RT ADJ 8023 BD 8023fb 7 LTM8023 OPERATION The LTM8023 is a stand-alone nonisolated step-down switching DC/DC power supply. It can deliver up to 2A of DC output current with only bulk external input and output capacitors. This module provides a precisely regulated output voltage programmable via one external resistor from 0.8VDC to 10VDC. The input voltage range is 3.6V to 36V. Given that the LTM8023 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. A simplified Block Diagram is given on the previous page. The LTM8023 contains a current mode controller, power switching element, power inductor, power Schottky diode and a modest amount of input and output capacitance. The LTM8023 is a fixed frequency PWM regulator. The switching frequency is set by simply connecting the appropriate resistor value from the RT pin to GND. An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the VIN pin, but if the BIAS pin is connected to an external voltage higher than 2.8V, bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. The RUN/SS pin is used to place the LTM8023 in shutdown, disconnecting the output and reducing the input current to less than 1μA. To further optimize efficiency, the LTM8023 automatically switches to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50μA in a typical application. The oscillator reduces the LTM8023’s operating frequency when the voltage at the ADJ pin is low. This frequency foldback helps to control the output current during start-up and overload. The LTM8023 contains a power good comparator which trips when the ADJ pin is at 92% of its regulated value. The PG output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. Power good is valid when the LTM8023 is enabled and VIN is above 3.6V. APPLICATIONS INFORMATION For most applications, the design process is straight forward, summarized as follows: 1. Look at Table 1 and find the row that has the desired input range and output voltage. 2. Apply the recommended CIN, COUT, RADJ and RT values. 3. Connect BIAS as indicated. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Capacitor Selection Considerations The CIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Ceramic capacitors are small, robust and have very low ESR. However, not all ceramic capacitors are suitable. X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. 8023fb 8 LTM8023 APPLICATIONS INFORMATION Table 1. Recommended Compoment Values and Configuration (TA = 25°C, IOUT = 2A) VIN VOUT CIN COUT RADJ BIAS fOPTIMAL (kHz) RT(OPTIMAL) fMAX (kHz) RT(MIN) 3.6V to 36V 0.82V 10μF 200μF 1206 13M ≥2.8V, <16V 250 150k 250 150k 3.6V to 36V 1.00V 10μF 147μF 1206 1.87M ≥2.8V, <16V 300 124k 300 124k 3.6V to 36V 1.20V 10μF 100μF 1206 953k ≥2.8V, <16V 350 105k 350 105k 3.6V to 36V 1.50V 10μF 100μF 1206 549k ≥2.8V, <16V 400 88.7k 400 88.7k 3.6V to 36V 1.80V 4.7μF 100μF 1206 383k ≥2.8V, <16V 450 79k 450 79k 3.6V to 36V 2.00V 2.2μF 68μF 1206 324k ≥2.8V, <16V 450 79k 500 69.8k 3.6V to 36V 2.20V 2.2μF 47μF 1206 274k ≥2.8V, <16V 500 69.8k 550 61.9k 4.1V to 36V 2.50V 2.2μF 47μF 1206 226k ≥2.8V, <16V 550 61.9k 615 54.9k 5.5V to 36V 3.30V 2.2μF 22μF 1206 154k AUX 650 49.9k 750 42.2k 7.5V to 36V 5.00V 2.2μF 10μF 0805 93.1k AUX 650 49.9k 890 34.8k 3.6V to 15V 0.82V 10μF 200μF 1206 13M VIN 350 105k 650 49.9k 3.6V to 15V 1.00V 10μF 147μF 1206 1.87M VIN 400 88.7k 725 43.2k 3.6V to 15V 1.20V 10μF 100μF 1206 953k VIN 450 79k 800 39.2k 3.6V to 15V 1.50V 10μF 100μF 1206 549k VIN 450 79k 1000 29.4k 3.6V to 15V 1.80V 4.7μF 100μF 1206 383k VIN 450 79k 1100 26.7k 3.6V to 15V 2.00V 2.2μF 68μF 1206 324k VIN 450 79k 1200 23.7k 3.6V to 15V 2.20V 2.2μF 47μF 1206 274k VIN 500 69.8k 1300 21.0k 3.6V to 15V 2.50V 2.2μF 47μF 1206 226k VIN 550 61.9k 1450 18.2k 5.5V to 15V 3.30V 2.2μF 22μF 1206 154k AUX 650 49.9k 1400 19.6k 7.5V to 15V 5.00V 2.2μF 10μF 0805 93.1k AUX 650 49.9k 1200 23.7k 9V to 24V 0.82V 10μF 200μF 1206 13M ≥2.8V, <16V 250 150k 250 150k 9V to 24V 1.00V 10μF 147μF 1206 1.87M ≥2.8V, <16V 300 124k 450 79k 9V to 24V 1.20V 2.2μF 100μF 1206 953k ≥2.8V, <16V 450 79k 500 69.8k 9V to 24V 1.50V 2.2μF 100μF 1206 549k ≥2.8V, <16V 450 79k 615 54.9k 9V to 24V 1.80V 2.2μF 100μF 1206 383k ≥2.8V, <16V 450 79k 700 44.2k 9V to 24V 2.00V 2.2μF 68μF 1206 324k ≥2.8V, <16V 450 79k 750 42.2k 9V to 24V 2.20V 2.2μF 47μF 1206 274k ≥2.8V, <16V 500 69.8k 800 39.2k 9V to 24V 2.50V 2.2μF 47μF 1206 226k ≥2.8V, <16V 550 61.9k 890 34.8k 9V to 24V 3.30V 2.2μF 22μF 1206 154k AUX 650 49.9k 1150 25.5k 9V to 24V 5.00V 2.2μF 10μF 0805 93.1k AUX 650 49.9k 1000 29.4k 14.5V to 24V 8.00V 2.2μF 10μF 0805 53.6k AUX 650 49.9k 800 39.2k 18V to 36V 0.82V 10μF 200μF 1206 13M ≥2.8V, <16V 250 150k 250 150k 18V to 36V 1.00V 10μF 147μF 1206 1.87M ≥2.8V, <16V 300 124k 300 124k 18V to 36V 1.20V 2.2μF 100μF 1206 953k ≥2.8V, <16V 350 105k 350 105k 18V to 36V 1.50V 2.2μF 100μF 1206 549k ≥2.8V, <16V 400 88.7k 400 88.7k 18V to 36V 1.80V 2.2μF 100μF 1206 383k ≥2.8V, <16V 450 79k 450 79k 18V to 36V 2.00V 2.2μF 68μF 1206 324k ≥2.8V, <16V 450 79k 500 69.8k 18V to 36V 2.20V 2.2μF 47μF 1206 274k ≥2.8V, <16V 450 79k 550 61.9k 18V to 36V 2.50V 2.2μF 47μF 1206 226k ≥2.8V, <16V 500 69.8k 615 54.9k 18V to 36V 3.30V 2.2μF 22μF 1206 154k AUX 650 49.9k 750 42.2k 18V to 36V 5.00V 2.2μF 10μF 0805 93.1k AUX 800 39.2k 890 34.8k 18V to 36V 8.00V 2.2μF 10μF 0805 53.6k AUX 650 49.9k 800 39.2k 20V to 36V 10.00V 2.2μF 10μF 0805 42.2k AUX 615 54.9k 750 42.2k 4.75V to 32V –3.30V 2.2μF 22μF 1206 154k AUX 550 61.9k 800 39.2k 7V to 31V –5.00V 2.2μF 10μF 0805 93.1k AUX 800 39.2k 1100 26.7k 15V to 28V –8.00V 2.2μF 10μF 0805 53.6k AUX 800 39.2k 1600 15.8k 8023fb 9 LTM8023 APPLICATIONS INFORMATION Ceramic capacitors are also piezoelectric. In Burst Mode operation, the LTM8023’s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. Since the LTM8023 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. The input capacitor can be a parallel combination of a 2.2μF ceramic capacitor and a low cost electrolytic capacitor. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8023. A ceramic input capacitor combined with trace or cable inductance forms a high Q (under damped) tank circuit. If the LTM8023 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation is easily avoided; see the Hot-Plugging Safely section. Frequency Selection The LTM8023 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to 2.4MHz by using a resistor tied from the RT pin to ground. Table 2 provides a list of RT resistor values and their resultant frequencies. Table 2. Switching Frequency vs RT Value SWITCHING FREQUENCY (MHz) RT VALUE (kΩ) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 187 121 88.7 68.1 56.2 46.4 40.2 34 29.4 23.7 19.1 16.2 13.3 11.5 9.76 8.66 Operating Frequency Tradeoffs It is recommended that the user apply the optimal RT value given in Table 1 for the input and output operating condition. System level or other considerations, however, may necessitate another operating frequency. While the LTM8023 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. A frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8023 if the output is overloaded or short circuited. A frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. The maximum frequency (and attendant RT value) at which the LTM8023 should be allowed to switch is given in Table 1 in the f(MAX) column, while the recommended frequency (and RT value) for optimal efficiency over the given input condition is given in the fOPTIMAL column. There are additional conditions that must be satisfied if the synchronization function is used. Please refer to the Synchronization section for details. BIAS Pin Considerations The BIAS pin is used to provide drive power for the internal power switching stage and operate internal circuitry. For proper operation, it must be powered by at least 2.8V. If the output voltage is programmed to be 2.8V or higher, simply tie BIAS to VOUT. If VOUT is less than 2.8V, BIAS can be tied to VIN or some other voltage source. In all cases, ensure that the maximum voltage at the BIAS pin is both less than 16V and the sum of VIN and BIAS is less than 56V. If BIAS power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the LTM8023. Load Sharing Two or more LTM8023’s may be paralleled to produce higher currents. To do this, tie the VIN, ADJ, VOUT and SHARE pins of all the paralleled LTM8023’s together. To ensure 8023fb 10 LTM8023 APPLICATIONS INFORMATION that paralleled modules start up together, the RUN/SS pins may be tied together, as well. If the RUN/SS pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. An example of two LTM8023 modules configured for load sharing is given in the Typical Applications section. 6.0 INPUT VOLTAGE (V) 5.5 Burst Mode Operation Minimum Input Voltage The LTM8023 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. In addition, the input voltage required to turn on is higher than that required to run, and depends upon whether the RUN/SS is used. As shown in Figure 2, it takes only about 3.5VIN for the LTM8023 to run a 3.3V output at light load. If RUN/SS is pulled up to VIN, it takes 5.5VIN to start. If the LTM8023 is enabled via the RUN/SS pin, the minimum voltage to start at light loads is lower, about 4.5V. A similar curve for 5VOUT operation is also provided in Figure 2. 4.5 RUN/SS ENABLED 4.0 3.5 To enhance efficiency at light loads, the LTM8023 automatically switches to Burst Mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LTM8023 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. In addition, VIN and BIAS quiescent currents are reduced to typically 20μA and 50μA respectively during the sleep time. As the load current decreases towards a no load condition, the percentage of time that the LTM8023 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency. Burst Mode operation is enabled by tying SYNC to GND. To disable Burst Mode operation, tie SYNC to a stable voltage above 0.7V. Do not leave the SYNC pin floating. TO START 5.0 VOUT = 3.3V TA = 25°C f = 650kHz TO RUN 3.0 0 500 1000 1500 LOAD CURRENT (mA) 2000 7.5 INPUT VOLTAGE (V) 7.0 6.5 TO START 6.0 RUN/SS ENABLED 5.5 VOUT = 5V TA = 25°C f = 650kHz TO RUN 5.0 0 500 1000 1500 2000 LOAD CURRENT (mA) 8023 F02 Figure 2. The LTM8023 Needs More Voltage to Start Than to Run The RUN/SS pin is driven through an external RC filter to create a voltage ramp at this pin. Figure 3 shows the start-up and shutdown waveforms with the soft-start circuit. By choosing an appropriate RC time constant, IL 1A/DIV RUN 15k RUN/SS 0.22μF VRUN/SS 2V/DIV GND VOUT 2V/DIV Soft-Start The RUN/SS pin can be used to soft-start the LTM8023, reducing the maximum input current during start-up. 2ms/DIV 8023 F03 Figure 3. To Soft-Start the LTM8023, Add a Resistor and Capacitor to the RUN/SS Pin 8023fb 11 LTM8023 APPLICATIONS INFORMATION the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. Choose the value of the resistor so that it can supply at least 20μA when the RUN/SS pin reaches 2.5V. VIN VIN RUN/SS The LTM8023 will not enter Burst Mode operation while synchronized to an external clock, but will instead skip pulses to maintain regulation. Shorted Input Protection Care needs to be taken in systems where the output will be held high when the input to the LTM8023 is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode OR-ed with the LTM8023’s output. If the VIN pin is allowed to float and the SHDN pin is held high (either by a logic signal or because it is tied to VIN), then the LTM8023’s internal circuitry will pull its quiescent current through its internal power switch. This is fine if your system can tolerate a few milliamps in this state. If you ground the SHDN pin, the SW pin current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, then parasitic diodes inside the LTM8023 can pull large currents from the output through the VIN pin. Figure 4 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. VOUT AUX LTM8023 Synchronization The internal oscillator of the LTM8023 can be synchronized by applying an external 250kHz to 2MHz clock to the SYNC pin. Do not leave this pin floating. The resistor tied from the RT pin to ground should be chosen such that the LTM8023 oscillates 20% lower than the intended synchronization frequency (see the Frequency Selection section). VOUT RT SYNC GND BIAS ADJ 8023 F04 Figure 4. The Input Diode Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LTM8023 Runs Only When the Input is Present. high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See Figure 5 for a suggested layout. Ensure that the grounding and heatsinking are acceptable. A few rules to keep in mind are: 1. Place the RADJ and RT resistors as close as possible to their respective pins. 2. Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8023. 3. Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8023. GND RT RADJ SHARE SYNC PGOOD RUN/SS AUX BIAS PCB Layout Most of the headaches associated with PCB layout have been alleviated or even eliminated by the high level of integration of the LTM8023. The LTM8023 is nevertheless a switching power supply, and care must be taken to minimize EMI and ensure proper operation. Even with the VOUT COUT CIN VIN 8023 F05 Figure 5. Layout Showing Suggested External Components, GND Plane and Thermal Vias 8023fb 12 LTM8023 APPLICATIONS INFORMATION 4. Place the CIN and COUT capacitors such that their ground current flow directly adjacent or underneath the LTM8023. 5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8023. 6. Use vias to connect the GND copper area to the boards internal ground plane. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8023. However, these capacitors can cause problems if the LTM8023 is plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8023 can ring to twice the nominal input voltage, possibly exceeding the LTM8023’s rating and damaging the part. If the input supply is poorly controlled or the user will be plugging the LTM8023 into an energized supply, the input network should be designed to prevent this overshoot. Figure 6 shows the waveforms that result when an LTM8023 circuit is connected to a 24V supply through six feet of 24-gauge twisted pair. The first plot is the response with a 2.2μF ceramic capacitor at the input. The input voltage rings as high as 35V and the input current peaks at 20A. One method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. In Figure 6b an aluminum electrolytic capacitor has been added. This capacitor’s high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. An alternative solution is shown in Figure 6c. A 0.7Ω resistor is added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). A 0.1μF capacitor improves high frequency filtering. This solution is smaller and less expensive than the electrolytic capacitor. For high input voltages its impact on efficiency is minor, reducing efficiency less than one-half percent for a 5V output at full load operating from 24V. Thermal Considerations The LTM8023 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The derating curves given in the Typical Performance Characteristics section can be used as a guide. These curves were generated by a LTM8023 mounted to a 33cm2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions. The die temperature of the LTM8023 must be lower than the maximum rating of 125°C, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8023. To estimate the junction temperature, approximate the power dissipation within the LTM8023 by applying the typical efficiency stated in this data sheet to the desired output power, or, if you have an actual module, by taking a power measurement. Then calculate the temperature rise of the LTM8023 junction above the surface of the printed circuit board by multiplying the module’s power dissipation by the thermal resistance. The actual thermal resistance of the LTM8023 to the printed circuit board depends upon the layout of the circuit board, but the thermal resistance given with the Pin Configuration, which is based upon a 33cm2 4-layer FR4 PC board, can be used a guide. Finally, be aware that at high ambient temperatures the internal Schottky diode will have significant leakage current (see Typical Performance Characteristics) increasing the quiescent current of the LTM8023. 8023fb 13 LTM8023 APPLICATIONS INFORMATION CLOSING SWITCH SIMULATES HOT PLUG IIN VIN DANGER VIN 20V/DIV RINGING VIN MAY EXCEED ABSOLUTE MAXIMUM RATING LTM8023 + 4.7μF LOW IMPEDANCE ENERGIZED 24V SUPPLY IIN 10A/DIV STRAY INDUCTANCE DUE TO 6 FEET (2 METERS) OF TWISTED PAIR 20μs/DIV (6a) 0.7Ω LTM8023 VIN 20V/DIV + 0.1μF 4.7μF IIN 10A/DIV (6b) LTM8023 + 22μF 35V AI.EI. 20μs/DIV VIN 20V/DIV + 4.7μF IIN 10A/DIV (6c) 20μs/DIV 8023 F06 Figure 6. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures Reliable Operation When the LTM8023 is Connected to a Live Supply 8023fb 14 LTM8023 TYPICAL APPLICATIONS 0.82V Step-Down Converter VIN* 3.6V TO 15V VIN VOUT BIAS 10μF 200μF VOUT 0.82V 2A RUN/SS AUX LTM8023 SHARE PGOOD ADJ RT GND SYNC 8023 TA02 105k 13M *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS 1.8V Step-Down Converter VIN* 3.6V TO 15V VIN VOUT BIAS 4.7μF 100μF VOUT 1.8V 2A RUN/SS AUX LTM8023 SHARE PGOOD ADJ RT GND SYNC 8023 TA03 79k 383k *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS 8023fb 15 LTM8023 TYPICAL APPLICATIONS 2.5V Step-Down Converter VIN* 4.5V TO 36VDC VIN VOUT 2.2μF 47μF VOUT 2.5V 2A RUN/SS SHARE AUX LTM8023 3.3V BIAS PGOOD ADJ RT GND SYNC 8023 TA04 61.9k 226k *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS 5V Step-Down Converter VIN* 7.5V TO 36VDC VIN VOUT RUN/SS BIAS AUX 2.2μF 10μF VOUT 5V 2A LTM8023 SHARE PGOOD ADJ RT GND SYNC 8023 TA05 49.9k 93.1k *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS 8023fb 16 LTM8023 TYPICAL APPLICATIONS –5V Positive to Negative Converter VIN* 7V TO 31V VIN –5V Positive to Negative Converter Load Current vs Input Voltage VOUT 2500 AUX RUN/SS BIAS LOAD CURRENT (mA) 2000 LTM8023 SHARE 2.2μF PGOOD 10μF ADJ RT 1500 1000 500 GND SYNC 8023 TA06 39.2k 93.1k 0 –5V 0 *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS 10 20 30 INPUT VOLTAGE (V) 40 8023 TA06b Two LTM8023’s in Parallel, 3.3V at 4A VIN* 6.5V TO 36V VIN VOUT RUN/SS BIAS AUX VOUT 3.3V 4A LTM8023 SHARE PGOOD ADJ 2.2μF RT SYNC GND 49.9k 76.8k VIN VOUT RUN/SS BIAS AUX 2.2k 47μF LTM8023 SHARE 2.2μF PGOOD ADJ 0.22μF RT SYNC GND 8023 TA08 49.9k *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS 8023fb 17 000 3.810 2.540 1.270 0.3175 0.3175 1.270 2.540 SUGGESTED PCB LAYOUT TOP VIEW 1.905 PACKAGE TOP VIEW 0.000 3.175 X 9.00 BSC Y aaa Z 2.45 – 2.55 DETAIL A MOLD CAP 0.27 – 0.37 SUBSTRATE DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR A MARKED FEATURE 4 SYMBOL TOLERANCE aaa 0.15 bbb 0.10 6. THE TOTAL NUMBER OF PADS: 50 5. PRIMARY DATUM -Z- IS SEATING PLANE LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020 3 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 TRAY PIN 1 BEVEL PADS SEE NOTES 1.27 BSC 0.605 – 0.665 7.62 BSC NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 DETAIL A PACKAGE SIDE VIEW 2.72 – 2.92 (Reference LTC DWG # 05-08-1804 Rev B) bbb Z aaa Z 3.810 4 0.635 PAD 1 CORNER 4.445 11.25 BSC 0.635 0.9525 0.635 0.3175 Z 18 1.905 LGA Package 50-Lead (11.25mm × 9.00mm × 2.82mm) H G E D C B A LGA 50 0507 REV B PACKAGE IN TRAY LOADING ORIENTATION LTMXXXXXX MModule PACKAGE BOTTOM VIEW F 8.89 BSC 0.605 – 0.665 1 2 3 4 5 6 7 C(0.30) PAD 1 LTM8023 PACKAGE DESCRIPTION 8023fb 4.445 3.175 LTM8023 PACKAGE DESCRIPTION Table 3. Pin Assignment (Sorted by Pin Number) PIN SIGNAL DESCRIPTION PIN SIGNAL DESCRIPTION A1 VOUT D5 GND A2 VOUT D6 GND A3 VOUT D7 GND A4 VOUT E1 GND A5 GND E2 GND A6 GND E3 GND A7 GND E4 GND B1 VOUT E5 GND B2 VOUT E6 GND B3 VOUT E7 GND B4 VOUT F5 AUX B5 GND F6 GND B6 GND F7 SHARE B7 GND G1 VIN C1 VOUT G2 VIN C2 VOUT G3 VIN C3 VOUT G5 BIAS C4 VOUT G6 SYNC C5 GND G7 RT C6 GND H1 VIN C7 GND H2 VIN D1 GND H3 VIN D2 GND H5 RUN/SS D3 GND H6 PGOOD D4 GND H7 ADJ 8023fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTM8023 TYPICAL APPLICATION VIN* 5.5V TO 36V VIN VOUT RUN/SS BIAS AUX VOUT 3.3V 2A LTM8023 2.2μF 22μF SHARE ADJ RT GND SYNC 8023 TA07 49.9k 154k *RUNNING VOLTAGE RANGE. PLEASE REFER TO APPLICATIONS INFORMATION FOR START-UP DETAILS RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTM4600/LTM4602 10A and 6A DC/DC μModule Pin Compatible, 4.5V ≤ VIN ≤ 28V, 15mm × 15mm × 2.8mm LGA Package LTM4601/LTM4603 12A and 6A DC/DC μModule Pin Compatible; Remote Sensing; PLL, Tracking and Margining, 4.5V ≤ VIN ≤ 28V LTM4604 4A, Low VIN DC/DC μModule 2.375V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, 9mm × 15mm × 2.3mm LGA Package LTM8020 200mA, 36V DC/DC μModule 4V ≤ VIN ≤ 36V, 1.25V ≤ VOUT ≤ 5V, 6.25mm × 6.25mm × 2.32mm LGA Package LTM8022 1A, 36V DC/DC μModule 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.82mm LGA Package 8023fb 20 Linear Technology Corporation LT 1008 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007