SUTEX HV214FG 250v low charge injection 8-channel high voltage analog switch Datasheet

HV214
HV214
Initial Release
250V Low Charge Injection
8-Channel High Voltage Analog Switch
Features
General Description
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The Supertex HV214 is a low charge injection 8-channel high
voltage analog switch integrated circuit (IC) intended for use in
applications requiring high voltage switching controlled by low
voltage control signals, such as medical ultrasound imaging,
piezoelectric transducer drivers, inkjet printer heads and optical
MEMS modules.
HVCMOS® technology for high performance
Very low quiescent power dissipation – 10µA
Low parasitic capacitances
DC to 10MHz analog signal frequency
-60dB typical output off isolation at 5MHz
CMOS logic circuitry for low power
Excellent noise immunity
On-chip shift register, latch and clear logic circuitry
Flexible high voltage supplies
Surface mount package available
Input data is shifted into an 8-bit shift register that can then be
retained in an 8-bit latch. To reduce any possible clock feedthrough
noise, the latch enable bar should be left high until all bits are
clocked in. Data are clocked in during the rising edge of the clock.
Using HVCMOS® technology, this device combines high voltage
bilateral DMOS switches and low power CMOS logic to provide
efficient control of high voltage analog signals.
Applications
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Medical ultrasound imaging
Piezoelectric transducer drivers
Inkjet printer heads
Optical MEMS modules
The device is suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +40V/-210V, +125V/-125V, +210V/-40V.
Block
Diagram
LATCHES
LEVEL
SHIFTERS
OUTPUT
SWITCHES
DIN
D
LE
CL
SW0
CLK
D
LE
CL
SW1
D
LE
CL
SW2
D
LE
CL
SW3
D
LE
CL
SW4
D
LE
CL
SW5
D
LE
CL
SW6
D
LE
CL
SW7
8 BIT
SHIFT
REGISTER
DOUT
VNN VPP
CL
VDD
LE
07/26/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1
HV214
Ordering Information
Package Options
VPP – VNN
250V
28-lead plastic
chip carrier
48-lead TQFP
Die
HV214FG
HV214X
HV214PJ
Electrical Characteristics
Symbol
Parameter
DC Electrical Characteristics
RONS
Min
Units
Conditions
RONL
Large signal switch on-resistance
ISOL
Switch off leakage per switch
55
ISIG=5.0mA
49
ISIG=200mA
42
Small signal switch on-resistance
Small signal switch on-resistance
INNQ
Max
(TA=25° C, over recommended operating conditions unless otherwise noted)
∆RONS
IPPQ
Typ
36
Ω
ISIG=5.0mA
ISIG=200mA
38
ISIG=5.0mA
32
ISIG=200mA
20
VPP = +40V,
VNN = -210V
VPP = +125V,
VNN = -125V
VPP = +210V,
VNN = -40V
%
ISIG = 5mA, VPP = +125V, VNN = -125V
Ω
VSIG = VPP-10V, ISIG = 1A
10
µA
VSIG = VPP-10V and VNN+10V
DC offset switch off
300
mV
RLOAD = 100KΩ
DC offset switch on
500
mV
RLOAD = 100KΩ
Quiescent VPP supply current
50
µA
All switches off
-50
µA
All switches off
All switches on, ISW = 5mA
23
Quiescent VNN supply current
IPPQ
Quiescent VPP supply current
50
µA
IPPQ
Quiescent VNN supply current
-50
µA
All switches on, ISW = 5mA
Switch output peak current
2.0
A
VSIG duty cycle 0.1%
Output switch frequency
50
KHz
fSW
IPP
Average VPP supply current
7.0
VPP=+40V, VNN=-210V
5.0
VPP=+125V, VNN=-125V
5.0
VPP=+210V, VNN=-40V
-7.0
INN
Average VNN supply current
Duty cycle = 50%
mA
VPP=+40V, VNN=-210V
-5.0
VPP=+125V, VNN=-125V
-5.0
VPP=+210V, VNN=-40V
All output switches
are turning On and
Off at 50Khz with
no load.
IDDQ
Quiescent VDD supply current
10
µA
IDD
Average VDD supply Current
4.0
mA
fCLK = 5MHz, VDD = 5.0V
ISOR
Data out source current
0.45
mA
VOUT = VDD-0.7V
ISINK
Data out sink current
0.45
mA
VOUT = 0.7V
CIN
Logic input capacitance
TA
Ambient temperature range
0
2
10
pF
70
°C
HV214
Electrical Characteristics
Symbol
Parameter
AC Electrical Characteristics
Min
Typ
Max
Units
Conditions
(VDD=5V, TA=25° C, over recommended operating conditions unless otherwise noted)
tSD
Set up time before LE* Rises
150
ns
tWLE
Time width of LE*
150
ns
tDO
Clock delay time to data out
tWCL
Time width of CL
150
tSU
Set up time data to clock
15
tH
Hold time data from Clock
35
fCLK
Clock frequency
5.0
MHz
tR, tF
Clock rise and fall times
50
ns
TON
Turn on time
5.0
µs
VSIG = VPP-10V, RLOAD =10kΩ
TOFF
Turn off time
5.0
µs
VSIG = VPP-10V, RLOAD =10kΩ
150
ns
ns
8.0
ns
ns
20
dv/dt
Maximum VSIG slew rate
20
VPP = +40V, VNN = -210V
V/ns
20
-30
KO
Off isolation
KCR
Switch crosstalk
IID
Output switch isolation diode current
CSG(OFF)
Off capacitance SW to Gnd
5.0
CSG(ON)
On capacitance SW to Gnd
25
-60
300
mA
300ns pulse width, 2.0% duty cycle
12
17
pF
0V, f = 1MHz
38
50
pF
0V, f = 1MHz
mV
VPP = +40V, VNN = -210V, RLOAD = 50Ω
mV
VPP = +125V, VNN = -125V, RLOAD = 50Ω
mV
VPP = +210V, VNN = -40V, RLOAD = 50Ω
-VSPK
200
-VSPK
200
200
+VSPK
200
-VSPK
200
Absolute Maximum Ratings*
VDD Logic power supply voltage
-0.5V to +15V
VPP - VNN Supply voltage
260V
VPP Positive high voltage supply
-0.5V to VNN +250V
VNN Negative high voltage supply
Logic input voltages
+0.5V to -260V
-0.5V to VDD +0.3V
Analog Signal Range
VNN to VPP
Peak analog signal current/channel
Storage temperature
Power dissipation
2.5A
-65°C to +150°C
28-pin PLCC
48 lead TQFP
1.2W
1.0W
* Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability.
3
f = 5.0MHz, 50Ω load
f = 5.0MHz, 50Ω load
200
Output Voltage Spike
f = 5.0MHz, 1KΩ/15pF load
dB
+VSPK
+VSPK
VPP = +125V, VNN = -125V
VPP = +210V, VNN = -40V
dB
-58
50% duty cycle, fDATA = fCLK/2
HV214
Operating Conditions
Symbol
Parameter
Value
VDD
Logic power supply voltage
4.5V to 13.2V
VPP
Positive high voltage supply
40V to VNN+ 250V
VNN
Negative high voltage supply
-40V to -210V
VIH
High-level input voltage
VDD -1.5V to VDD
VIL
Low-level input voltage
0V to 1.5V
Analog signal voltage peak to peak
VNN +10V to VPP -10V
Operating free air-temperature
0°C to 70°C
VSIG
TA
Power Up/Down Sequence:
1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.
2 VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transistion.
3 Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec.
Truth Table
D0
D1
D2
D3
D4
D5
D6
D7
LE
CL
SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
OFF
ON
L
H
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
HOLD PREVIOUS STATE
OFF OFF OFF OFF OFF OFF OFF OFF
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L→ H transition CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift
register data flows through the latch.
4. DOUT is high when switch 7 is on.
5. Shift register clocking has no effect on the switch states if LE is H.
6. The clear input overrides all other inputs.
4
HV214
Logic Timing Waveforms
DN
DN–1
DATA
IN
50%
LE
50%
DN+1
50%
50%
t WLE
t SD
50%
CLOCK
50%
t SU
th
t DO
DATA
OUT
50%
t OFF
OFF
V
OUT
(TYP)
ON
CLR
t ON
90%
10%
50%
50%
t WCL
Block Diagram
LATCHES
LEVEL
SHIFTERS
OUTPUT
SWITCHES
DIN
D
LE
CL
SW0
CLK
D
LE
CL
SW1
D
LE
CL
SW2
D
LE
CL
SW3
D
LE
CL
SW4
D
LE
CL
SW5
D
LE
CL
SW6
D
LE
CL
SW7
8 BIT
SHIFT
REGISTER
DOUT
VNN VPP
CL
VDD
LE
5
HV214
Test Circuits
VPP –10V
VPP –10
RL
ISOL
10KΩ
VOUT
VOUT
100KΩ
VNN +10
VPP
VPP
VDD
VNN
VNN
GND
5V
RL
VPP
VPP
VDD
VNN
VNN
GND
5V
VPP
VPP
VDD
VNN
VNN
GND
TON /TOFF Test Circuit
DC Offset ON/OFF
Switch OFF Leakage
5V
VIN = 10 VP–P
@5MHz
VIN = 10 VP–P
@5MHz
VSIG
IID
VOUT
50Ω
NC
VNN
RL
50Ω
VPP
VPP
VDD
VNN
VNN
GND
KO = 20Log
5V
VPP
VPP
VDD
VNN
VNN
GND
5V
VPP
VPP
VDD
VNN
VNN
GND
VOUT
VIN
KCR = 20Log
OFF Isolation
Isolation Diode Current
Crosstalk
+VSPK
∆VOUT
VOUT
VOUT
–VSPK
1000pF
50Ω
VSIG
1KΩ
VPP
VPP
VDD
VNN
VNN
GND
5V
RL
VPP
VPP
VDD
VNN
VNN
GND
Q = 1000pF x ∆VOUT
Charge Injection
Output Voltage Spike
6
VOUT
VIN
5V
5V
HV214
Pin Configurations
HV214 28 Pin J-Lead
Pin Function
1
SW3
2
SW3
3
SW2
4
SW2
5
SW1
6
SW1
7
SW0
8
SW0
9
N/C
10
VPP
11
N/C
12
VNN
13
GND
14
VDD
Package Outlines
25
Pin
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Function
N/C
DIN
CLK
LE
CL
DOUT
SW7
SW7
SW6
SW6
SW5
SW5
SW4
SW4
24
23
22
21
20
19
26
18
HV202,
HV203
27
17
28
16
1
15
2
14
3
13
4
12
5
6
7
8
9
10
11
top view
28-pin J-Lead Package
Pin Configurations
Pin
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Function
VNN
N/C
N/C
GND
VDD
N/C
N/C
N/C
DIN
CLK
LE
CLR
DOUT
N/C
SW7
N/C
SW7
N/C
SW6
N/C
SW6
N/C
SW5
N/C
Pin 1
HV202
HV214
Pin #1
HV214 48-Pin TQFP
Pin Function
1
SW5
2
N/C
3
SW4
4
N/C
5
SW4
6
N/C
7
N/C
8
SW3
9
N/C
10
SW3
11
N/C
12
SW2
13
N/C
14
SW2
15
N/C
16
SW1
17
N/C
18
SW1
19
N/C
20
SW0
21
N/C
22
SW0
23
N/C
24
VPP
Package Outlines
Pin 12
top view
48-pin TQFP
07/26/02rev.2b
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
7
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
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