FQAF34N20L June 2000 QFET TM FQAF34N20L 200V LOGIC N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supply, motor control. • • • • • • • 23A, 200V, RDS(on) = 0.075Ω @VGS = 10 V Low gate charge ( typical 55 nC) Low Crss ( typical 52 pF) Fast switching 100% avalanche tested Improved dv/dt capability Low level gate drive requirement allowing direct opration from logic drivers D ! " ! " " " G! G D S Absolute Maximum Ratings Symbol VDSS ID TO-3PF ! FQAF Series S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQAF34N20L 200 Units V 23 A - Continuous (TC = 100°C) IDM Drain Current - Pulsed (Note 1) 14.5 A 92 A ± 20 V 640 mJ VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 23 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 9.5 5.5 95 0.76 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient ©2000 Fairchild Semiconductor International Typ -- Max 1.32 Units °C/W -- 40 °C/W Rev. A, June 2000 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 200 -- -- V -- 0.16 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C VDS = 200 V, VGS = 0 V -- -- 1 µA VDS = 160 V, TC = 125°C -- -- 10 µA Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA Gate Threshold Voltage VDS = VGS, ID = 250 µA 1.0 -- 2.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 11.5 A VGS = 5 V, ID = 11.5 A -- 0.057 0.060 0.075 0.080 Ω gFS Forward Transconductance VDS = 30 V, ID = 11.5 A -- 38 -- S -- 3000 3900 pF -- 400 520 pF -- 52 67 pF ns IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 100 V, ID = 34 A, RG = 25 Ω (Note 4, 5) VDS = 160 V, ID = 34 A, VGS = 5 V (Note 4, 5) -- 45 100 -- 520 1050 ns -- 170 350 ns -- 370 750 ns -- 55 72 nC -- 9.9 -- nC -- 27 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 23 A ISM -- -- 92 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 23 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time -- 205 -- ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 34 A, dIF / dt = 100 A/µs -- 1.1 -- µC (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.8mH, IAS = 23A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 34A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2000 Fairchild Semiconductor International Rev. A, June 2000 FQAF34N20L Electrical Characteristics VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V ID , Drain Current [A] ID, Drain Current [A] Top : 1 10 1 10 150℃ 0 10 25℃ -55℃ ※ Notes : 1. 250μs Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 30V 2. 250μs Pulse Test -1 0 10 -1 10 0 10 1 10 0 10 2 4 6 8 10 VGS , Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.25 IDR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 0.20 VGS = 5V 0.15 VGS = 10V 0.10 0.05 1 10 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μs Pulse Test ※ Note : TJ = 25℃ -1 0.00 0 30 60 90 120 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VSD, Source-Drain voltage [V] ID, Drain Current [A] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 7000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 6300 10 5600 Ciss 4200 3500 2800 Coss ※ Notes : 2100 1. VGS = 0 V 2. f = 1 MHz 1400 Crss 700 VGS, Gate-Source Voltage [V] VDS = 40V 4900 Capacitance [pF] FQAF34N20L Typical Characteristics VDS = 100V 8 VDS = 160V 6 4 2 ※ Note : ID = 34 A 0 -1 10 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International 0 20 40 60 80 100 120 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, June 2000 (Continued) 2.5 1.2 2.0 1.1 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage FQAF34N20L Typical Characteristics 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μA 0.9 0.8 -100 -50 0 50 100 150 1.5 1.0 0.5 ※ Notes : 1. VGS = 10 V 2. ID = 17 A 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 25 Operation in This Area is Limited by R DS(on) 2 20 100 µs ID, Drain Current [A] ID, Drain Current [A] 10 1 ms 1 10 10 ms DC 0 10 ※ Notes : 15 10 5 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -1 10 0 1 10 0 25 2 10 10 50 100 125 150 Figure 10. Maximum Drain Current vs. Case Temperature 0 D = 0 .5 ※ N o te s : 1 . Z θ J C( t) = 1 .3 2 ℃ /W M a x . 2 . D u ty F a c to r , D = t1 /t2 3 . T JM - T C = P D M * Z θ J C( t) 0 .2 0 .1 10 -1 0 .0 5 PDM 0 .0 2 θ JC ( t) , T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] t1 Z 0 .0 1 t2 s in g le p u ls e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2000 Fairchild Semiconductor International Rev. A, June 2000 FQAF34N20L Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 5V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2000 Fairchild Semiconductor International ID (t) VDS (t) VDD tp Time Rev. A, June 2000 FQAF34N20L Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2000 Fairchild Semiconductor International Rev. A, June 2000 TO-3PF 4.50 ±0.20 5.50 ±0.20 15.50 ±0.20 3.00 ±0.20 ø3.60 ±0.20 ° 2.00 ±0.20 2.00 ±0.20 2.00 ±0.20 22.00 ±0.20 1.50 ±0.20 16.50 ±0.20 2.50 ±0.20 0.85 ±0.03 23.00 ±0.20 10 10.00 ±0.20 (1.50) 2.00 ±0.20 14.50 ±0.20 16.50 ±0.20 2.00 ±0.20 4.00 ±0.20 3.30 ±0.20 +0.20 0.75 –0.10 2.00 ±0.20 3.30 ±0.20 5.45TYP [5.45 ±0.30] ©2000 Fairchild Semiconductor International 5.45TYP [5.45 ±0.30] +0.20 0.90 –0.10 5.50 ±0.20 26.50 ±0.20 14.80 ±0.20 FQAF34N20L Package Dimensions Rev. A, June 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. F1