LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 LM4140 High Precision Low Noise Low Dropout Voltage Reference Check for Samples: LM4140 FEATURES 1 • • • 2 • • • • • • • High Initial Accuracy: 0.1% Ultra Low Noise Low Temperature Coefficient: 3 ppm/°C (A grade) Low Voltage Operation: 1.8V Low Dropout Voltage: 20 mV (typ) @ 1mA Supply Current: 230 μA (typ), ≤ 1 μA Disable Mode Enable Pin Output Voltage Options: 1.024V, 1.250V, 2.048V, 2.500V, and 4.096V Custom Voltages from 0.5V to 4.5V Temperature Range (0°C to 70°C) APPLICATIONS SUMMARY • • • • • • • • • Portable, Battery Powered Equipment Instrumentation and Test Equipment Automotive Industrial Process Control Data Acquisition Systems Medical Equipment Precision Scales Servo Systems Battery Charging DESCRIPTION The LM4140 series of precision references are designed to combine high accuracy, low drift and noise with low power dissipation in a small package. The LM4140 is the industry's first reference with output voltage options lower than the bandgap voltage. The key to the advance performance of the LM4140 is the use of EEPROM registers and CMOS DACs for temperature coefficient curvature correction and trimming of the output voltage accuracy of the device during the final production testing. The major advantage of this method is the much higher resolution available with DACs than is available economically with most methods utilized by other bandgap references. The low input and dropout voltage, low supply current and output drive capability of the LM4140 makes this product an ideal choice for battery powered and portable applications. The LM4140 is available in three grades (A, B, C) with 0.1% initial accuracy and 3, 6 and 10 ppm/°C temperature coefficients. For even lower Tempco, contact Texas Instruments. The device performance is specified over the temperature range (0°C to +70°C) and is available in compact 8-pin package. For other output voltage options from 0.5V to 4.5V, contact Texas Instruments. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2013, Texas Instruments Incorporated LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com Typical Application COUT, Output bypass capacitor. See text for selection detail. Figure 1. Figure 2. Typical Temperature Coefficient (Sample of 5 Parts) Connection Diagram Figure 3. 8-Lead Surface Mount Package Number D0008A Top View PIN DESCRIPTIONS Vref (Pin 6): Reference Output. Capable of sourcing up to 8mA. Input (Pin 2): Positive Supply. Ground (Pins 1, 4, 7, 8): Negative Supply or Ground Connection. These pins must be connected to ground. Enable (Pin 3): Pulled to input for normal operation. Forcing this pin to ground will turn-off the output. NC (Pin 5): This pin must be left open. 2 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) −0.3V to 5.6V Maximum Voltage on any Input pin Output Short-Circuit Duration Power Dissipation (TA = 25°C) Indefinite (3) 345mW (4) ESD Susceptibility Human Body Model Machine Model 2 kV 200V Lead Temperature: Soldering, (10 sec.) +260°C (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Without PCB copper enhancements. The maximum power dissipation must be de-rated at elevated temperatures and is limited by TJMAX (maximum junction temperature), θJ-A (junction to ambient thermal resistance) and TA (ambient temperature). The maximum power dissipation at any temperature is: PDissMAX = (TJMAX − TA)/θJ-A up to the value listed in the Absolute Maximum Ratings. The θJ-A for the SO-8 package is 160°C/W. The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Operating Range (1) Storage Temperature Range −65°C to +150°C Ambient Temperature Range 0°C to 70°C Junction Temperature Range 0°C to 80°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. LM4140 Electrical Charateristics Unless otherwise specified, VIN = 3.0V for the LM4140-1.024 and LM4140-1.250, VIN = 5.0V for all other voltage options, VEN = VIN. COUT = 1μF (1), ILOAD = 1mA, TA = TJ = 25°C. Limits with standard typeface are for TA = 25°C, and limits in boldface type apply over 0°C to 70°C temperature range. Symbol Parameter Conditions Min (2) Typ (3) Max (2) Units Output Voltage Initial Accuracy (4) VREF LM4140B-1.024 LM4140B-1.250 LM4140B-2.048 LM4140B-2.500 LM4140B-4.096 ±0.1 % LM4140C-1.024 LM4140C-1.250 LM4140C-2.048 LM4140C-2.500 LM4140C-4.096 (1) (2) (3) (4) ±0.1 For proper operation, a 1μF capacitor is required between the output pin and the GND pin of the device. (See Application Hints for details) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL). Typical numbers are at 25°C and represent the most likely parametric norm. High temperature and mechanical stress associated with PCB assembly can have significant impact on the initial accuracy of the LM4140 and may create significant shifts in VREF. See Application Hints section regarding accuracy and PCB layout consideration. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 3 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com LM4140 Electrical Charateristics (continued) Unless otherwise specified, VIN = 3.0V for the LM4140-1.024 and LM4140-1.250, VIN = 5.0V for all other voltage options, VEN = VIN. COUT = 1μF (1), ILOAD = 1mA, TA = TJ = 25°C. Limits with standard typeface are for TA = 25°C, and limits in boldface type apply over 0°C to 70°C temperature range. Symbol TCVREF/°C Parameter Conditions Temperature Coefficient: A Grade B Grade C Grade Min (2) Typ (3) 0°C ≤ TA ≤ + 70°C Max (2) 3 6 10 Units ppm/°C Line Regulation 1.024V and 1.250V options 1.8V ≤ VIN ≤ 5.5V 50 ΔVREF/ΔVIN 300 350 All other voltage options Vref + 200mV ≤ VIN ≤ 5.5V Load Regulation 1 mA ≤ ILOAD ≤ 8mA 20 All other voltage options 1 ΔVREF/ΔILOAD 200 250 20 150 4.096V Option 5 ppm/V ppm/mA 35 150 ΔVREF Long-Term Stability ΔVREF Thermal Hysteresis Operating Voltage LM4140-1.024, LM4140-1.250 IL = 1 mA to 8 mA Dropout Voltage (6) LM4140-2.048, LM4140-2.500 IL = 1 mA 20 40 45 IL = 8 mA 160 235 400 IL = 1 mA 20 40 45 IL = 8 mA 195 270 490 0.1 Hz to 10 Hz 2.2 VIN-VREF (5) LM4140-4.096 VN Output Noise Voltage IS(ON) Supply Current (7) 1000 Hrs 60 ppm 0°C ≤ TA ≤ + 70°C 20 ppm 1.8 5.5 V mV μVPP ILOAD = 0 mA All other voltage options 230 320 375 4.096V Option 265 μA 350 400 IS(OFF) Supply Current VH Logic High Input Voltage IH Logic High Input Current VL Logic Low Input Voltage IL Logic Low Input Current ISC Short Circuit Current (5) (6) (7) 4 VEnable < 0.4V .01 1 0.8VIN V 2 nA 0.4 1 8.5 μA 20 V nA 35 40 mA Thermal hysteresis is defined as the changes in +25°C output voltage before and after the cycling of the device from 0°C to 70°C. Dropout voltage is defined as the minimum input to output differential voltage at which the output voltage drops by 0.5% below the value measured with VIN = 3.0V for the LM4140-1.024 and LM4140-1.250, VIN = 5.0V for all other voltage options. The output noise is based on 1.024V option. Output noise is linearly proportional to VREF. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 LM4140 Typical Performance Characteristics Unless otherwise specified, TA = 25°C, No Load, COUT = 1μF, VIN = 3.0V for LM4140-1.024 and LM4140-1.250, and 5V for all other voltage options. VIN = VEN. Power Up/Down Ground Current Enable Response Figure 4. Figure 5. * The 1μF output capacitor is actively discharged to ground. See ON/OFF OPERATION section for more details. Line Transient Response Load Transient Response Figure 6. Figure 7. Output Impedance Power Supply Rejection Ratio Figure 8. Figure 9. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 5 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com LM4140 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, No Load, COUT = 1μF, VIN = 3.0V for LM4140-1.024 and LM4140-1.250, and 5V for all other voltage options. VIN = VEN. Dropout Voltage vs Load Current Output Voltage Change vs Sink Current (ISINK) Note: 1.024V and 1.250V options require 1.8V supply. Figure 10. 6 Figure 11. Total Current (IS(OFF)) vs Supply Voltage Total Current (IS(ON)) vs Supply Voltage Figure 12. Figure 13. Spectral Noise Density (0.1Hz to 10Hz) Spectral Noise Density (10Hz to 100kHz) Figure 14. Figure 15. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 LM4140 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, No Load, COUT = 1μF, VIN = 3.0V for LM4140-1.024 and LM4140-1.250, and 5V for all other voltage options. VIN = VEN. Ground Current vs Load Current Long Term Drift Figure 16. Figure 17. Load Regulation vs Temperature Output Voltage vs Load Current Figure 18. Figure 19. Line Regulation vs Temperature IQ vs Temperature Figure 20. Figure 21. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 7 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com LM4140 Typical Performance Characteristics (continued) Unless otherwise specified, TA = 25°C, No Load, COUT = 1μF, VIN = 3.0V for LM4140-1.024 and LM4140-1.250, and 5V for all other voltage options. VIN = VEN. 8 Short Circuit Current vs Temperature Dropout Voltage vs Load Current (VOUT) = 2.0V Figure 22. Figure 23. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 APPLICATION HINTS INPUT CAPACITORS Although not always required, an input capacitor is recommended. A supply bypass capacitor on the input assures that the reference is working from a source with low impedance, which improves stability. A bypass capacitor can also improve transient response by providing a reservoir of stored energy that the reference can utilize in case where the load current demand suddenly increases. The value used for CIN may be used without limit. Refer to the Typical Application section for examples of input capacitors. OUTPUT CAPACITORS The LM4140 requires a 1μF (nominally) output capacitor for loop stability (compensation) as well as transient response. During the sudden changes in load current demand, the output capacitor must source or sink current during the time it takes the control loop of the LM4140 to respond. This capacitor must be selected to meet the requirements of minimum capacitance and equivalent series resistance (ESR) range. In general, the capacitor value must be at least 0.2μF (over the actual ambient operating temperature), and the ESR must be within the range indicated in Figure 24, Figure 25 and Figure 26. Figure 24. 0.22 μF ESR Range Figure 25. 1 μF ESR Range Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 9 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com Figure 26. 10 μF ESR Range TANTALUM CAPACITORS Surface-mountable solid tantalum capacitors offer a good combination of small physical size for the capacitance value, and ESR in the range needed for by the LM4140. The results of testing the LM4140 stability with surface mount solid tantalum capacitors show good stability with values in the range of 0.1μF. However, optimum performance is achieved with a 1μF capacitor. Tantalum capacitors that have been verified as suitable for use with the LM4140 are shown in Table 1. Table 1. Surface-Mount Tantalum Capacitor Selection Guide 1μF Surface-Mount Tantalums Manufacturer Part Number Kemet T491A105M010AS NEC NRU105N10 Siemens B45196-E3105-K Nichicon F931C105MA Sprague 293D105X0016A2T 2.2μF Surface-Mount Tantalums Kemet T491A225M010AS NEC NRU225M06 Siemens B45196/2.2/10/10 Nichicon F930J225MA Sprague 293D225X0010A2T ALUMINUM ELECTROLYTIC CAPACITORS Although probably not a good choice for a production design, because of relatively large physical size, an aluminium electrolytic capacitor can be used in the design prototype for an LM4140 reference. A 1μF capacitor meeting the ESR conditions can be used. If the operating temperature drops below 0°C, the reference may not remain stable, as the ESR of the aluminium electrolytic capacitor will increase, and may exceed the limits indicated in the figures. MULTILAYER CERAMIC CAPACITORS Surface-mountable multilayer ceramic capacitors may be an attractive choice because of their relatively small physical size and excellent RF characteristics. 10 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 However, they sometimes have an ESR values lower than the minimum required by the LM4140, and relatively large capacitance change with temperature. The manufacturer's datasheet for the capacitor should be consulted before selecting a value. Test results of LM4140 stability using multilayer ceramic capacitors show that a minimum of 0.2μF is usually needed. Multilayer ceramic capacitors that have been verified as suitable for use with the LM4140 are shown in Table 2. Table 2. Surface-Mount Ceramic Capacitors Selection Guide 2.2μF Surface-Mount Ceramic Manufacturer Part Number Tokin 1E225ZY5U-C203 Murata GRM42-6Y5V225Z16 4.7μF Surface-Mount Ceramic Tokin 1E475ZY5U-C304 REVERSE CURRENT PATH The P-channel Pass transistor used in the LM4140 has an inherent diode connected between the VIN and VREF pins (see diagram below). Forcing the output to voltages higher than the input, or pulling VIN below voltage stored on the output capacitor by more than a Vbe, will forward bias this diode and current will flow from the VREF terminal to VIN. No damage to the LM4140 will occur under these conditions as long as the current flowing into the output pin does not exceed 50mA. ON/OFF OPERATION The LM4140 is designed to quickly reduce both VREF and IQ to zero when turned-off. VREF is restored in less than 200μs when turned-on. During the turn-off, the charge across the output capacitor is discharged to ground through internal circuitry. The LM4140 is turned-off by pulling the enable input low, and turned-on by driving the input high. If this feature is not to be used, the enable pin should be tied to the VIN to keep the reference on at all times (the enable pin must not be left floating). To ensure proper operation, the signal source used to drive the enable pin must be able to swing above and below the specified high and low voltage thresholds which ensure an ON or OFF state (see LM4140 Electrical Charateristics). The ON/OFF signal may come from either a totem-pole output, or an open-collector output with pull-up resistor to the LM4140 input voltage. This high-level voltage may exceed the LM4140 input voltage, but must remain within the Absolute Maximum Rating for the enable pin. OUTPUT ACCURACY Like all references, either series or shunt, the after assembly accuracy is made up of primarily three components: initial accuracy itself, thermal hysteresis and effects of the PCB assembly stress. LM4140 provides an excellent output initial accuracy of 0.1% and temperature coefficient of 6ppm/°C (B Grade). For best accuracy and precision, the LM4140 junction temperature should not exceed 70°C. The thermal hysteresis curve on this datasheet are performance characteristics of three typical parts selected at random from a sample of 40 parts. Parts are mounted in a socket to minimize the effect of PCB's mechnical expansion and contraction. Readings are taken at 25°C following multiple temperature cycles to 0°C and 70°C. The labels on the X axis of the graph indicates the device temperature cycle prior to measurement at 25°C. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 11 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com Figure 27. Typical Thermal Hysteresis The mechanical stress due to the PCB's mechanical and thermal stress can cause an output voltage shift more than the true thermal coefficient of the device. References in surface mount packages are more susceptible to these stresses because of the small amount of plastic molding which support the leads. Following the recommendations on PCB LAYOUT CONSIDERATION section can minimize the mechanical stress on the device. PCB LAYOUT CONSIDERATION The simplest ways to reduce the stress related shifts are: 1. Mounting the device near the edges or the corners of the board where mechanical stress is at its minimum. The center of the board generally has the highest mechanical and thermal expansion stress. 2. Mechanical isolation of the device by creating an island by cutting a U shape slot on the PCB for mounting the device. This approach would also provide some thermal isolation from the rest of the circuit. Figure 28 is a recommended printed board layout with a slot cut on three sides of the circuit layout to serve as a strain relief. 12 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 Figure 28. Suggested PCB Layout with Slot Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 13 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com Typical Application Circuits Figure 29. Boosted Output Current Figure 30. Boosted Ouput Current with Current Limiter * Low Noise Op Amp such as OP-27 Figure 31. Complimentary Outputs Figure 32. Voltage Reference with Force and Sense Output Figure 33. Precision Programmable Current Source Figure 34. Precision DAC Reference 14 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 LM4140 www.ti.com SNVS053E – JUNE 2000 – REVISED APRIL 2013 Figure 35. Strain Gauge Conditioner for 350Ω Bridge Figure 36. Figure 37. Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 15 LM4140 SNVS053E – JUNE 2000 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision D (April 2013) to Revision E • 16 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 15 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated Product Folder Links: LM4140 PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4140ACM-1.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM1.0 LM4140ACM-1.2 LIFEBUY SOIC D 8 95 TBD Call TI Call TI 0 to 70 4140A CM1.2 LM4140ACM-1.2/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM1.2 LM4140ACM-2.0 LIFEBUY SOIC D 8 95 TBD Call TI Call TI 0 to 70 4140A CM2.0 LM4140ACM-2.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM2.0 LM4140ACM-2.5 LIFEBUY SOIC D 8 95 TBD Call TI Call TI 0 to 70 4140A CM2.5 LM4140ACM-2.5/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM2.5 LM4140ACM-4.1 LIFEBUY SOIC D 8 95 TBD Call TI Call TI 0 to 70 4140A CM4.1 LM4140ACM-4.1/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM4.1 LM4140ACMX-2.5/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM2.5 LM4140ACMX-4.1/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140A CM4.1 LM4140BCM-1.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM1.0 LM4140BCM-1.2/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM1.2 LM4140BCM-2.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM2.0 LM4140BCM-2.5/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM2.5 LM4140BCM-4.1/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM4.1 LM4140BCMX-1.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM1.0 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 16-Oct-2015 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LM4140BCMX-2.5/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM2.5 LM4140BCMX-4.1/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140B CM4.1 LM4140CCM-1.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM1.0 LM4140CCM-1.2/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM1.2 LM4140CCM-2.0/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM2.0 LM4140CCM-2.5 LIFEBUY SOIC D 8 95 TBD Call TI Call TI 0 to 70 4140C CM2.5 LM4140CCM-2.5/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM2.5 LM4140CCM-4.1/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM4.1 LM4140CCMX-1.0/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM1.0 LM4140CCMX-1.2/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM1.2 LM4140CCMX-2.5/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM2.5 LM4140CCMX-4.1/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 4140C CM4.1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 16-Oct-2015 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM4140ACMX-2.5/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140ACMX-4.1/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140BCMX-1.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140BCMX-2.5/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140BCMX-4.1/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-1.0/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-1.2/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-2.5/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4140CCMX-4.1/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4140ACMX-2.5/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140ACMX-4.1/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140BCMX-1.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140BCMX-2.5/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140BCMX-4.1/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-1.0/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-1.2/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-2.5/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM4140CCMX-4.1/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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