NVMFS5C404N Power MOSFET 40 V, 0.7 mW, 378 A, Single N−Channel Features • • • • • • Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS5C404NWF − Wettable Flank Option for Enhanced Optical Inspection AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant www.onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 40 V 0.7 mW @ 10 V 378 A MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current RqJC (Notes 1, 3) TC = 25°C Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State Pulsed Drain Current Value Unit VDSS 40 V VGS ±20 V ID 378 A TC = 100°C TC = 25°C Steady State PD ID Operating Junction and Storage Temperature Source Current (Body Diode) S (1,2,3) N−CHANNEL MOSFET A 53 MARKING DIAGRAM 37 PD TA = 100°C TA = 25°C, tp = 10 ms G (4) W 200 100 TA = 100°C TA = 25°C D (5,6) 267 TC = 100°C TA = 25°C Power Dissipation RqJA (Notes 1 & 2) Symbol W 3.9 1.9 D 1 IDM 900 A TJ, Tstg −55 to + 175 °C IS 191 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 38 A) EAS 907 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. DFN5 (SO−8FL) CASE 488AA STYLE 1 S S S G D XXXXXX AYWZZ D D XXXXXX = 5C404N XXXXXX = (NVMFS5C404N) or XXXXXX = 404NWF XXXXXX = (NVMFS5C404NWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit ORDERING INFORMATION Junction−to−Case − Steady State RqJC 0.75 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 39 See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2015 May, 2015 − Rev. 1 1 Publication Order Number: NVMFS5C404N/D NVMFS5C404N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 19.7 VGS = 0 V, VDS = 40 V mV/°C TJ = 25 °C 10 TJ = 125°C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 mA mA 100 nA 4.0 V ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 2.0 −6.2 VGS = 10 V gFS ID = 50 A VDS =15 V, ID = 50 A 0.57 mV/°C 0.7 210 mW S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 8400 VGS = 0 V, f = 1 MHz, VDS = 25 V QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS QGD Plateau Voltage VGP pF 120 Total Gate Charge Gate−to−Drain Charge 4600 VGS = 10 V, VDS = 20 V; ID = 50 A 128 22 nC 35 VGS = 10 V, VDS = 20 V; ID = 50 A 26 4.3 V SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) 16 tr 113 td(OFF) VGS = 10 V, VDS = 20 V, ID = 50 A, RG = 2.5 W tf ns 77 109 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.76 TJ = 125°C 0.63 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 50 A 1.2 V 96 VGS = 0 V, dIS/dt = 100 A/ms, IS = 50 A QRR 49 ns 47 189 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMFS5C404N TYPICAL CHARACTERISTICS 600 10 V 700 8 V 7V 600 VDS = 10 V 6.5 V 5.8 V 500 5.6 V 400 5.4 V 300 5.2 V 5.0 V 200 4.8 V 4.6 V 4.4 V 100 0 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 6V 0.5 1.0 2.0 1.5 2.5 TJ = 25°C 200 TJ = 125°C 100 TJ = −55°C 4.0 6.0 5.0 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 4 5 6 7 8 9 10 0.64 0.62 0.60 0.58 0.56 0.54 0.52 0.50 0 100 200 300 400 500 600 700 800 VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.E−03 2.1 1.9 VGS = 10 V ID = 50 A IDSS, LEAKAGE (A) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 300 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 25°C IDS = 25 A 3 400 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 4.5 0.0 500 0 3.0 3.0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 800 1.7 1.5 1.3 1.1 1.E−04 TJ = 150°C 1.E−05 TJ = 125°C 1.E−06 0.9 TJ = 85°C 0.7 −50 −25 1.E−07 0 25 50 75 100 125 150 175 0 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVMFS5C404N TYPICAL CHARACTERISTICS CISS 1E+4 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 1E+5 COSS 1E+3 1E+2 CRSS 1E+1 VGS = 0 V TJ = 25°C f = 1 MHz 1E+0 5 0 15 10 25 20 30 35 QGS QGD 4 VDS = 20 V ID = 50 A TJ = 25°C 2 0 10 20 30 40 50 60 70 80 90 100 110 120 130 0 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 50 td(off) tf tr td(on) 100 IS, SOURCE CURRENT (A) t, TIME (ns) 6 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS = 10 V VDS = 20 V ID = 50 A 10 1 10 5 TJ = 150°C TJ = 125°C 1 1 10 100 0.3 0.4 0.5 0.6 TJ = 25°C 0.7 0.8 TJ = −55°C 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 TC = 25°C VGS ≤ 10 V 0.01 ms 0.1 ms 100 100 1 ms dc TJ(initial) = 25°C IPEAK (A) IDS, DRAIN−TO−SOURCE CURRENT (A) QT 8 40 1000 1000 10 10 ms TJ(initial) = 100°C 10 10 RDS(on) Limit Thermal Limit Package Limit 1 1 0.1 1 10 100 1E−04 1E−03 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s) Figure 11. Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 4 1E−02 NVMFS5C404N 100 RqJA(t) (°C/W) 50% Duty Cycle 10 20% 10% 5% 1 2% 1% NVMFS5C404N 650 mm2, 2 oz., Cu Single Layer Pad 0.1 Single Pulse 0.01 1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03 PULSE TIME (sec) Figure 13. Thermal Characteristics DEVICE ORDERING INFORMATION Device Marking Package Shipping† NVMFS5C404NT1G 5C404N DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5C404NWFT1G 404NWF DFN5 (Pb−Free, Wettable Flanks) 1500 / Tape & Reel NVMFS5C404NT3G 5C404N DFN5 (Pb−Free) 5000 / Tape & Reel NVMFS5C404NWFT3G 404NWF DFN5 (Pb−Free, Wettable Flanks) 5000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NVMFS5C404N PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO−8FL) CASE 488AA ISSUE L 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A 2 B D1 2X 0.20 C 4X E1 q E 2 c 1 2 3 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q A1 4 TOP VIEW 3X C e SEATING PLANE 0.10 C DETAIL A A 0.10 C RECOMMENDED SOLDERING FOOTPRINT* SIDE VIEW 8X DETAIL A C A B 0.05 c STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 2X 0.495 4.560 2X b 0.10 MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.15 5.30 4.70 4.90 5.10 3.80 4.00 4.20 6.15 6.00 6.30 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.61 0.71 1.20 1.35 1.50 0.51 0.61 0.71 0.125 REF 3.00 3.40 3.80 0_ −−− 12 _ 1.530 e/2 L 1 4 3.200 4.530 K E2 PIN 5 (EXPOSED PAD) L1 M 1.330 2X 0.905 1 0.965 G D2 BOTTOM VIEW 4X 1.000 4X 0.750 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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