ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 Low Power Quad Channels Digital Isolators Check for Samples: ISO7640FM, ISO7641FM FEATURES APPLICATIONS • • • 1 • • • • • • • Signaling Rate: 150 Mbps Low Power Consumption, Typical ICC per Channel (3.3 V Supplies): – ISO7640FM: 2 mA at 25 Mbps – ISO7641FM: 2.4 mA at 25 Mbps Low Propagation Delay: 7 ns Typical Output Defaults to Low-state in fail-safe mode Wide Temperature Range: –40°C to 125°C 50 KV/µs Transient Immunity, Typical Long Life with SiO2 Isolation barrier Operates From 2.7V, 3.3 V and 5 V Supply and Logic Levels Wide Body SOIC-16 Package Optocoupler Replacement in: – Industrial Fieldbus – Profibus – Modbus – DeviceNetTM Data Buses – Servo Control Interface – Motor Control – Power Supplies – Battery Packs SAFETY AND REGULATORY APPROVALS • • • • 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (approved) VDE Approval for DIN EN 60747-5-2 (VDE 0884 Rev. 2), 1414 VPK Working Voltage (approved) CSA Component Acceptance Notice 5A, IEC 60601-1 Medical Standard (approved) 5 KVRMS Reinforced Insulation per TUV for EN/UL/CSA 60950-1 and EN/UL/CSA 61010-1 (approved) DESCRIPTION ISO7640FM and ISO7641FM provide galvanic isolation up to 6 KVPK for 1 minute per UL and VDE. These devices are also certified up to 5 KVRMS Reinforced isolation at a working voltage of 400 VRMS per end equipment standards EN/UL/CSA 60950-1 and 61010-1. ISO7640F and ISO7641F are quad channel isolators; ISO7640F has four forward and ISO7641F has three forward and one reverse direction channels. Suffix F indicates that output defaults to Low-state in fail-safe conditions (see Table 1). M-Grade devices are high speed isolators capable of 150 Mbps data rate with fast propagation delays Spacer ISO7640 ISO7641 VCC1 1 16 VCC2 VCC1 1 16 VCC2 GND1 2 15 GND2 GND1 2 15 GND2 INA INB 3 14 OUTA 14 OUTA 13 OUTB INA INB 3 4 4 13 OUTB INC 5 12 OUTC INC 5 12 OUTC IND 6 11 OUTD OUTD 6 11 IND NC 7 10 EN1 7 10 GND1 8 9 GND1 8 9 EN GND2 EN2 GND2 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011–2012, Texas Instruments Incorporated ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION CONTINUED Each isolation channel has a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. Used in conjunction with isolated power supplies, these devices prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. The devices have TTL input thresholds and can operate from 2.7 V, 3.3 V and 5 V supplies. All inputs are 5 V tolerant when supplied from 3.3 V or 2.7 V supplies. PIN DESCRIPTIONS PIN NAME I/O DESCRIPTION ISO7640 ISO7641 INA 3 3 I Input, channel A INB 4 4 I Input, channel B INC 5 5 I Input, channel C IND 6 11 I Input, channel D OUTA 14 14 O Output, channel A OUTB 13 13 O Output, channel B OUTC 12 12 O Output, channel C OUTD 11 6 O Output, channel D EN 10 - I Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB, OUTC and OUTD of ISO7640 EN1 - 7 I Enables (when input is High or Open) or Disables (when input is Low) OUTD of ISO7641 EN2 - 10 I Enables (when input is High or Open) or Disables (when input is Low) OUTA, OUTB, and OUTC of ISO7641 VCC1 1 1 – Power supply, VCC1 VCC2 16 16 – Power supply, VCC2 GND1 2,8 2,8 – Ground connection for VCC1 GND2 9,15 9,15 – Ground connection for VCC2 7 - - No Connect pins are floating with no internal connection NC Table 1. FUNCTION TABLE (1) INPUT VCC PU (1) 2 OUTPUT VCC PU INPUT (INx) OUTPUT ENABLE (ENx) OUTPUT (OUTx) H H or Open H L H or Open L X L Z Open H or Open L PD PU X H or Open L PD PU X L Z PU PD X X Z PU = Powered Up(VCC ≥ 2.7 V); PD = Powered Down (VCC ≤ 2.1 V); X = Irrelevant; H = High Level; L = Low Level; Z = High Impedance Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 AVAILABLE OPTIONS PRODUCT RATED ISOLATION PACKAGE INPUT THRESHOLD DW-16 1.5 V TTL (CMOS Compatible) ISO7640FM 6 KVPK / 5 KVRMS (1) ISO7641FM (1) DATA RATE and FILTER 150 Mbps, No Noise Filter CHANNEL DIRECTION MARKED AS 4 Forward, 0 Reverse ISO7640FM 3 Forward, 1 Reverse ISO7641FM ORDERING NUMBER ISO7640FMDW (rail) ISO7640FMDWR (reel) ISO7641FMDW (rail) ISO7641FMDWR (reel) See the Regulatory Information table for detailed isolation ratings. ABSOLUTE MAXIMUM RATINGS (1) VALUE PARAMETER MIN MAX UNIT Supply voltage (2) VCC1, VCC2 –0.5 6 V Voltage INx, OUTx, ENx –0.5 6 V ±15 mA ±4 kV ±1.5 kV Output Current, IO Electrostatic discharge Human Body Model ESDA, JEDEC JS-001-2012 Field-Induced Charged Device Model JEDEC JESD22-C101E Machine Model JEDEC JESD22-A115-A All pins Maximum junction temperature, TJ Storage temperature, TSTG (1) (2) -65 ±200 V 150 °C 150 °C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values except differential I/O bus voltages are with respect to the local ground terminal (GND1 or GND2) and are peak voltage values. RECOMMENDED OPERATING CONDITIONS PARAMETER MIN TYP 2.7 MAX UNIT Supply voltage VCC1, VCC2 5.5 High-level output current IOH V Low-level output current IOL High-level input voltage VIH 2 VCC V Low-level input voltage VIL 0 0.8 V -4 mA 4 ≥3V-Operation 6.67 <3V-Operation 10 ≥3V-Operation 0 150 <3V-Operation 0 100 Input pulse duration tui Signaling rate 1 / tui Junction temperature TJ -40 Ambient temperature TA -40 Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM mA ns 25 Mbps 136 °C 125 °C Submit Documentation Feedback 3 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com THERMAL INFORMATION ISO76xx THERMAL METRIC (1) θJA Junction-to-ambient thermal resistance 72 θJC(top) Junction-to-case(top) thermal resistance 38 θJB Junction-to-board thermal resistance 39 ψJT Junction-to-top characterization parameter 9.4 ψJB Junction-to-board characterization parameter n/a θJC(bottom) Junction-to-case(bottom) thermal resistance n/a PD VCC1 = VCC2 = 5.5V, TJ = 150°C, CL = 15pF Maximum Device Power Dissipation Input a 75 MHz 50% duty cycle square wave 399 (1) UNITS DW (16 Pins) °C/W mW For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. ELECTRICAL CHARACTERISTICS VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP IOH = –4 mA; see Figure 1 TEST CONDITIONS VCCx (1) – 0.8 4.8 IOH = –20 μA; see Figure 1 VCCx (1) – 0.1 5 VOH High-level output voltage VOL Low-level output voltage VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 4 (1) MAX UNIT V IOL = 4 mA; see Figure 1 0.2 0.4 IOL = 20 μA; see Figure 1 0 0.1 V 450 mV 10 μA -10 25 75 kV/μs VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured. SWITCHING CHARACTERISTICS VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER tPLH, tPHL Propagation delay time PWD (1) Pulse width distortion |tPHL – tPLH| TEST CONDITIONS See Figure 1 tsk(o) (2) Channel-to-channel output skew time tsk(pp) (3) Part-to-part skew time tr Output signal rise time tf Output signal fall time tPHZ Disable Propagation Delay, high-to-high impedance output tPLZ Disable Propagation Delay, low-to-high impedance output tPZL Enable Propagation Delay, high impedance-tolow output tfs Fail-safe output delay time from input data or power loss 4 MAX 7 10.5 UNIT 2 Same-direction Channels 2 Opposite-direction Channels 3 1.6 See Figure 1 Enable Propagation Delay, high impedance-tohigh output (3) TYP 3.5 ns 4.5 tPZH (1) (2) MIN ns 1 5 16 5 16 4 16 4 16 See Figure 2 ns See Figure 3 9.5 μs Also known as Pulse Skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 SUPPLY CURRENT VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.6 1.2 4.5 6.6 0.7 1.3 4.6 6.7 UNIT ISO7640FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps 1.1 2 6.6 10.5 1.9 3 9.7 14.7 8.2 14.5 35 58 2.6 4.2 4.2 6.8 2.7 4.3 4.3 6.9 3.6 4.9 6 8.2 mA ISO7641FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN1 = EN2 = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM 5.1 6.6 8.8 11.4 17 22 31 42 Submit Documentation Feedback mA 5 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com ELECTRICAL CHARACTERISTICS VCC1 at 5 V ± 10% and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER VOH High-level output voltage TEST CONDITIONS MIN TYP VCC1 – 0.8 4.8 OUTx on VCC2 (3.3V) side VCC2 - 0.4 3 OUTx on VCC1 (5V) side VCC1 – 0.1 5 OUTx on VCC2 (3.3V) side VCC2 – 0.1 3.3 IOH = –4 mA; see Figure 1 OUTx on VCC1 (5V) side IOH = –20 μA; see Figure 1 MAX V IOL = 4 mA; see Figure 1 0.2 0.4 IOL = 20 μA; see Figure 1 0 0.1 VOL Low-level output voltage VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 4 430 V mV 10 -10 25 UNIT 50 μA kV/μs SWITCHING CHARACTERISTICS VCC1 at 5 V ± 10% and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER tPLH, tPHL Propagation delay time PWD (1) Pulse width distortion |tPHL – tPLH| TEST CONDITIONS See Figure 1 tsk(o) (2) Channel-to-channel output skew time tsk(pp) (3) Part-to-part skew time tr Output signal rise time tf Output signal fall time tPHZ Disable Propagation Delay, high-to-high impedance output tPLZ Disable Propagation Delay, low-to-high impedance output tPZL Enable Propagation Delay, high impedance-tolow output tfs Fail-safe output delay time from input data or power loss 6 MAX 8 13 UNIT 2 Same-direction Channels 2.5 Opposite-direction Channels 3.5 2 See Figure 1 Enable Propagation Delay, high impedance-tohigh output (3) TYP 4 ns 6 tPZH (1) (2) MIN ns 1.2 6.5 17 6.5 17 5.5 17 5.5 17 See Figure 2 ns See Figure 3 9.5 μs Also known as Pulse Skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 SUPPLY CURRENT VCC1 at 5 V ± 10% and VCC2 at 3.3V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.6 1.2 3.6 5.1 0.7 1.3 3.7 5.2 UNIT ISO7640FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps 1.1 2 5 7.1 1.9 3 6.9 11 8.2 14.5 24 40 2.6 4.2 3.2 4.9 2.7 4.3 mA ISO7641FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN1 = EN2 = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM 3.3 5 3.6 4.9 4.4 5.8 5.1 6.6 6.1 7.6 17 22 20.6 26.5 Submit Documentation Feedback mA 7 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com ELECTRICAL CHARACTERISTICS VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –4 mA; see Figure 1 VOH High-level output voltage IOH = –20 μA; see Figure 1 MIN TYP OUTx on VCC1 (3.3 V) side VCC1–0.4 3 OUTx on VCC2 (5 V) side VCC2–0.8 4.8 OUTx on VCC1 (3.3 V) side VCC1–0.1 3.3 OUTx on VCC2 (5 V) side VCC2–0.1 MAX V 5 IOL = 4 mA; see Figure 1 0.2 0.4 IOL = 20 μA; see Figure 1 0 0.1 VOL Low-level output voltage VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 4 430 V mV 10 -10 25 UNIT 50 μA kV/μs SWITCHING CHARACTERISTICS VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER tPLH, tPHL Propagation delay time PWD (1) Pulse width distortion |tPHL – tPLH| TEST CONDITIONS See Figure 1 tsk(o) (2) Channel-to-channel output skew time tsk(pp) (3) Part-to-part skew time tr Output signal rise time tf Output signal fall time tPHZ Disable Propagation Delay, high-to-high impedance output tPLZ Disable Propagation Delay, low-to-high impedance output tPZL Enable Propagation Delay, high impedance-to-low output tfs Fail-safe output delay time from input data or power loss 8 MAX 7.5 12.5 UNIT 2 Same-direction Channels 2.5 Opposite-direction Channels 3.5 1.7 See Figure 1 Enable Propagation Delay, high impedance-to-high output (3) TYP 4 ns 6 tPZH (1) (2) MIN ns 1.1 5.5 17 5.5 17 4.5 17 4.5 17 See Figure 2 ns See Figure 3 9.5 μs Also known as Pulse Skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 SUPPLY CURRENT VCC1 at 3.3 V ± 10% and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.35 0.7 4.5 6.6 0.4 0.8 4.6 6.7 UNIT ISO7640FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps 0.7 1.2 6.6 10.5 1.1 2 9.7 14.7 5 8.5 35 58 1.9 2.9 4.2 6.8 mA ISO7641FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN1 = EN2 = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM 2 3 4.3 6.9 2.5 3.5 6 8.2 3.4 4.5 8.8 11.4 10.5 14.5 31 42 Submit Documentation Feedback mA 9 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com ELECTRICAL CHARACTERISTICS VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP IOH = –4 mA; see Figure 1 TEST CONDITIONS VCCx (1) – 0.4 3 IOH = –20 μA; see Figure 1 VCCx (1) – 0.1 3.3 VOH High-level output voltage VOL Low-level output voltage VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 4 (1) MAX V IOL = 4 mA; see Figure 1 0.2 0.4 IOL = 20 μA; see Figure 1 0 0.1 425 V mV 10 -10 25 UNIT 50 μA kV/μs VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured. SWITCHING CHARACTERISTICS VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER tPLH, tPHL Propagation delay time PWD (1) Pulse width distortion |tPHL – tPLH| TEST CONDITIONS See Figure 1 tsk(o) (2) Channel-to-channel output skew time tsk(pp) (3) Part-to-part skew time tr Output signal rise time tf Output signal fall time tPHZ Disable Propagation Delay, high-to-high impedance output tPLZ Disable Propagation Delay, low-to-high impedance output tPZL Enable Propagation Delay, high impedance-to-low output tfs Fail-safe output delay time from input data or power loss 10 MAX 8.5 14 UNIT 2 Same-direction Channels 3 Opposite-direction Channels 4 2 See Figure 1 Enable Propagation Delay, high impedance-to-high output (3) TYP 4 ns 6.5 tPZH (1) (2) MIN ns 1.3 6.5 17 6.5 17 5.5 17 5.5 17 See Figure 2 ns See Figure 3 9.2 μs Also known as Pulse Skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 SUPPLY CURRENT VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.35 0.7 3.6 5.1 0.4 0.8 3.7 5.2 0.7 1.2 5 7.1 UNIT ISO7640FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps 1.1 2 6.9 11 5 8.5 24 40 1.9 2.9 3.2 4.9 2 3 mA ISO7641FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN1 = EN2 = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 150 Mbps Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM 3.3 5 2.5 3.5 4.4 5.8 3.4 4.5 6.1 7.6 10.5 14.5 20.6 26.5 Submit Documentation Feedback mA 11 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com ELECTRICAL CHARACTERISTICS VCC1 and VCC2 at 2.7 V (1) (over recommended operating conditions unless otherwise noted) PARAMETER MIN TYP IOH = –4 mA; see Figure 1 TEST CONDITIONS VCC (2) – 0.5 2.4 IOH = –20 μA; see Figure 1 VCC (2) – 0.1 2.7 VOH High-level output voltage VOL Low-level output voltage VI(HYS) Input threshold voltage hysteresis IIH High-level input current VIH = VCC at INx or ENx IIL Low-level input current VIL = 0 V at INx or ENx CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 4 (1) (2) MAX V IOL = 4 mA; see Figure 1 0.2 0.4 IOL = 20 μA; see Figure 1 0 0.1 350 V mV 10 -10 25 UNIT 50 μA kV/μs For 2.7 V-operation, max data rate is 100 Mbps. VCCx is the supply voltage, VCC1 or VCC2, for the output channel that is being measured. SWITCHING CHARACTERISTICS VCC1 and VCC2 at 2.7 V (over recommended operating conditions unless otherwise noted) PARAMETER tPLH, tPHL Propagation delay time PWD (1) Pulse width distortion |tPHL – tPLH| TEST CONDITIONS See Figure 1 tsk(o) (2) Channel-to-channel output skew time tsk(pp) (3) Part-to-part skew time tr Output signal rise time tf Output signal fall time tPHZ Disable Propagation Delay, high-to-high impedance output tPLZ Disable Propagation Delay, low-to-high impedance output tPZL Enable Propagation Delay, high impedance-tolow output tfs Fail-safe output delay time from input data or power loss 12 MAX 8 16 UNIT 2.5 Same-direction Channels 4 Opposite-direction Channels 5 2.3 See Figure 1 Enable Propagation Delay, high impedance-tohigh output (3) TYP 5 ns 8 tPZH (1) (2) MIN ns 1.8 8 18 8 18 7 18 7 18 See Figure 2 ns See Figure 3 8.5 μs Also known as Pulse Skew. tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical loads. tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 SUPPLY CURRENT VCC1 and VCC2 at 2.7 V (over recommended operating conditions unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.2 0.6 UNIT ISO7640FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 100 Mbps 3.3 5 0.2 0.7 3.4 5.1 0.4 1.1 4.4 6.8 0.8 1.8 6 9.5 2.7 5 14.2 21 1.6 2.4 2.8 4.1 1.7 2.5 2.9 4.2 2.1 3 3.8 5 2.8 3.8 5.2 6.7 mA ISO7641FM ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 ICC1 ICC2 Disable EN1 = EN2 = 0 V DC to 1 Mbps 10 Mbps 25 Mbps DC Signal: VI = VCC or 0 V, AC Signal: All channels switching with square wave clock input; CL = 15 pF 100 Mbps Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM 6.4 7.5 11.8 15.5 Submit Documentation Feedback mA 13 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com ISOLATION BARRIER PARAMETER MEASUREMENT INFORMATION IN Input Generator NOTE A 50 W VI VCC1 VI VCC/2 OUT VCC/2 0V tPHL tPLH VO CL NOTE B VOH 90% VO 50% 10% tf tr 50% VOL A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3ns, ZO = 50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. It is not needed in actual application. B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 1. Switching Characteristics Test Circuit and Voltage Waveforms VCC VCC ISOLATION BARRIER 0V R L = 1 k W ± 1% IN Input Generator VI OUT EN VO 0V tPLZ tPZL VO CL VCC/2 VCC/2 VCC 0.5 V 50% VOL NOTE B VI 50 W ISOLATION BARRIER NOTE A IN 3V Input Generator NOTE A VI VCC OUT VO VCC/2 VI VCC/2 0V EN CL NOTE B 50 W tPZH R L = 1 k W ± 1% VOH 50% VO 0.5 V tPHZ A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 10 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω. B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. 0V Figure 2. Enable/Disable Propagation Delay Time Test Circuit and Waveform 14 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 PARAMETER MEASUREMENT INFORMATION (continued) VI VCC ISOLATION BARRIER VCC IN = VCC A. 2.7 V VI 0V OUT t fs VO CL NOTE A VO VOH 50% fs low V OL CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 3. Failsafe Delay Time Test Circuit and Voltage Waveforms VCC1 VCC2 ISOLATION BARRIER C = 0.1 mF ±1% IN S1 GND1 C = 0.1 mF ±1% OUT Pass/Fail Criterion – the output must remain stable. CL NOTE A VOH or VOL GND2 VTEST A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 4. Common-Mode Transient Immunity Test Circuit Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM Submit Documentation Feedback 15 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com DEVICE INFORMATION IEC INSULATION AND SAFETY-RELATED SPECIFICATIONS FOR DW-16 PACKAGE PARAMETER L(I01) L(I02) (1) CTI TEST CONDITIONS MIN TYP MAX UNIT Minimum air gap (Clearance) Shortest terminal to terminal distance through air 8.3 mm Minimum external tracking (Creepage) Shortest terminal to terminal distance across the package surface 8.1 mm Tracking resistance (Comparative Tracking Index) DIN IEC 60112 / VDE 0303 Part 1 ≥400 V Minimum Internal Gap (Internal Clearance) Distance through the insulation 0.014 mm RIO (2) Isolation resistance, Input to Output VIO = 500 V, TA < 100°C >1012 VIO = 500 V, 100°C ≤ TA ≤ max >1011 CIO (2) Barrier capacitance, Input to Output VI = 0.4 sin (2πft), f = 1MHz 2 pF CI (3) Input capacitance VI = VCC/2 + 0.4 sin (2πft), f = 1MHz, VCC = 5 V 2 pF (1) (2) (3) Ω Per JEDEC package dimensions. All pins on each side of the barrier tied together creating a two-terminal device. Measured from input pin to ground. spacer NOTE Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board do not reduce this distance. Creepage and clearance on a printed circuit board become equal according to the measurement techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications. DIN EN 60747-5-2 (VDE 0884 TEIL 2) INSULATION CHARACTERISTICS (4) over recommended operating conditions (unless otherwise noted) PARAMETER VIORM VPR TEST CONDITIONS Maximum working insulation voltage Input-to-output test voltage (1) SPECIFICATION UNIT 1414 VPEAK After Input/Output safety test subgroup 2/3, VPR = VIORM x 1.2, t = 10 s, Partial discharge < 5 pC 1697 Method a, After environmental tests subgroup 1, VPR = VIORM x 1.6, t = 10 s, Partial Discharge < 5 pC 2262 Method b1, 100% Production test VPR = VIORM x 1.875, t = 1 s Partial discharge < 5 pC 2652 VPEAK VIOTM Maximum transient overvoltage VTEST = VIOTM t = 60 sec (Qualification) t = 1 sec (100% Production) 6000 VPEAK RS Insulation resistance VIO = 500 V at TS >109 Ω Pollution degree (4) (1) 16 2 Climatic Classification 40/125/21 For applications that require DC working voltages between GND1 and GND2, please contact Texas Instruments for further details. Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 IEC 60664-1 RATINGS TABLE PARAMETER TEST CONDITIONS Basic Isolation Group SPECIFICATION Material Group Installation classification II Rated mains voltage ≤ 300 VRMS I–IV Rated mains voltage ≤ 600 VRMS I–III Rated mains voltage ≤ 1000 VRMS I–II REGULATORY INFORMATION VDE TUV Certified according to DIN EN 60747-5-2 Certified according to EN/UL/CSA 60950-1 and 610101 Basic Insulation Maximum Transient Overvoltage, 6000 VPK Maximum Working Voltage, 1414 VPK 5000 VRMS Reinforced Insulation, 400 VRMS maximum working voltage 5000 VRMS Basic Insulation, 600 VRMS maximum working voltage File Number: 40016131 Certificate Number: U8V 11 08 77311 005 (1) CSA UL Approved under CSA Component Recognized under 1577 Component Acceptance Notice #5A Recognition Program 5000 VRMS Reinforced Insulation 2 Means of Patient Protection at 125 VRMS per IEC 60601-1 (3rd Ed.) Single Protection, 4243 VRMS (1) File Number: 220991 File Number: E181974 Production tested ≥ 5092 VRMS for 1 second in accordance with UL 1577. IEC SAFETY LIMITING VALUES Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures. PARAMETER IS Safety input, output, or supply current TS Maximum case temperature TEST CONDITIONS DW-16 MIN TYP MAX θJA = 72 °C/W, VI = 5.5V, TJ = 150°C, TA = 25°C 316 θJA = 72 °C/W, VI = 3.6V, TJ = 150°C, TA = 25°C 482 θJA = 72 °C/W, VI = 2.7V, TJ = 150°C, TA = 25°C 643 150 UNIT mA °C The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM Submit Documentation Feedback 17 ISO7640FM ISO7641FM Safety Limiting Current - mA SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com 700 600 VCC1 = VCC2 = 2.7V 500 VCC1 = VCC2 = 3.6V 400 300 VCC1 = VCC2 = 5.5V 200 100 0 0 50 100 150 200 o Case Temperature - C Figure 5. DW-16 θJC Thermal Derating Curve per IEC 60747-5-2 APPLICATION INFORMATION VCC1 2 mm max. from 2 mm max. from VCC1 VCC2 VCC2 ISO7640 0.1 mF GND1 0.1 mF 1 16 2 15 INA 3 14 OUTA INB 4 13 OUTB INC 5 12 OUTC IND 6 11 NC 7 10 8 9 GND2 OUTD EN GND 2 GND1 VCC1 2 mm max. from 2 mm max. from VCC2 VCC2 VCC1 ISO7641 0.1 mF 0.1 mF 1 16 2 15 3 14 OUTA INB 4 13 OUTB INC 5 12 OUTC OUTD 6 11 7 10 8 9 GND1 INA EN1 GND1 GND2 IND EN2 GND 2 Figure 6. Typical ISO7640FM and ISO7641FM Application Circuit Note: For detailed layout recommendations, see Application Note SLLA284, Digital Isolator Design Guide. 18 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 TYPICAL SUPPLY CURRENT EQUATIONS (Calculated based on room temperature and typical Silicon process) ISO7640FM: At VCC1 = VCC2 = 3.3V ICC1 = 0.388 + 0.0312 x f ICC2 = 3.39 + 0.03561 x f + 0.006588 x f x CL At VCC1 = VCC2 = 5V ICC1 = 0.584 + 0.05349 x f ICC2 = 4.184 + 0.05597 x f + 0.009771 x f x CL ISO7641FM: At VCC1 = VCC2 = 3.3V ICC1 = 1.848 + 0.03233 ICC2 = 3.005 + 0.03459 At VCC1 = VCC2 = 5V ICC1 = 2.369 + 0.05385 ICC2 = 3.857 + 0.05506 x f + 0.001645 x f x CL x f + 0.0049395 x f x CL x f + 0.002448 x f x CL x f + 0.007348 x f x CL ICC1 and ICC2 are typical supply currents measured in mA; f is data rate measured in Mbps; CL is the capacitive load on each channel measured in pF. Enable VCC VCC Input VCC VCC VCC Output VCC 1 MW 8W 500 W 500 W IN EN OUT 13 W 1 MW Figure 7. Device I/O Schematics Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM Submit Documentation Feedback 19 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com TYPICAL CHARACTERISTICS 10 40 ICC1 at 3.3 V ICC1 at 5 V ICC2 at 3.3 V ICC2 at 5 V Supply Current (mA) 8 7 6 5 4 TA = 25°C CL = 15 pF 3 2 0 25 50 75 100 Data Rate (Mbps) 125 20 TA = 25°C CL = 15 pF 15 10 0 25 G001 50 75 100 Data Rate (Mbps) ICC1 at 3.3 V ICC1 at 5 V ICC2 at 3.3 V ICC2 at 5 V G002 6 Supply Current (mA) 7 5 4 3 TA = 25°C CL = 15 pF 1 0 25 ICC1 at 3.3 V ICC1 at 5 V ICC2 at 3.3 V ICC2 at 3.3 V 35 2 50 75 100 Data Rate (Mbps) 125 30 25 20 TA = 25°C CL = 15 pF 15 10 5 0 150 0 25 G003 50 75 100 Data Rate (Mbps) Figure 10. ISO7641FM Supply Current Per Channel vs Data Rate 3 2 1 −60 −50 −40 −30 −20 High−Level Output Current (mA) −10 Figure 11. High-Level Output Voltage vs High-Level Output Current Submit Documentation Feedback VCC = 3.3 V VCC = 5 V TA = 25°C 4 0 −70 150 G002 6 VCC = 5 V VCC = 3.3 V Low−Level Output Voltage (V) 5 125 Figure . 6 High−Level Output Voltage (V) 150 40 8 20 125 Figure 9. ISO7640FM Supply Current For All Channels vs Data Rate 9 Supply Current (mA) 25 0 150 Figure 8. ISO7640FM Supply Current Per Channel vs Data Rate 0 30 5 1 0 ICC1 at 3.3 V ICC1 at 5 V ICC2 at 3.3 V ICC2 at 3.3 V 35 Supply Current (mA) 9 0 5 TA = 25°C 4 3 2 1 0 0 10 G005 20 30 40 50 Low−Level Output Current (mA) 60 70 G006 Figure 12. Low-Level Output Voltage vs Low-Level Output Current Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 TYPICAL CHARACTERISTICS (continued) 11 2.5 Propagation Delay Time (ns) Power Supply Under Voltage Threshold (V) 2.52 2.48 2.46 VCC Rising VCC Falling 2.44 2.42 2.4 tPLH at 3.3 V tPHL at 3.3 V tPHL at 5 V tPLH at 5 V 10 9 8 7 2.38 CL = 15 pF 2.36 −40 −20 0 20 40 60 80 Free−Air Temperature (°C) 100 120 6 −40 −15 G007 Figure 13. VCC Undervoltage Threshold vs Free Air Temperature 10 35 60 85 110 Free−Air Temperature (°C) 135 150 G008 Figure 14. Propagation Delay Time vs Free Air Temperature 1 Pk-Pk Output Jitter (ns) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 VCC = 5 V VCC = 3.3 V 0.1 0 0 20 40 TA = 25°C CL = 15 pF All Channels Switching Typ Jitter on output pin shown 60 80 100 120 Data Rate (Mbps) 140 160 180 G009 Figure 15. Output Jitter vs Data Rate TA = 25 oC, CL = 15 pF TA = 25 oC, CL = 15 pF VCC1 = V CC2 = 5 V VCC1 = V CC2 = 3.3 V Pattern: NRZ 216-1 Pattern: NRZ 216-1 Figure 16. Typical Eye Diagram at 150 Mbps, 5 V Operation Figure 17. Typical Eye Diagram at 150 Mbps, 3.3 V Operation Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM Submit Documentation Feedback 21 ISO7640FM ISO7641FM SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 www.ti.com REVISION HISTORY Changes from Original (September 2011) to Revision A Page • Changed Figure 3 - From: 0 V or VCC To: IN = VCC ........................................................................................................... 15 • Added Note (1) "Per JEDEC package dimensions" to the IEC INSULATION AND SAFETY-RELATED SPECIFICATIONS FOR DW-16 PACKAGE table .............................................................................................................. 16 • Changed L(I01) Min Value From: 8 mm To: 8.3 mm .......................................................................................................... 16 • Changed L(I02) Min Value From: 7.8 mm To: 8.1 mm ....................................................................................................... 16 • Added pinout for ISO7641 and ISO7631 to Figure 6 ......................................................................................................... 18 Changes from Revision A (October 2011) to Revision B Page • Changed feature bullet From: ISO7641FC: 1.2 mA at 10 Mbps To: ISO7641FC: 1.3 mA at 10 Mbps ............................... 1 • Changed Safety and Regulatory Approvals bullet From: 6 KVPK for 1 Minute per UL1577 and VDE (Pending) To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (pending) .................................................................................................. 1 • Changed Safety and Regulatory Approvals bullet From: To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (approved) ............................................................................................................................................................................. 1 • Changed Safety and Regulatory Approvals bullet From: CSA Component Acceptance Notice 5A, IEC 60601-1 Medical Standard (pending) To: CSA Component Acceptance Notice 5A, IEC 60601-1 Medical Standard (approved) ..... 1 • Changed all the ELECTRICAL CHARACTERISTICS tables ................................................................................................ 4 • Changed all the SWITCHING CHARACTERISTICS tables ................................................................................................. 4 • Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 5 • Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 7 • Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................... 9 • Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................. 11 • Changed the SWITCHING CHARACTERISTICS table ISO7640F and ISO7641F C-Grade values ................................. 13 • Changed the IEC 60664-1 Ratings Table ........................................................................................................................... 17 Changes from Revision B (December 2011) to Revision C Page • Changed Safety and Regulatory Approvals bullet From: 6000 VPK / 4243 VRMS for 1 Minute per UL1577 (pending) To: 6000 VPK / 4243 VRMS for 1 Minute per UL 1577 (approved) ......................................................................................... 1 • Changed Description text From: The devices have TTL input thresholds and can operate from 2.7 V, 3.3 V and 5 V supplies. To: The devices have TTL input thresholds and can operate from 2.7 V (M-Grade), 3.3 V and 5 V supplies. ................................................................................................................................................................................ 2 • Deleted the Product Preview Note From the Available Options Table ................................................................................. 3 • Changed the ESD standards ................................................................................................................................................ 3 • Changed UL in the REGULATORY INFORMATION Table From: File Number: E181974 (Approval Pending) To: File Number: E181974 ............................................................................................................................................................... 17 • Changed the typical characteristics section ........................................................................................................................ 20 22 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM ISO7640FM ISO7641FM www.ti.com SLLSE89D – SEPTEMBER 2011 – REVISED JULY 2012 Changes from Revision C (January 2012) to Revision D Page • Deleted devices: ISO7631FM, ISO7631FC, ISO7640FC, ISO7641FC from the data sheet ............................................... 1 • Changed the Title From: Low Power Triple and Quad Channels Digital Isolators To: Low Power Quad Channels Digital Isolators ..................................................................................................................................................................... 1 • Deleted devices from the Features List ................................................................................................................................ 1 • Changed the DESCRIPTION ................................................................................................................................................ 1 • Changed EN1 and EN2 Pin Descriptions ............................................................................................................................. 2 • Deleted device from the Available Options Table ................................................................................................................. 3 • Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................... 4 • Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................... 6 • Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................... 8 • Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................. 10 • Changed the ELECTRICAL, SWITCHING, and SUPPLY CURRENT CHARACTERISTICS tables .................................. 12 • Deleted devices from the TYPICAL SUPPLY CURRENT EQUATIONS section ............................................................... 19 • Changed the TYPICAL CHARACTERISTICS section ........................................................................................................ 20 Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): ISO7640FM ISO7641FM Submit Documentation Feedback 23 PACKAGE OPTION ADDENDUM www.ti.com 15-May-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) ISO7640FMDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR ISO7640FMDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR ISO7641FMDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR ISO7641FMDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ISO7640FMDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 ISO7641FMDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ISO7640FMDWR SOIC DW 16 2000 367.0 367.0 38.0 ISO7641FMDWR SOIC DW 16 2000 533.4 186.0 36.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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