LINER LTC2934IDC-2-TRPBF Ultra-low power adjustable supervisor with power-fail output Datasheet

LTC2934
Ultra-Low Power
Adjustable Supervisor with
Power-Fail Output
DESCRIPTION
FEATURES
n
n
n
n
n
n
n
n
n
500nA Quiescent Current
±1.5% (Max) Accuracy over Temperature
Operates Down to 1.6V Supply
Adjustable Reset Threshold
Adjustable Power-Fail Threshold
Early Warning Power-Fail Output
Selectable 15ms or 200ms Reset Timeout
Manual Reset Input
Compact 8-Lead, 2mm × 2mm DFN and TSOT-23
(ThinSOT™) Packages
APPLICATIONS
n
n
n
n
n
Portable Equipment
Battery-Powered Equipment
Security Systems
Point-of-Sale Devices
Wireless Systems
, LT, LTC, LTM are registered trademarks of Linear Technology Corporation. ThinSOT is
a trademark of Linear Technology Corporation. All other trademarks are the property of
their respective owners.
The LTC®2934 ultra-low power voltage monitor provides
system initialization, power-fail warning and reset generation functions. Low quiescent current (500nA typical)
makes the LTC2934 an ideal choice for battery-operated
applications.
Precision power-fail and reset voltages can be configured
independently. Early warning of an impending low voltage condition is provided at the power-fail output (PFO)
when the PFI input falls below 0.4V. Supervisory circuits
monitor the ADJ input and pull RST low when ADJ falls
below 0.4V. When ADJ is rising from an under-threshold
condition, an internal reset timer is started after exceeding
the ADJ threshold by 5%. The reset timeout delays the
return of the RST output to a high state. A pushbutton
switch connected to the MR input is typically used to
force a manual reset. Outputs RST and PFO are available
with open-drain (LTC2934-1) or active pull-up circuits
(LTC2934-2). Operating temperature range is from –40ºC
to 85ºC.
TYPICAL APPLICATION
Configurable Low Power Voltage Supervisor
Selectable Reset Timeout Period
VIN
750k
VCC
0.1μF
11.8k
VCC
PFO
ADJ
BATTERY
POWERED
SYSTEM
LOGIC
LTC2934-2
PFI
237k
RST
MR
RT
15ms
RST, RT = GND
RST, RT = VCC
GND
200ms
2934 TA01b
2934 TA01a
POWER FAIL FALLING THRESHOLD = 1.686V
RESET FALLING THRESHOLD = 1.606V
2934f
1
LTC2934
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Voltages
VCC........................................................... –0.3V to 6V
ADJ, PFI ................................................... –0.3V to 6V
RT, MR ......................................–0.3V to (VCC + 0.3V)
Output Voltages
PFO, RST (LTC2934-1)............................. –0.3V to 6V
PFO, RST (LTC2934-2)..............–0.3V to (VCC + 0.3V)
RMS Currents
PFO, RST ..........................................................±5mA
Operating Ambient Temperature Range
LTC2934C ................................................ 0°C to 70°C
LTC2934I.............................................. –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TSOT-23 Package.............................................. 300°C
PIN CONFIGURATION
TOP VIEW
MR 2
TOP VIEW
8 ADJ
VCC 1
9
ADJ 1
PFI 2
RT 3
GND 4
7 PFI
RST 3
6 RT
PFO 4
5 GND
8 VCC
7 MR
6 RST
5 PFO
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
TJMAX = 125°C, θJA = 195°C/W
DC PACKAGE
8-LEAD (2mm × 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 102°C/W
EXPOSED PAD (PIN 9) PCB GND CONNECTION OPTIONAL
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
LTC2934CTS8-1#TRMPBF
LTC2934CTS8-1#TRPBF
LTDKR
8-Lead Plastic TSOT-23
LTC2934ITS8-1#TRMPBF
LTC2934ITS8-1#TRPBF
LTDKR
8-Lead Plastic TSOT-23
LTC2934CTS8-2#TRMPBF
LTC2934CTS8-2#TRPBF
LTDKS
8-Lead Plastic TSOT-23
LTC2934ITS8-2#TRMPBF
LTC2934ITS8-2#TRPBF
LTDKS
8-Lead Plastic TSOT-23
LTC2934CDC-1#TRMPBF
LTC2934CDC-1#TRPBF
LDKT
8-Lead (2mm × 2mm) Plastic DFN
LTC2934IDC-1#TRMPBF
LTC2934IDC-1#TRPBF
LDKT
8-Lead (2mm × 2mm) Plastic DFN
LTC2934CDC-2#TRMPBF
LTC2934CDC-2#TRPBF
LDKV
8-Lead (2mm × 2mm) Plastic DFN
LTC2934IDC-2#TRMPBF
LTC2934IDC-2#TRPBF
LDKV
8-Lead (2mm × 2mm) Plastic DFN
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
2934f
2
LTC2934
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 3.6V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
VCC Input Supply Voltage
l
5.5
V
ICC
VCC Input Supply Current
l
225
500
1000
nA
394
400
406
mV
±2
±8
mV
1.6
Threshold Adjustment Inputs: ADJ, PFI
VTH
Input Threshold (Monitored Voltage Falling)
l
VTHM
ADJ to PFI Threshold Matching
l
VADJ(HYST)
Reset Threshold Hysteresis
(Monitored Voltage Rising)
l
18
20
25
mV
VPFI(HYST)
Power-Fail Threshold Hysteresis
(Monitored Voltage Rising)
l
8
10
15
mV
tUV
Undervoltage Detect to RST or PFO Falling
ITH(LKG)
Threshold Adjustment Input Leakage Current
VADJ or VPFI = VTH – 4mV (Note 3)
1
VADJ or VPFI = 420mV
l
0.1
ms
±1
nA
0.7 • VCC
1.4
V
V
Control Inputs: MR, RT
VIN(TH)
Control Input Threshold
RT
MR
l
l
0.3 • VCC
0.4
tPW
Input Pulse Width
MR
l
20
tPD
Propagation Delay to RST Falling
Manual Reset Falling
l
2
5
20
μs
RPU
Internal Pull-Up Resistance
MR
l
600
900
1200
kΩ
ILK
Input Leakage Current (RT Input)
RT = VCC or GND
l
±1
±10
nA
25
50
100
150
mV
mV
μs
Reset and Power Fail Outputs: RST, PFO
VOL
Voltage Output Low
VCC = 1V, 200μA Pull-Up Current
VCC = 3V, 3mA Pull-Up Current
l
l
VOH
Voltage Output High (LTC2934-2)
–200μA Pull-Down Current
l
IOH
Leakage Current, Output High (LTC2934-1)
VRST, VPFO = 3.6V
l
tRST
Reset Timeout Period
RT Input High
RT Input Low
l
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
0.7 • VCC
140
10
V
±1
±10
nA
200
15
260
25
ms
ms
Note 2. All currents into pins are positive, all voltages are referenced to
GND unless otherwise noted.
Note 3. Guaranteed by design. Characterized, but not production tested.
2934f
3
LTC2934
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
1000
TA = 25°C, unless otherwise noted.
ADJ, PFI Threshold vs Temperature
406
EXTERNALLY CONFIGURED
FOR 3V FALLING THRESHOLDS
404
800
85°C
VTH (mV)
ICC (nA)
402
600
25°C
400
–40°C
398
200
0
400
396
0
1
2
3
VCC (V)
5
4
394
–50
6
–25
0
25
50
TEMPERATURE (°C)
75
2934 G01
2934 G02
Comparator Undervoltage
Glitch Immunity
Reset Timeout Period
vs Temperature
260
VCC = 3.6V
VCC = RT = 3.6V
240
2.5
2.0
220
COMPARATORS PULL DOWN
ABOVE CURVE
tRST (ms)
GLITCH DURATION, t UV (ms)
3.0
100
1.5
200
1.0
180
0.5
160
0
0.1
1
10
COMPARATOR OVERDRIVE (%)
140
–50
100
–25
0
25
50
TEMPERATURE (°C)
75
2934 G03
2934 G04
Voltage Output Low vs Pull-Up
Current (RST, PFO)
100
Voltage Output High vs Pull-Down
Current (RST, PFO)
3.6
VCC = 3V
100
LTC2934-2
VCC = 3.6V
85°C
80
3.5
60
VOH (mV)
VOL (mV)
25°C
–40°C
40
25°C
3.3
20
0
–40°C
3.4
85°C
0
1
2
3
4
PULL-UP CURRENT (mA)
5
2934 G05
3.2
0
–0.4
–0.6
–0.8
–0.2
PULL-DOWN CURRENT (mA)
–1
2934 G06
2934f
4
LTC2934
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs RT
Input Voltage
Supply Current vs MR Input Voltage
5
VCC = 3.6V
200
4
150
3
ICC (μA)
ICC (μA)
250
TA = 25°C, unless otherwise noted.
100
50
VCC = 3.6V
2
1
0
0
0.5
1
1.5
2
2.5
3
RT INPUT VOLTAGE (V)
3.5
4
2934 G07
0
0
0.5
1
1.5
2
2.5
3
MR INPUT VOLTAGE (V)
3.5
4
2934 G08
PIN FUNCTIONS
ADJ: Reset Threshold Adjustment Input. Tie to resistive
divider between monitored voltage and GND to configure
desired reset threshold. See the Applications Information
section for details. Tie to VCC if unused.
Exposed Pad (DFN Only): Exposed Pad may be left floating
or connected to device ground.
GND: Device Ground.
MR: Manual Reset Input. Attach a push-button switch
between this input and ground. A logic low on this input
pulls RST low. When the MR input returns to logic high,
RST returns high after the reset timer has expired. Tie to
VCC if unused.
PFI: Power-Fail Threshold Adjustment Input. Tie to
resistive divider between monitored voltage and GND
to configure desired power-fail threshold. See the
Applications Information section for details. Tie to VCC or
GND if unused.
PFO: Power-Fail Output. PFO pulls low when monitored
voltage falls below the power-fail (PFI) threshold. PFO
is released when the PFI voltage rises above the powerfail threshold by 2.5%. PFO is available with open-drain
(LTC2934-1) or active pull-up (LTC2934-2) outputs. Leave
open if unused.
RST: Reset Output. RST pulls low when monitored voltage falls below the reset threshold. RST is released after
monitored voltage exceeds the reset threshold plus 5%
hysteresis and after reset timer has expired. RST is available
with open-drain (LTC2934-1) or active pull-up (LTC2934-2)
outputs. Leave open if unused.
RT: Reset Timeout Selection Input. Tie to GND or VCC for
desired reset timeout. Tie low for 15ms delay or high for
200ms delay.
VCC : Power Supply Input. Bypass VCC with 0.1μF to
GND.
2934f
5
LTC2934
BLOCK DIAGRAM
MR
VCC
RT
LTC2934-2 OPTION
VCC
900k
–
ADJ
RST
RC
RESET
DELAY
+
LTC2934-2 OPTION
VCC
0.4V
+
PC
PFO
–
PFI
GND
2934 BD
TIMING DIAGRAM
PFI / PFO Timing
VTH+HYST
VTH
VPFI
PFO
2935 TD01
ADJ / RST Timing
VTH+HYST
VTH
VADJ
t RST
t RST
RST
MR
2935 TD02
t PD
2934f
6
LTC2934
APPLICATIONS INFORMATION
VOLTAGE MONITORING
Threshold Configuration
Unmanaged power can cause various system problems.
At power-up, voltage fluctuation around critical thresholds
can cause improper system or processor initialization.
The LTC2934 provides power management capabilities
for the system power-up phase. The supervisory device
issues a system reset after the monitored voltage has
stabilized. Built-in hysteresis and filtering ensures that
fluctuations due to load transients or supply noise do
not cause chattering of the status outputs. Comparator
undervoltage glitch immunity is shown in the Typical
Performance Characteristics section. The curve demonstrates the transient amplitude and width required to
switch the comparators.
The LTC2934 monitors voltage applied to its inputs PFI and
ADJ. A resistive divider connected between a monitored
voltage and ground is used to bias the inputs. Figure 1
demonstrates how the monitor inputs can be made dependent upon a single voltage (V1). Only three resistors
are required. To calculate their values, specify desired
falling power fail (VPF) and reset voltages (VR) with VPF
> VR. For example:
Because many batteries exhibit large series resistance,
load currents can cause significant voltage drops. The
low DC current draw of the LTC2934 (at any input voltage) does not add to the loading problem. When voltage
is initially applied to VCC, RST and PFO pull low once there
is enough voltage to turn on the pull-down devices (1V
maximum).
VPF = 1.72V, VR = 1.62V
V1
R3
ADJ
LTC2934
R2
PFI
R1
2934 F01
Figure 1. Configuration for Single Voltage Monitoring
If the monitored supply voltage falls to the power-fail
threshold, the built-in power-fail comparator pulls PFO low.
PFO remains low until the PFI input rises above 0.4V plus
2.5% hysteresis. PFO is typically used to signal preparation
for controlled shutdown. For example, the PFO output may
be connected to a processor nonmaskable interrupt. Upon
interrupt, the processor begins shutdown procedures such
as supply sequencing and/or storage/erasure of system
state in nonvolatile memory.
The solution for R1, R2, and R3 provides three equations
and three unknowns. Maximum resistor size is governed
by maximum input leakage current. For the LTC2934, the
maximum input leakage current over temperature is 1nA.
For a maximum error of 1% due to both input currents,
the resistor divider current should be 100 times the sum
of the leakage currents, or 0.2μA. At the reset threshold,
V1 = 1.62V, so RSUM = V1/0.2μA = 8.1M where:
If the monitored voltage drops below the reset threshold,
RST pulls low until the ADJ input rises above 0.4V plus
5% hysteresis. This may occur through battery charging
or replacement. An internal reset timer delays the return
of the RST output to a high state to provide settling and
initialization time. The RST output is typically connected
to processor reset input.
The falling monitor thresholds (VTH) are 0.4 volts, so:
Few, if any external components are necessary for reliable
operation. However, a decoupling capacitor between VCC
and ground is recommended (0.01μF minimum).
RSUM = R1 + R2 + R3
R1 =
VTH • R SUM
0 . 4V • 8 . 1M
=
= 1 . 88M
VPF
1 . 72V
The closest 1% value is 1.87M. R2 can be determined
from:
VTH • R SUM
0 . 4V • 8 . 1M
– R1 =
− 1 . 87M
VR
1 . 62V
R2 = 130k
R2 =
2934f
7
LTC2934
APPLICATIONS INFORMATION
R3 is easily obtained from:
Selecting Output Logic Style
R3 = RSUM – R1 – R2 = 8.1M – 1.87M – 130k = 6.1M
The closest 1% value is 6.04M. Plugging the standard
values back into the equations yields the design values
for the falling power-fail and reset voltages:
VPF = 1.720V, VR = 1.608V
Figure 2 demonstrates how the inputs can be biased
to monitor two voltages (V1, V2). In this example, four
resistors are required. Calculate each divider ratio for the
desired falling threshold (VFT) using:
RnB VFT
V
=
− 1 = FT − 1
0 . 4V
RnA VTH
In Figure 2, PFO is tied back to the MR input, making the
state of the RST output dependent upon both V1 and V2. If
V1 and V2 are both above the configured falling threshold
plus hysteresis, RST is allowed to pull high. If independent
operation of the status outputs is desired, simply omit the
PFO to MR connection.
R1B
ADJ
V1
RST
LTC2934
R2B
PFO
PFI
V2
R2A
R1A
2934 F02
MR
Figure 2. Dual Voltage Monitoring
3.5
Some applications require the RST and/or PFO outputs to
be valid with VCC down to ground. Active pull-up handles
this requirement with the addition of an external resistor
from the output to ground. The resistor provides a path
for leakage currents, preventing the output from floating to
undetermined voltages when connected to high impedance
(such as CMOS logic inputs). The resistor value should
be small enough to provide effective pull-down without
excessively loading the pull-up circuitry. A 100k resistor
from output to ground is satisfactory for most applications.
When the status outputs are high, power is dissipated in
the pull-down resistors. Figure 4 demonstrates typical
LTC2934-2 RST output behavior.
3.5
LTC2934-2
3.0
EXTERNALLY CONFIGURED
FOR 3V FALLING THRESHOLD
EXTERNALLY CONFIGURED
FOR 3V FALLING THRESHOLD
2.5
RST (V)
2.5
RST (V)
The active pull-up option (LTC2934-2) eliminates the
need for external pull-up resistors on the status outputs.
Integrated pull-up devices pull the outputs up to VCC.
Actively pulled up outputs may not be driven above VCC.
LTC2934-1
3.0
2.0
1.5
2.0
1.5
1.0
1.0
0.5
0.5
0
0
0
0.5
1
1.5
2
VCC (V)
2.5
3
3.5
2934 F03
Figure 3. RST vs VCC with 10k Pull-Up
8
The LTC2934 status outputs are available in two options:
open-drain (LTC2934-1) or active pull-up (LTC2934-2).
The open-drain option (LTC2934-1) allows the outputs
to be pulled up to a user defined voltage with a resistor.
The open-drain pull-up voltage may be greater than VCC
(5.5V maximum), which is not always possible with
inferior battery supervisors, due to internal diode clamps.
When the status outputs are low, power is dissipated in
the pull-up resistors. Recommended resistor values lie in
the range between 10k and 470k. Figure 3 demonstrates
typical LTC2934-1 RST output behavior.
0
0.5
1
1.5
2
2.5
VCC (V)
Figure 4. RST vs VCC
3
3.5
2934 F04
2934f
LTC2934
APPLICATIONS INFORMATION
Manual Reset Input
When VCC is above its reset threshold, and the manual
reset input (MR) is pulled low, the RST output is forced
low. RST remains low for the selected reset timeout
period after the manual reset input is released and pulled
high. The manual reset input is pulled up internally through
900k to VCC. If external leakage currents have the ability
to pull down the manual reset input below its logic threshold, a lower value pull-up resistor, placed between VCC and
MR will fix the problem.
Input MR is often pulled down through a pushbutton
switch requiring human contact. If extended ESD toler-
ance is required, series resistance between the switch and
the input is recommended. For most applications a 10k
resistor provides sufficient current limiting.
Selecting the Reset Timeout Period
Use the RT input to select between two fixed reset timeout
periods. Connect RT to ground for a 15ms timeout. Connect
RT to VCC for a 200ms timeout. The reset timeout period
occurs after the ADJ input is driven above threshold. After
the reset timeout period, the RST output is allowed to pull
up to a high state.
TYPICAL APPLICATIONS
Battery Monitor with Interface to Low Voltage Logic
3μA LDO
IN
SHDN
LT3009
OUT
GND
ADJ
1.8V
1.18M
0.1μF
1μF
590k
+
698k
RT
ADJ
PFI
100k
100k
VDD
VCC
324k
Li-Ion
100k
100k
PFO
NMI
LTC2934-1
μP
RESD*
10k
RST
MR
RST
GND
PB1
Alkaline Cell Stack Voltage Monitor
VCC
845k
+
+
+
MR
Coin Cell Voltage Monitor
0.1μF
VCC
RT
1.5V
12.7k
1.5V
154k
LTC2934-2
845k
PFO
RST
PFI
GND
LOW BATTERY
+
LTC2934-2
ADJ
CR2032
0.1μF
PFO
LOW BATTERY
RST
SYSTEM RESET
10k
SYSTEM RESET
PFI
147k
2934 TA03
POWER FAIL THRESHOLD = 2.628V
RESET THRESHOLD = 2.428V
MR
RT
1.5V
ADJ
2934 TA02
POWER FAIL FALLING THRESHOLD = 3.192V
RESET FALLING THRESHOLD = 1.696V
*OPTIONAL RESISTOR FOR ADDED ESD PROTECTION
GND
2934 TA04
POWER FAIL THRESHOLD = 2.727V
RESET THRESHOLD = 2.553V
2934f
9
LTC2934
PACKAGE DESCRIPTION
DC Package
8-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1719 Rev Ø)
0.70 ±0.05
2.55 ±0.05
1.15 ±0.05 0.64 ±0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.45 BSC
1.37 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.05
TYP
2.00 ±0.10
(4 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
R = 0.115
TYP
5
8
0.40 ± 0.10
0.64 ± 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER
(DC8) DFN 0106 REVØ
4
0.200 REF
1
0.23 ± 0.05
0.45 BSC
0.75 ±0.05
1.37 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
2934f
10
LTC2934
PACKAGE DESCRIPTION
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
0.52
MAX
2.90 BSC
(NOTE 4)
0.65
REF
1.22 REF
1.4 MIN
3.85 MAX 2.62 REF
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
1.95 BSC
TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
2934f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC2934
TYPICAL APPLICATION
Portable Device Battery Monitor
3μA LDO
1.8V
IN
0.1μF
+
866k
Li-Ion
VCC
RT
100k
SHDN
LT3009
OUT
GND
ADJ
1.18M
1μF
RST
ADJ
LTC2934-1
6.34k
100k
590k
PFI
127k
MR
GND
LOW BATTERY
EARLY WARNING
PFO
2934 TA05
POWER FAIL FALLING THRESHOLD = 3.148V
RESET FALLING THRESHOLD = 2.998V
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC690
5V Supply Monitor, Watchdog Timer and Battery Backup
4.65V Threshold
LTC694-3.3
3.3V Supply Monitor, Watchdog Timer and Battery Backup
2.9V Threshold
LTC1232
5V Supply Monitor, Watchdog Timer and Pushbutton Reset
4.37V/4.62V Threshold
LTC1326
Micropower Triple Supply Monitor for 5V/2.5V, 3.3V and ADJ
4.725V, 3.118V, 1V Threshold (±0.75%) and ADJ
LTC1726
Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and ADJ
Adjustable Reset and Watchdog Timeouts
LTC1727
Micropower Triple Supply Monitor with Open-Drain Reset
Individual Monitor Outputs in MSOP
LTC1728
Micropower Triple Supply Monitor with Open-Drain Reset
5-Lead SOT-23 Package
LTC1985
Micropower Triple Supply Monitor with Push-Pull Reset Output
5-Lead SOT-23 Package
LTC2900
Programmable Quad Supply Monitor
Adjustable Reset, 10-Lead MSOP and DFN Packages
LTC2901
Programmable Quad Supply Monitor
Adjustable Reset and Watchdog Timer
LTC2902
Programmable Quad Supply Monitor
Adjustable Reset and Tolerance
LTC2903
Precision Quad Supply Monitor
6-Lead SOT-23 Package
LTC2904/LTC2905/
LTC2906/LTC2907
Three-State Programmable Precision Dual Supply Monitor
8-Lead SOT-23 and DFN Packages
LTC2908
Precision Six-Supply Monitor (Four Fixed and Two Adjustable)
8-Lead TSOT-23 and DFN Packages
LTC2909
Precision Triple/Dual Input UV, OV and Negative Voltage Monitor
Shunt Regulated VCC Pin, Adjustable Threshold and Reset,
8-Lead SOT-23 and DFN Packages
LTC2910
Octal Positive/Negative Voltage Monitor
Separate VCC Pin, Eight Inputs, Up to Two Negative Monitors
Adjustable Reset Timer, 16-Lead SSOP and DFN Packages
LTC2912/LTC2913/
LTC2914
Single/Dual/Quad UV and OV Voltage Monitors
Separate VCC Pin, Adjustable Reset Timer
LTC2915/LTC2916/
LTC2917/LTC2918
Single Voltage Supervisors with 27 Pin-Selectable Thresholds
Manual Reset and Watchdog Functions, 8- and 10-Lead
TSOT-23, MSOP and DFN Packages
LTC2935
Ultralow Power Supervisor with Eight Pin-Selectable Thresholds
500nA Quiescent Current, 2mm × 2mm 8-Lead DFN and
TSOT-23 Packages
2934f
12 Linear Technology Corporation
LT 0508 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2008
Similar pages