Intersil ISL81387 ±15kv esd protected, 5v, dual protocol (rs-232/rs-485) transceiver Datasheet

ISL81387, ISL41387
®
Data Sheet
November 21, 2007
±15kV ESD Protected, 5V, Dual Protocol
(RS-232/RS-485) Transceivers
These devices are BiCMOS interface ICs that are user
configured as either a single RS-422, RS-485 differential
transceiver, or as a dual (2 Tx, 2 Rx) RS-232 transceiver.
In RS-232 mode, the on-board charge pump generates
RS-232 compliant ±5V Tx output levels, from a supply as low
as 4.5V. Four small 0.1µF capacitors are required for the
charge pump. The transceivers are RS-232 compliant, with
the Rx inputs handling up to ±25V, and the Tx outputs
handling ±12V.
In RS-485 mode, the transceivers support both the RS-485
and RS-422 differential communication standards. The
RS-485 receiver features "full failsafe" operation, so the Rx
output remains in a high state if the inputs are open or
shorted together. The RS-485 transmitter supports up to
three data rates, two of which are slew rate limited for
problem free communications. The charge pump disables in
RS-485 mode, thereby saving power, minimizing noise, and
eliminating the charge pump capacitors.
FN6201.3
Features
• 5V Powered, User Selectable RS-232 or RS-485, RS-422
Interface Port (Two RS-232 Transceivers or One RS-485,
RS-422 Transceiver)
• ±15kV (HBM) ESD Protected Bus Pins (RS-232 or
RS-485)
• Flow-Through Pinouts Simplify Board Layouts
• Pb-Free (RoHS Compliant)
• Large (2.7V) Differential VOUT for Improved Noise
Immunity in RS-485, RS-422 Networks
• Full Failsafe (Open/Short) Rx in RS-485, RS-422 Mode
• Loopback Mode Facilitates Board Self Test Functions
• User Selectable RS-485 Data Rates . . . . . . . . . . 20Mbps
- Slew Rate Limited. . . . . . . . . . . . . . . . . . . . . . . 460kbps
- Slew Rate Limited (ISL41387 Only) . . . . . . . . . 115kbps
• Fast RS-232 Data Rate . . . . . . . . . . . . . . . Up to 650kbps
• Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . .35µA
• QFN Package Saves Board Space (ISL41387 Only)
Both RS-232, RS-485 modes feature loopback and
shutdown functions. The loopback mode internally connects
the Tx outputs to the corresponding Rx input, which
facilitates the implementation of board level self test
functions. The outputs remain connected to the loads during
loopback, so connection problems (e.g., shorted connectors
or cables) can be detected. The shutdown mode disables
the Tx and Rx outputs, disables the charge pump if in
RS-232 mode, and places the IC in a low current (20µA)
mode.
The ISL41387 is a QFN packaged device that offers
additional functionality, including a lower speed and edge
rate option (115kbps) for EMI sensitive designs, or to allow
longer bus lengths. It also features a logic supply voltage pin
(VL) that sets the VOH level of logic outputs, and the
switching points of logic inputs, to be compatible with
another supply voltage in mixed voltage systems. The QFN's
choice of active high or low Rx enable pins increases design
flexibility, allowing Tx/Rx direction control via a single signal
by connecting DEN and RXEN together.
• Logic Supply Pin (VL) Eases Operation in Mixed Supply
Systems (ISL41387 Only)
Applications
• Gaming Applications (e.g., Slot machines)
• Single Board Computers
• Factory Automation
• Security Networks
• Industrial/Process Control Networks
• Level Translators (e.g., RS-232 to RS-422)
• Point of Sale Equipment
For a dual port version of these devices, please see the
ISL81334, ISL41334 data sheet.
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF
PORTS
PACKAGE OPTIONS
RS-485 DATA
RATE (bps)
RS-232 DATA
RATE (kbps)
VL PIN?
ACTIVE H or L
Rx ENABLE?
LOW POWER
SHUTDOWN?
ISL81387
1
20 Ld SOIC, 20 Ld SSOP
20M, 460k
650
NO
H
YES
ISL41387
1
40 Ld QFN (6mmx6mm)
20M, 460k, 115k
650
YES
BOTH
YES
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005, 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL81387, ISL41387
Ordering Information
PART NUMBER (Note)
PART MARKING
TEMP. RANGE (°C)
PACKAGE (Pb-Free)
PKG. DWG. #
ISL81387IAZ
81387 IAZ
-40 to +85
20 Ld SSOP
M20.209
ISL81387IAZ-T*
81387 IAZ
-40 to +85
20 Ld SSOP (Tape and Reel)
M20.209
ISL81387IBZ
ISL81387IBZ
-40 to +85
20 Ld SOIC
M20.3
ISL81387IBZ-T*
ISL81387IBZ
-40 to +85
20 Ld SOIC (Tape and Reel)
M20.3
ISL41387IRZ
41387 IRZ
-40 to +85
40 Ld QFN
L40.6x6
ISL41387IRZ-T*
41387 IRZ
-40 to +85
40 Ld QFN (Tape and Reel)
L40.6x6
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
Pinouts
ISL81387
(20 LD SOIC, SSOP)
TOP VIEW
C1+ 1
20 C2+
C1- 2
19 C2-
V+
18 VCC
3
A 4
17 RA
B 5
16 RB
Y 6
15 DY
Z 7
14 DZ/SLEW
13 ON
485/232 8
DEN 9
12 RXEN
GND 10
11 V-
2
NC
NC
C1-
C1+
C2+
C2-
VCC
NC
NC
VL
ISL41387
(40 LD QFN)
TOP VIEW
40
39
38
37
36
35
34
33
32
31
4
27 DZ/SLEW
Z
5
26 NC
NC
6
25 NC
NC
7
24 NC
NC
8
23 NC
NC
9
22 NC
NC
10
21 ON
11
12
13
14
15
16
17
18
19
20
RXEN
Y
V-
28 DY
NC
3
RXEN
B
GND
29 RB
GND
2
SPB
A
NC
30 RA
DEN
1
485/232
V+
FN6201.3
November 21, 2007
ISL81387, ISL41387
TABLE 2. ISL81387 FUNCTION TABLE
RECEIVER
OUTPUTS
CHARGE
PUMPS
(Note 1)
LOOPBACK
(Note 2)
MODE
RA
RB
Y
Z
DRIVER
SPEED
(Mbps)
N.A.
High-Z
High-Z
High-Z
High-Z
-
ON
OFF
RS-232
1
N.A.
High-Z
High-Z
ON
ON
0.46
ON
OFF
RS-232
1
0
N.A.
ON
ON
High-Z
High-Z
-
ON
OFF
RS-232
1
1
1
N.A.
ON
ON
ON
ON
0.46
ON
OFF
RS-232
0
0
0
1
N.A.
High-Z
High-Z
ON
High-Z
0.46
ON
OFF
RS-232
0
0
1
0
N.A.
High-Z
ON
ON
High-Z
0.46
ON
OFF
RS-232
0
0
1
1
N.A.
ON
ON
ON
ON
0.46
ON
ON
RS-232
X
0
0
0
X
High-Z
High-Z
High-Z
High-Z
-
OFF
OFF
Shutdown
1
1
0
0
X
High-Z
High-Z
High-Z
High-Z
-
OFF
OFF
RS-485
1
X
0
1
1/0
High-Z
High-Z
ON
ON
20/0.46
OFF
OFF
RS-485
1
X
1
0
X
ON
High-Z
High-Z
High-Z
-
OFF
OFF
RS-485
1
1
1
1
1/0
ON
High-Z
ON
ON
20/0.46
OFF
OFF
RS-485
1
0
1
1
1/0
ON
High-Z
ON
ON
20/0.46
OFF
ON
RS-485
INPUTS
485/232
ON
RXEN
0
1
0
0
0
1
0
0
1
0
DEN SLEW
DRIVER OUTPUTS
NOTES:
1. Charge pumps are on if in RS-232 mode and ON or DEN or RXEN are high.
2. Loopback is enabled when ON = 0, and DEN = RXEN = 1.
ISL81387 Truth Tables
RS-485 TRANSMITTING MODE
RS-232 TRANSMITTING MODE
INPUTS (ON = 1)
INPUTS (ON = 1)
OUTPUTS
OUTPUTS
485/232
DEN
DY
DZ
Y
Z
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
1
0
1
1
1
0
0
0
0
X
X
High-Z
High-Z
485/232
DEN
DY
SLEW
Y
Z
DATA RATE
(Mbps)
1
1
0
1
1
0
20
1
1
1
1
0
1
20
1
1
0
0
1
0
0.46
1
1
1
0
0
1
0.46
1
0
X
X
-
RS-485 RECEIVING MODE
RS-232 RECEIVING MODE
INPUTS (ON = 1)
INPUTS (ON = 1)
OUTPUT
485/232
RXEN
A
B
RA
RB
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
1
0
1
1
1
0
0
0
1
Open
Open
1
1
0
0
X
X
High-Z
High-Z
3
High-Z High-Z
OUTPUT
485/232
RXEN
B-A
RA
RB
1
1
≥ -40mV
1
High-Z
1
1
≤ -200mV
0
High-Z
1
1
Open or Shorted together
1
High-Z
1
0
X
High-Z
High-Z
FN6201.3
November 21, 2007
ISL81387, ISL41387
TABLE 3. ISL41387 FUNCTION TABLE
RECEIVER
OUTPUTS
INPUTS
DRIVER
OUTPUTS
Z
DRIVER
DATA
RATE
(Mbps)
CHARGE
PUMPS
(Note 3)
MODE
485/232
ON
RXEN
and/or
RXEN
0
1
1 and 0
0
N.A.
N.A.
High-Z
High-Z
High-Z
High-Z
-
ON
RS-232
0
1
1 and 0
1
N.A.
N.A.
High-Z
High-Z
ON
ON
0.46
ON
RS-232
0
1
0 or 1
0
N.A.
N.A.
ON
ON
High-Z
High-Z
-
ON
RS-232
0
1
0 or 1
1
N.A.
N.A.
ON
ON
ON
ON
0.46
ON
RS-232
0
0
1 and 0
1
N.A.
N.A.
High-Z
High-Z
ON
High-Z
0.46
ON
RS-232
0
0
0 or 1
0
N.A.
N.A.
High-Z
ON
ON
High-Z
0.46
ON
RS-232
0
0
0 or 1
1
N.A.
N.A.
ON
ON
ON
ON
0.46
ON
RS-232 (Note 4)
X
0
1 and 0
0
X
X
High-Z
High-Z
High-Z
High-Z
-
OFF
Shutdown
1
1
1 and 0
0
X
X
High-Z
High-Z
High-Z
High-Z
-
OFF
RS-485
1
X
1 and 0
1
0
1/0
High-Z
High-Z
ON
ON
0.46/0.115
OFF
RS-485
1
X
1 and 0
1
1
X
High-Z
High-Z
ON
ON
20
OFF
RS-485
1
X
0 or 1
0
X
X
ON
High-Z
High-Z
High-Z
-
OFF
RS-485
1
1
0 or 1
1
0
1/0
ON
High-Z
ON
ON
0.46/0.115
OFF
RS-485
1
1
0 or 1
1
1
X
ON
High-Z
ON
ON
20
OFF
RS-485
1
0
0 or 1
1
0
1/0
ON
High-Z
ON
ON
0.46/0.115
OFF
RS-485 (Note 4)
1
0
0 or 1
1
1
X
ON
High-Z
ON
ON
20
OFF
RS-485 (Note 4)
DEN
SLEW
SPB
RA
RB
Y
NOTES:
3. Charge pumps are on if in RS-232 mode and ON or DEN or RXEN is high, or RXEN is low.
4. Loopback is enabled when ON = 0, and DEN = 1, and (RXEN = 1 or RXEN = 0).
ISL41387 Truth Tables
RS-485 TRANSMITTING MODE
RS-232 TRANSMITTING MODE
INPUTS (ON = 1)
INPUTS (ON = 1)
OUTPUTS
OUTPUTS
DATA
485/232
DEN
SLEW
SPB
DY
Y
Z
Mbps
485/232
DEN
DY
DZ
Y
Z
1
1
0
0
0/1
1/0
0/1
0.115
0
1
0
0
1
1
1
1
0
1
0/1
1/0
0/1
0.460
0
1
0
1
1
0
1
1
1
X
0/1
1/0
0/1
20
0
1
1
0
0
1
1
0
X
X
X
0
1
1
1
0
0
0
0
X
X
High-Z
High-Z
High-Z High-Z
RS-485 RECEIVING MODE
INPUTS (ON = 1)
RS-232 RECEIVING MODE
INPUTS (ON = 1)
485/232 RXEN and/or RXEN
OUTPUT
485/232 RXEN and/or RXEN
A
B
RA
RB
0
0 or 1
0
0
1
1
0
0 or 1
0
1
1
0
0
0 or 1
1
0
0
1
0
0 or 1
1
1
0
0
0
0 or 1
Open
Open
1
1
0
1 and 0
X
X
4
-
OUTPUT
B-A
RA
RB
1
0 or 1
≥ -40mV
1
High-Z
1
0 or 1
≤ -200mV
0
High-Z
1
0 or 1
Open or Shorted
together
1
High-Z
1
1 and 0
X
High-Z High-Z
High-Z High-Z
FN6201.3
November 21, 2007
ISL81387, ISL41387
Pin Descriptions
PIN
MODE
FUNCTION
485/232
BOTH
Interface Mode Select input. High for RS-485 Mode and low for RS-232 Mode.
DEN
BOTH
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DEN high. They are high impedance when DEN
is low.
GND
BOTH
Ground connection.
NC
BOTH
No Connection.
ON
BOTH
In RS-232 mode only, ON high enables the charge pumps. ON low, with DEN and RXEN low (and RXEN high if QFN), turns
off the charge pumps (in RS-232 mode), and in either mode places the device in low power shutdown. In both modes, when
ON is low, and DEN is high, and RXEN is high or RXEN is low, loopback is enabled.
RXEN
BOTH
Receiver output enable. Rx is enabled when RXEN is high; Rx is high impedance when RXEN is low and, if using the QFN
package, RXEN is high. When using the QFN and the active high Rx enable function, RXEN should be high or floating.
RXEN
BOTH
Active low receiver output enable. Rx is enabled when RXEN is low; Rx is high impedance when RXEN is high and RXEN
is low. (i.e., to use active low Rx enable function, tie RXEN to GND). For single signal Tx/Rx direction control, connect RXEN
to DEN. Internally pulled high. (QFN only)
VCC
BOTH
System power supply input (5V).
VL
BOTH
Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply. (QFN only)
A
RS-232 Receiver input with ±15kV ESD protection. A low on A forces RA high; a high on A forces RA low.
RS-485 Inverting receiver input with ±15kV ESD protection.
B
RS-232 Receiver input with ±15kV ESD protection. A low on B forces RB high; a high on B forces RB low.
RS-485 Noninverting receiver input with ±15kV ESD protection.
DY
RS-232 Driver input. A low on DY forces output Y high. Similarly, a high on DY forces output Y low.
RS-485 Driver input. A low on DY forces output Y high and output Z low. Similarly, a high on DY forces output Y low and output Z high.
DZ
SLEW
SPB
RA
RS-232 Driver input. A low on DZ forces output Z high. Similarly, a high on DZ forces output Z low.
RS-485 Slew rate control. With the SLEW pin high, the drivers run at the maximum slew rate (20Mbps). With the SLEW pin low, the
drivers run at a reduced slew rate (460kbps). On the QFN version, works in conjunction with SPB to select one of three
RS-485 data rates. Internally pulled high in RS-485 mode.
RS-485 Speed control. Works in conjunction with the SLEW pin to select the 20Mbps, 460kbps or 115kbps RS-485 data rate.
Internally pulled high. (QFN only)
RS-232 Receiver output.
RS-485 Receiver output: If B > A by at least -40mV, RA is high; If B < A by -200mV or more, RA is low; RA = High if A and B are
unconnected (floating) or shorted together (i.e., full fail-safe).
RB
RS-232 Receiver output.
RS-485 Not used. Output is high impedance, and unaffected by RXEN and RXEN.
Y
RS-232 Driver output with ±15kV ESD protection.
RS-485 Inverting driver output with ±15kV ESD protection.
Z
RS-232 Driver output with ±15kV ESD protection.
RS-485 Noninverting driver output with ±15kV ESD protection.
C1+
RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed in RS-485 Mode.
C1-
RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed in RS-485 Mode.
C2+
RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed in RS-485 Mode.
C2-
RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed in RS-485 Mode.
V+
RS-232 Internally generated positive RS-232 transmitter supply (+5.5V). C3 not needed in RS-485 Mode.
V-
RS-232 Internally generated negative RS-232 transmitter supply (-5.5V). C4 not needed in RS-485 Mode.
/
5
FN6201.3
November 21, 2007
ISL81387, ISL41387
Typical Operating Circuit
RS-232 MODE WITHOUT LOOPBACK
+5V
+
+5V
0.1µF
1
C1
0.1µF
+
C2
0.1µF
+
2
20
19
C1+
VCC
V+
C1C2+
3
V- 11
C2-
17
R
5kΩ
5
B
+
18
4
A
RS-232 MODE WITH LOOPBACK
16
R
5kΩ
+ C3
0.1µF
C4
0.1µF
+
1
C1
0.1µF
+
C2
0.1µF
+
18
C1+
2
VCC
V+
C1C2+
20
19
3
V- 11
5
B1
C4
0.1µF
+
17
R
RA
5kΩ
RB
+ C3
0.1µF
C2-
4
A1
RA
0.1µF
16
R
5kΩ
RB
LB
Rx
6
Y
15
D
7
Z
14
D
9
VCC
6
Y
DZ
VCC
RXEN
ON
485/232
13
9
C1
0.1µF
C2
0.1µF
A
B
485/232
Z
13
NOTE: PINOUT FOR SOIC AND SSOP
NOTE: PINOUT FOR SOIC AND SSOP
RS-485 MODE WITH LOOPBACK
+5V
0.1µF
2
19
+
18
C1+
VCC
C1C2+
V+
3
V- 11
C2-
4
17
R
5
+ C3
0.1µF
C4
0.1µF
+
+
2
20
C2
0.1µF
RA
0.1µF
1
C1
0.1µF
+
19
A
4
B
5
C1+
18
VCC
C1C2+
V+
17
R
15
D
14
9
VCC
16
DY
Y
VCC
RXEN
ON
485/232
6
15
D
7
SLEW
14
12
DEN
8
13
GND
+ C3
0.1µF
C4
0.1µF
+
RA
LB
Rx
6
7
3
V- 11
C2-
RB
Z
VCC
ON
GND
16
Y
VCC
RXEN
DEN
8
10
20
+
DZ
10
1
+
DY
12
VCC
VCC
RS-485 MODE WITHOUT LOOPBACK
+
14
D
GND
+5V
15
D
7
Z
12
DEN
8
DY
VCC
9
VCC
VCC
SLEW
12
VCC
RXEN
DEN
8
RB
DY
485/232
GND
ON
13
10
10
NOTE: PINOUT FOR SOIC AND SSOP
NOTE: PINOUT FOR SOIC AND SSOP
6
FN6201.3
November 21, 2007
ISL81387, ISL41387
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
VL (QFN Only) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Input Voltages
All Except A, B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
Input/Output Voltages
A, B (Any Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V to +25V
Y, Z (Any Mode, Note 5) . . . . . . . . . . . . . . . . . . . -12.5V to +12.5V
RA, RB (non-QFN Package). . . . . . . . . . . . -0.5V to (VCC + 0.5V)
RA, RB (QFN Package) . . . . . . . . . . . . . . . . -0.5V to (VL + 0.5V)
Output Short Circuit Duration
Y, Z, RA, RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance
θJA (°C/W)
20 Ld SOIC Package (Note 7) . . . . . . . . . . . . . . . . .
65
20 Ld SSOP Package (Note 7) . . . . . . . . . . . . . . . .
60
40 Ld QFN Package (Note 6). . . . . . . . . . . . . . . . . .
32
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
5. One output at a time, IOUT ≤ 100mA for ≤ 10 mins.
6. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
7. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1μF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = +25°C (Note 8).
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
MIN
(°C) (Note 15)
TYP
MAX
(Note 15) UNITS
DC CHARACTERISTICS - RS-485 DRIVER (485/232 = VCC)
Driver Differential VOUT (no load)
VOD1
Driver Differential VOUT (with load)
VOD2
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
Full
-
-
VCC
V
R = 50Ω (RS-422) (Figure 1)
Full
2.5
3.1
-
V
R = 27Ω (RS-485) (Figure 1)
Full
2.2
2.7
5
V
VOD3
RD = 60Ω, R = 375Ω, VCM = -7V to 12V (Figure 1)
Full
2
2.7
5
V
ΔVOD
R = 27Ω or 50Ω (Figure 1)
Full
-
0.01
0.2
V
VOC
R = 27Ω or 50Ω (Figure 1) (Note 12)
Full
-
-
3.1
V
ΔVOC
R = 27Ω or 50Ω (Figure 1) (Note 12)
Full
-
0.01
0.2
V
Full
35
-
250
mA
VOUT = 12V
Full
-
-
150
µA
VOUT = -7V
Full
-150
-
-
µA
Driver Short-Circuit Current,
VOUT = High or Low
IOS
-7V ≤ (VY or VZ) ≤ 12V (Note 10)
Driver Three-State Output Leakage
Current (Y, Z)
IOZ
Outputs Disabled,
VCC = 0V or 5.5V
DC CHARACTERISTICS - RS-232 DRIVER (485/232 = 0V)
Driver Output Voltage Swing
VO
All TOUTS Loaded with 3kΩ to Ground
Full
±5.0
+6/-7
-
V
Driver Output Short-Circuit Current
IOS
VOUT = 0V
Full
-60
25/-35
60
mA
DC CHARACTERISTICS - LOGIC PINS (i.e., DRIVER AND CONTROL INPUT PINS)
Input High Voltage
7
VIH1
VL = VCC if QFN
Full
2
1.6
-
V
VIH2
VL = 3.3V (QFN Only)
Full
2
1.2
-
V
VIH3
VL = 2.5V (QFN Only)
Full
1.5
1
-
V
FN6201.3
November 21, 2007
ISL81387, ISL41387
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1μF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = +25°C (Note 8). (Continued)
PARAMETER
SYMBOL
Input Low Voltage
TEST CONDITIONS
TEMP
MIN
(°C) (Note 15)
TYP
MAX
(Note 15) UNITS
VIL1
VL = VCC if QFN
Full
-
1.4
0.8
V
VIL2
VL = 3.3V (QFN Only)
Full
-
1
0.7
V
VIL3
VL = 2.5V (QFN Only)
Full
-
0.8
0.5
V
IIN1
Except SLEW, RXEN (QFN), and SPB (QFN)
Full
-2
-
2
µA
IIN2
SLEW (Note 13), RXEN (QFN), and SPB (QFN)
Full
-25
-
25
µA
-7V ≤ VCM ≤ 12V, Full Failsafe
Full
-0.2
-
-0.04
V
VCM = 0V
25
-
35
-
mV
VIN = 12V
Full
-
-
0.8
mA
VIN = -7V
Full
-0.64
-
-
mA
Full
15
-
-
kΩ
Input Current
DC CHARACTERISTICS - RS-485 RECEIVER INPUTS (485/232 = VCC)
Receiver Differential Threshold
Voltage
VTH
ΔVTH
Receiver Input Hysteresis
Receiver Input Current (A, B)
IIN
Receiver Input Resistance
RIN
VCC = 0V or 4.5V to 5.5V
-7V ≤ VCM ≤ 12V, VCC = 0 (Note 11), or
4.5V ≤ VCC ≤ 5.5V
DC CHARACTERISTICS - RS-232 RECEIVER INPUTS (485/232 = GND)
Receiver Input Voltage Range
VIN
Full
-25
-
25
V
Receiver Input Threshold
VIL
Full
-
1.4
0.8
V
VIH
Full
2.4
1.9
-
V
Receiver Input Hysteresis
ΔVTH
25
-
0.5
-
V
Receiver Input Resistance
RIN
Full
3
5
7
kΩ
VIN = ±15V, VCC Powered Up (Note 11)
DC CHARACTERISTICS - RECEIVER OUTPUTS (485 OR 232 MODE)
Receiver Output High Voltage
VOH1
IO = -2mA (VL = VCC if QFN)
Full
3.5
4.6
-
V
VOH2
IO = -650μA, VL = 3V (QFN Only)
Full
2.6
2.9
-
V
VOH3
IO = -500μA, VL = 2.5V (QFN Only)
Full
2
2.4
-
V
Receiver Output Low Voltage
VOL
IO = 3mA
Full
-
0.1
0.4
V
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
7
-
85
mA
Receiver Three-State Output
Current
IOZR
Output Disabled, 0V ≤ VO ≤ VCC (or VL for QFN)
Full
-
-
±10
µA
ICC232
485/232 = 0V, ON = VCC
Full
-
3.7
7
mA
ICC485
485/232 = VCC, ON = VCC
Full
-
1.6
5
mA
ISHDN232
ON = DEN = RXEN = 0V
(RXEN = SPB = VCC if QFN)
Full
-
5
30
µA
ISHDN485
ON = DEN = RXEN = SLEW = 0V
(RXEN = VCC, SPB = 0V if QFN)
Full
-
35
60
µA
Bus Pins (A, B, Y, Z) Any Mode
Human Body Model
25
-
15
-
kV
All Other Pins
Human Body Model
25
-
4
-
kV
POWER SUPPLY CHARACTERISTICS
No-Load Supply Current (Note 9)
Shutdown Supply Current
ESD CHARACTERISTICS
RS-232 DRIVER and RECEIVER SWITCHING CHARACTERISTICS (485/232 = 0V, ALL VERSIONS AND SPEEDS)
Driver Output Transition Region
Slew Rate
SR
8
RL = 3kΩ, Measured From 3V to CL ≥ 15pF
-3V or -3V to 3V
CL ≤ 2500pF
Full
-
18
30
V/µs
Full
4
12
-
V/µs
FN6201.3
November 21, 2007
ISL81387, ISL41387
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1μF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = +25°C (Note 8). (Continued)
PARAMETER
SYMBOL
Driver Output Transition Time
tr, tf
Driver Propagation Delay
tDPHL
TEST CONDITIONS
tDSKEW
Driver Enable Time
tDEN
Driver Disable Time
tDDIS
Driver Enable Time from Shutdown
tDENSD
TYP
MAX
(Note 15) UNITS
RL = 3kΩ, CL = 2500pF, 10% to 90%
Full
0.22
1.2
3.1
µs
RL = 3kΩ, CL = 1000pF (Figure 6)
Full
-
1
2
µs
Full
-
1.2
2
µs
Full
-
240
400
ns
25
-
800
-
ns
RL = 5kΩ, Measured at VOUT = ±3V
25
-
500
-
ns
VOUT = ±3.0V (Note 14)
25
-
20
-
µs
tDPLH
Driver Propagation Delay Skew
TEMP
MIN
(°C) (Note 15)
tDPHL - tDPLH (Figure 6)
Driver Maximum Data Rate
DRD
RL = 3kΩ, CL = 1000pF, One Transmitter
Switching
Full
460
650
-
kbps
Receiver Propagation Delay
tRPHL
CL = 15pF (Figure 7)
Full
-
50
120
ns
Full
-
40
120
ns
tRPHL - tRPLH (Figure 7)
Full
-
10
40
ns
CL = 15pF
Full
0.46
2
-
Mbps
tRPLH
Receiver Propagation Delay Skew
tRSKEW
Receiver Maximum Data Rate
DRR
RS-485 DRIVER SWITCHING CHARACTERISTICS (FAST DATA RATE (20Mbps), 485/232 = VCC, SLEW = VCC, ALL VERSIONS)
Driver Differential Input to Output
Delay
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Driver Output Skew
Driver Differential Rise or Fall Time
Full
15
30
50
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
0.5
10
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
3
11
20
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
27
60
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 14)
Full
-
65
250
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Note 14)
Full
-
152
250
ns
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
30
-
Mbps
Driver Maximum Data Rate
fMAX
RS-485 DRIVER SWITCHING CHARACTERISTICS (MEDIUM DATA RATE (460kbps), 485/232 = VCC, SLEW = 0V, SPB = VCC (QFN Only), ALL
VERSIONS)
Driver Differential Input to Output
Delay
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Driver Output Skew
Driver Differential Rise or Fall Time
Full
200
490
1000
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
110
400
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
300
600
1100
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
30
300
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
128
300
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 14)
Full
-
65
500
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Note 14)
Full
-
255
500
ns
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
2000
-
kbps
Driver Maximum Data Rate
fMAX
9
FN6201.3
November 21, 2007
ISL81387, ISL41387
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1μF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = +25°C (Note 8). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
MIN
(°C) (Note 15)
TYP
MAX
(Note 15) UNITS
RS-485 DRIVER SWITCHING CHARACTERISTICS (SLOW DATA RATE (115kbps, QFN ONLY), 485/232 = VCC, SLEW = SPB = GND)
Driver Differential Input to Output
Delay
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Driver Output Skew
Driver Differential Rise or Fall Time
Full
800
1500
2500
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
350
1250
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
1000
2000
3100
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
32
600
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
300
600
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 14)
Full
-
65
800
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Note 14)
Full
-
420
800
ns
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
800
-
kbps
Driver Maximum Data Rate
fMAX
RS-485 RECEIVER SWITCHING CHARACTERISTICS (485/232 = VCC, ALL VERSIONS AND SPEEDS)
Receiver Input to Output Delay
tPLH, tPHL
(Figure 4)
Full
20
50
90
ns
Receiver Skew | tPLH - tPHL |
tSKEW
(Figure 4)
Full
-
3
10
ns
Receiver Maximum Data Rate
fMAX
Full
-
40
-
Mbps
RECEIVER ENABLE/DISABLE CHARACTERISTICS (ALL MODES AND VERSIONS AND SPEEDS)
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC (Figure 5)
Full
-
22
60
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND (Figure 5)
Full
-
23
60
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 5)
Full
-
24
60
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 5)
Full
-
25
60
ns
Receiver Enable from Shutdown to
Output Low
tZLSHDN
CL = 15pF, SW = VCC (Figure 5) RS-485 Mode
(Note 14)
RS-232 Mode
Full
-
260
700
ns
25
-
35
-
ns
Receiver Enable from Shutdown to
Output High
tZHSHDN
CL = 15pF, SW = GND (Figure 5) RS-485 Mode
(Note 14)
RS-232 Mode
Full
-
260
700
ns
25
-
25
-
ns
NOTES:
8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
9. Supply current specification is valid for loaded drivers when DEN = 0V.
10. Applies to peak current. See “Typical Performance Curves” beginning on page 18 for more information.
11. RIN defaults to RS-485 mode (>15kΩ) when the device is unpowered (VCC = 0V), or in SHDN, regardless of the state of the 485/232 pin.
12. VCC ≤ 5.25V.
13. The Slew pin has a pull-up resistor that enables only when in RS-485 mode (485/232 = VCC).
14. ON, RXEN, and DEN all simultaneously switched Low-to-High.
15. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
10
FN6201.3
November 21, 2007
ISL81387, ISL41387
Test Circuits and Waveforms
R
DEN
VCC
Y
DY
RD
D
VOD
Z
+
-
VCM
VOC
R
FIGURE 1. RS-485 DRIVER VOD AND VOC TEST CIRCUIT
3V
DY
1.5V
1.5V
0V
tPLH
tPHL
VOH
50%
OUT (Z)
50%
VOL
tPHL
tPLH
VOH
VCC
CL = 100pF
DEN
OUT (Y)
50%
VOL
tDLH
Y
DY
RDIFF
D
Z
CL = 100pF
50%
tDHL
90%
DIFF OUT (Z - Y)
0V
10%
SIGNAL
GENERATOR
0V
+VOD
90%
tR
10%
-VOD
tF
SKEW = |tPLH (Y OR Z) - tPHL (Z OR Y)|
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2A. TEST CIRCUIT
FIGURE 2. RS-485 DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DEN
DY
SIGNAL
GENERATOR
Y
500Ω
D
Z
VCC
SW
GND
CL
DEN
1.5V
RXEN
DY
SW
CL (pF)
tHZ
Y/Z
X
0/1
GND
15
tLZ
Y/Z
X
1/0
VCC
15
tZH
Y/Z
X
0/1
GND
100
tZL
Y/Z
X
1/0
VCC
100
tZH(SHDN)
Y/Z
0
0/1
GND
100
tZL(SHDN)
Y/Z
0
1/0
VCC
100
FIGURE 3A. TEST CIRCUIT
3V
1.5V
0V
tZH
tZH(SHDN)
FOR SHDN TESTS, SWITCH ON AND DEN L- H SIMULTANEOUSLY
PARAMETER OUTPUT
ENABLED
OUT (Y, Z)
OUTPUT HIGH
tHZ
VOH - 0.5V VOH
2.3V
0V
tZL
tZL(SHDN)
OUT (Y, Z)
tLZ
VCC
2.3V
OUTPUT LOW
VOL + 0.5V V
OL
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. RS-485 DRIVER ENABLE AND DISABLE TIMES
11
FN6201.3
November 21, 2007
ISL81387, ISL41387
Test Circuits and Waveforms (Continued)
RXEN
VCC
0V
+1.5V
15pF
A
R
B
B
RA
0V
0V
-1.5V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
RA
1.5V
FIGURE 4A. TEST CIRCUIT
1.5V
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RS-485 RECEIVER PROPAGATION DELAY
RXEN
A
R
SIGNAL
GENERATOR
1kΩ
RA
VCC
SW
B
GND
ENABLED
RXEN
1.5V
3V
1.5V
0V
15pF
tZH
tZH(SHDN)
FOR SHDN TESTS, SWITCH ON AND RXEN L- H SIMULTANEOUSLY
OUTPUT HIGH
RA
tHZ
VOH - 0.5V VOH
1.5V
0V
PARAMETER
DEN
B
SW
tHZ
X
+1.5V
GND
tLZ
X
-1.5V
VCC
tZL
tZL(SHDN)
tZH
X
+1.5V
GND
RA
tZL
X
-1.5V
VCC
tZH(SHDN)
0
+1.5V
GND
tZL(SHDN)
0
-1.5V
VCC
tLZ
VCC
1.5V
OUTPUT LOW
VOL + 0.5V V
OL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5A. TEST CIRCUIT
FIGURE 5. RS-485 RECEIVER ENABLE AND DISABLE TIMES
VCC
3V
DEN
DY, Z
DY,Z
1.5V
CL
Y, Z
D
1.5V
0V
tDPHL
RL
SIGNAL
GENERATOR
tDPLH
VO+
OUT (Y, Z)
0V
0V
VO-
SKEW = |tDPHL - tDPLH|
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6A. TEST CIRCUIT
FIGURE 6. RS-232 DRIVER PROPAGATION DELAY
VCC
3V
RXEN
A, B
A, B
R
1.3V
1.7V
0V
CL = 15pF
RA, RB
tRPLH
tRPHL
2.4V
RA, RB
SIGNAL
GENERATOR
0.8V
VOL
SKEW = |tRPHL - tRPLH|
FIGURE 7A. TEST CIRCUIT
VOH
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RS-232 RECEIVER PROPAGATION DELAY
12
FN6201.3
November 21, 2007
ISL81387, ISL41387
Detailed Description
on each bus. Because of the one driver per bus limitation,
RS-422 networks use a two bus, full duplex structure for
bidirectional communication, and the Rx inputs and Tx
outputs (no tri-state required) connect to different busses, as
shown in Figure 9. Tx and Rx enables aren’t required, so
connect RXEN and DEN to VCC through a 1kΩ resistor.
The ISL81387, ISL41387 port supports dual protocols:
RS-485, RS-422, and RS-232. RS-485 and RS-422 are
differential (balanced) data transmission standards for use in
high speed (up to 20Mbps) networks, or long haul and noisy
environments. The differential signalling, coupled with
RS-485’s requirement for extended common mode range
(CMR) of +12V to -7V make these transceivers extremely
tolerant of ground potential differences, as well as voltages
induced in the cable by external fields. Both of these effects
are real concerns when communicating over the RS-485,
RS-422 maximum distance of 4000’ (1220m). It is important
to note that the ISL81387, ISL41387 don’t follow the RS-485
convention whereby the inverting I/O is labelled “B/Z”, and
the non-inverting I/O is “A/Y”. Thus, in the following
application diagrams, the 1387 A/Y (B/Z) pins connect to the
B/Z (A/Y) pins of the generic RS-485, RS-422 ICs.
Conversely, RS-485 is a true multipoint standard, which
allows up to 32 devices (any combination of drivers- must be
tri-statable - and receivers) on each bus. Now bidirectional
communication takes place on a single bus, so the Rx inputs
and Tx outputs of a port connect to the same bus lines, as
shown in Figure 8. A port set to RS-485, RS-422 mode
includes one Rx and one Tx.
RS-232 is a point-to-point, singled ended (signal voltages
referenced to GND) communication protocol targeting fairly
short (<150’, 46m) and low data rate (<1Mbps) applications.
A port contains two transceivers (2 Tx and 2 Rx) in RS-232
mode.
RS-422 is typically a point-to-point (one driver talking to one
receiver on a bus), or a point-to-multipoint (multidrop)
standard that allows only one driver and up to 10 receivers
Protocol selection is handled via the 485/232 logic pin.
+
GENERIC 1/2 DUPLEX 485 XCVR
+5V
VCC
R
RE
DI
+5V
B
0.1µF
+
VCC
GND
VCC
RO
R
B/Z
RE
Tx/Rx
A/Y
DEN
DY
GENERIC 1/2 DUPLEX 485 XCVR
+5V
D
R
0.1μF
A
RXEN *
DE
0.1µF
+
ISL81387, ISL41387
RA
RO
D
DE
B/Z
Y
D
A/Y
Z
GND
RT
RT
DI
GND
*QFN ONLY,
CONNECT RXEN TO GND
FIGURE 8. TYPICAL HALF DUPLEX RS-485 NETWORK
+
GENERIC 422 Rx (SLAVE)
+5V
R
0.1μF
+5V
VCC
GND
B
D
RXEN
VCC
RT
Z
A
Y
B
RO
R
Z
RT
A
R
0.1μF
+
A
VCC
DEN
RA
GENERIC FULL DUPLEX 422 XCVR (SLAVE)
+
ISL81387 (MASTER)
DY
RE
0.1μF
+5V
1kΩ
RO
B
D
Y
DI
GND
GND
FIGURE 9. TYPICAL RS-422 NETWORK
13
FN6201.3
November 21, 2007
ISL81387, ISL41387
ISL81387, ISL41387 Advantages
These dual protocol ICs offer many parametric
improvements versus those offered on competing dual
protocol devices. Some of the major improvements are:
• 15kV Bus Pin ESD - Eases board level requirements
• 2.7V Diff VOUT - Better Noise immunity and/or distance
• Full Failsafe RS-485 Rx - Eliminates bus biasing
• Selectable RS-485 Data Rate - Up to 20Mbps, or slewrate
limited for low EMI and fewer termination issues
• High RS-232 Data Rate - >460kbps
• Lower Tx and Rx Skews - Wider, consistent bit widths
• Lower ICC - Max ICC is 2x to 4x lower than competition
• Flow-Thru Pinouts - Tx, Rx bus pins on one side/logic pins
on the other, for easy routing to connector/UART
• Smaller (SSOP and QFN) and Pb-free packaging
RS-232 Mode
RX FEATURES
RS-232 receivers invert and convert RS-232 input levels
(±3V to ±25V) to the standard TTL/CMOS levels required by
a UART, ASIC, or µcontroller serial port. Receivers are
designed to operate at faster data rates than the drivers, and
they feature very low skews (10ns) so the receivers
contribute negligibly to bit width distortion. Inputs include the
standard required 3kΩ to 7kΩ pull-down resistor, so unused
inputs may be left unconnected. Rx inputs also have built-in
hysteresis to increase noise immunity, and to decrease
erroneous triggering due to slowly transitioning input signals.
Rx outputs are short circuit protected, and are tri-statable via
the active high RXEN pin, when the IC is shutdown (SHDN;
see Tables 2 and 3, and “Low Power Shutdown (SHDN)
Mode” on page 16), or via the active low RXEN pin available
on the QFN package option (see“ISL41387 (QFN Package)
Special Features” on page 17 for more details).
TX FEATURES
(see Tables 2 and 3, and “Low Power Shutdown (SHDN)
Mode” on page 16), or when the 5V power supply is off.
CHARGE PUMPS
The on-chip charge pumps create the RS-232 transmitter
power supplies (typically +6/-7V) from a single supply as low
as 4.5V, and are enabled only if the port is configured for
RS-232 operation, and not in SHDN. The efficient design
requires only four small 0.1µF capacitors for the voltage
doubler and inverter functions. By operating discontinuously
(i.e., turning off as soon as V+ and V- pump up to the
nominal values), the charge pump contribution to RS-232
mode ICC is reduced significantly. Unlike competing devices
that require the charge pump in RS-485 mode, disabling the
charge pump saves power, and minimizes noise. If the
application is a dedicated RS-485 port, then the charge
pump capacitors aren’t even required.
DATA RATES AND CABLING
Drivers operate at data rates up to 650kbps, and are
guaranteed for data rates up to 460kbps. The charge pumps
and drivers are designed such that one driver can be
operated at the rated load, and at 460kbps (see Figure 33).
Figure 33 also shows that drivers can easily drive several
thousands of picofarads at data rates up to 250kbps, while
still delivering compliant ±5V output levels.
Receivers operate at data rates up to 2Mbps. They are
designed for a higher data rate to facilitate faster factory
downloading of software into the final product, thereby
improving the user’s manufacturing throughput.
Figures 36 and 37 illustrate driver and receiver waveforms at
250kbps, and 500kbps, respectively. For these graphs, one
driver drives the specified capacitive load, and a receiver.
RS-232 doesn’t require anything special for cabling; just a
single bus wire per transmitter and receiver, and another
wire for GND. So an ISL81387, ISL41387 RS-232 port uses
a five conductor cable for interconnection. Bus terminations
are not required, nor allowed, by the RS-232 standard.
RS-485 Mode
RS-232 drivers invert and convert the standard TTL/CMOS
levels from a UART, or µcontroller serial port to RS-232
compliant levels (±5V minimum). The Tx delivers these
compliant output levels even at data rates of 650kbps, and
with loads of 1000pF. The drivers are designed for low skew
(typically 12% of the 500kbps bit width), and are compliant to
the RS-232 slew rate spec (4V/µs to 30V/µs) for a wide
range of load capacitances. Tx inputs float if left
unconnected, and may cause ICC increases. For the best
results, connect unused inputs to GND.
Tx outputs are short circuit protected, and incorporate a
thermal SHDN feature to protect the IC in situations of
severe power dissipation. See the RS-485 section for more
details. Drivers tri-state via the active high DEN pin, in SHDN
14
RX FEATURES
RS-485 receivers convert differential input signals as small
as 200mV, as required by the RS-485 and RS-422
standards, to TTL/CMOS output levels. The differential Rx
provides maximum sensitivity, noise immunity, and common
mode rejection. Per the RS-485 standard, receiver inputs
function with common mode voltages as great as ±7V
outside the power supplies (i.e., +12V and -7V), making
them ideal for long networks where induced voltages are a
realistic concern. Each RS-485, RS-422 port includes a
single receiver (RA), and the unused Rx output (RB) is
disabled.
FN6201.3
November 21, 2007
ISL81387, ISL41387
Worst case receiver input currents are 20% lower than the 1
“unit load” (1mA) RS-485 limit, which translates to a 15kΩ
minimum input resistance.
These receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating), shorted together, or if the bus is
terminated but undriven (i.e., differential voltage collapses to
near zero due to termination). Failsafe with shorted, or
terminated and undriven inputs is accomplished by setting
the Rx upper switching point at -40mV, thereby ensuring that
the Rx recognizes a 0V differential as a high level.
All the Rx outputs are short circuit protected, and are
tri-statable via the active high RXEN pin, or when the IC is
shutdown (see Tables 2 and 3, and “Low Power Shutdown
(SHDN) Mode” on page 16). ISL41387 (QFN) receiver
outputs are also tri-statable via an active low RXEN input
(see “ISL41387 (QFN Package) Special Features” on
page 17 for more details).
For the ISL41387 (QFN), when using the active high RXEN
function, the RXEN pin may be left floating (internally pulled
high), or should be connected to VCC through a 1kΩ resistor.
If using the active low RXEN, then the RXEN pin must be
connected to GND.
TX FEATURES
The RS-485, RS-422 driver is a differential output device
that delivers at least 2.2V across a 54Ω load (RS-485), and
at least 2.5V across a 100Ω load (RS-422). Both levels
significantly exceed the standards requirements, and these
exceptional output voltages increase system noise immunity,
and/or allow for transmission over longer distances. The
drivers feature low propagation delay skew to maximize bit
widths, and to minimize EMI.
To allow multiple drivers on a bus, the RS-485 specification
requires that drivers survive worst case bus contentions
undamaged. The ISL81387, ISL41387 drivers meet this
requirement via driver output short circuit current limits, and
on-chip thermal shutdown circuitry. The output stages
incorporate current limiting circuitry that ensures that the
output current never exceeds the RS-485 specification, even
at the common mode voltage range extremes. In the event of
a major short circuit condition, devices also include a thermal
shutdown feature that disables the drivers whenever the die
temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about 15°. If the
contention persists, the thermal shutdown/re-enable cycle
repeats until the fault is cleared. Receivers stay operational
during thermal shutdown.
RS-485 multi-driver operation also requires drivers to include
tri-state functionality, so the port has a DEN pin to control this
function. If the driver is used in an RS-422 network, such that
driver tri-state isn’t required, then the DEN pin should connect
15
to VCC through a 1kΩ resistor. Drivers are also tri-stated when
the IC is in SHDN, or when the 5V power supply is off.
SPEED OPTIONS
The ISL81387 (SOIC/SSOP) features two speed options
that are user selectable via the SLEW pin: a high slew rate
setting optimized for 20Mbps data rates (Fast), and a slew
rate limited option for operation up to 460kbps (Med). The
ISL41387 (QFN) offers an additional, more slew rate limited,
option for data rates up to 115kbps (Slow). See “Data Rate,
Cables and Terminations” on page 15 and “RS-485 Slew
Rate Limited Data Rates” on page 17 for more information.
Receiver performance is the same for all three speed
options.
DATA RATE, CABLES AND TERMINATIONS
RS-485, RS-422 are intended for network lengths up to
4000’ (1220m), but the maximum system data rate
decreases as the transmission length increases. Devices
operating at the maximum data rate of 20Mbps are limited to
lengths of 20’ to 30’ (6m to 9m), while devices operating at or
below 115kbps can operate at the maximum length of 4000’
(1220m).
Higher data rates require faster edges, so both the
ISL81387, ISL41387 versions offer an edge rate capable of
20Mbps data rates. They both have a second option for
460kbps, but the ISL41387 also offers another, very slew
rate limited, edge rate to minimize problems at slow data
rates. Nevertheless, for the best jitter performance when
driving long cables, the faster speed settings may be
preferable, even at low data rates. See “RS-485 Slew Rate
Limited Data Rates” on page 17 for details.
Twisted pair is the cable of choice for RS-485, RS-422
networks. Twisted pair cables tend to pick up noise and
other electromagnetically induced voltages as common
mode signals, which are effectively rejected by the
differential receivers in these ICs.
The preferred cable connection technique is “daisy-chaining”,
where the cable runs from the connector of one device directly
to the connector of the next device, such that cable stub
lengths are negligible. A “backbone” structure, where stubs
run from the main backbone cable to each device’s connector,
is the next best choice, but care must be taken to ensure that
each stub is electrically “short”. See Table 4 for recommended
maximum stub lengths for each speed option.
TABLE 4. RECOMMENDED STUB LENGTHS
SPEED OPTION
MAXIMUM STUB LENGTH
ft (m)
SLOW
350 to 500 (107 to 152)
MED
100 to 150 (30.5 to 46)
FAST
1 to 3 (0.3 to 0.9)
FN6201.3
November 21, 2007
ISL81387, ISL41387
In point-to-point, or point-to-multipoint (RS-422) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the
driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as
possible, but definitely shorter than the limits shown in
Table 4. Multipoint (RS-485) systems require that the main
cable be terminated in its characteristic impedance at both
ends. Again, keep stubs connecting a transceiver to the
main cable as short as possible, and refer to Table 4. Avoid
“star”, and other configurations, where there are many
“ends” which would require more than the two allowed
terminations to prevent reflections.
Low Power Shutdown (SHDN) Mode
The ISL81387, ISL41387 enter the SHDN mode when ON = 0,
and the Tx and Rx are disabled (DEN = 0, RXEN = 0, and
RXEN = 1), and the already low supply current drops to as low
as 5µA. SHDN disables the Tx and Rx outputs, and disables
the charge pumps if the port is in RS-232 mode, so V+
collapses to VCC, and V- collapses to GND.
All but 5µA of SHDN ICC current is due to control input (SPB,
SLEW) pull-up resistors (~20µA/resistor), so SHDN ICC
varies depending on the ISL81387, ISL41387 configuration.
The specification tables indicate the worst case values, but
careful selection of the configuration yields lower currents.
For example, in RS-232 mode the SPB pin isn’t used, so
floating it or tying it high minimizes SHDN ICC.
ISL81387
CONNECTOR
Proper termination is imperative to minimize reflections
when using the 20Mbps speed option. Short networks using
the medium and slow speed options need not be terminated,
but terminations are recommended unless power dissipation
is an overriding concern. Note that the RS-485 specification
allows a maximum of two terminations on a network,
otherwise the Tx output voltage may not meet the required
VOD.
A
B
Y
Z
R
RA
D
High ESD
All pins on the ISL81387, ISL41387 include ESD protection
structures rated at ±4kV (HBM), which is good enough to
survive ESD events commonly seen during manufacturing.
But the bus pins (Tx outputs and Rx inputs) are particularly
vulnerable to ESD events because they connect to an
exposed port on the exterior of the finished product. Simply
touching the port pins, or connecting a cable, can destroy an
unprotected port. ISL81387, ISL41387 bus pins are fitted
with advanced structures that deliver ESD protection in
excess of ±15kV (HBM), without interfering with any signal in
the RS-485 or the RS-232 range. This high level of
protection may eliminate the need for board level protection,
or at the very least will increase the robustness of any board
level scheme.
Small Packages
Many competing dual protocol ICs are available only in
monstrously large 24 to 28 Ld SOIC packages. The
ISL81387’s 20 Ld SSOP is more than 50% smaller than
even a 24 Ld SOIC, and the ISL41387’s tiny 6mmx6mm
QFN is 80% smaller than a 28 Ld SOIC.
Flow Through Pinouts
Even the ISL81387, ISL41387 pinouts are features, in that the
“flow-through” design simplifies board layout. Having the bus
pins all on one side of the package for easy routing to a cable
connector, and the Rx outputs and Tx inputs on the other side
for easy connection to a UART, avoids costly and problematic
crossovers. Figure 10 illustrates the flow-through nature of the
pinout.
16
DY
UART
OR
ASIC
OR
µCONTROLLER
FIGURE 10. ILLUSTRATION OF FLOW THROUGH PINOUT
On the ISL41387, the SHDN ICC increases as VL
decreases. VL powers each control pin input stage and sets
its VOH at VL rather than VCC. VCC powers the second
stage, but the second stage input isn’t driven to the rail, so
some ICC current flows. See Figure 20 for details.
When enabling from SHDN in RS-232 mode, allow at least
20µs for the charge pumps to stabilize before transmitting data.
If fast enables are required, and ICC isn’t the greatest concern,
disable the drivers with the DEN pin to keep the charge pumps
active. The charge pumps aren’t used in RS-485 mode, so the
transceiver is ready to send or receive data in less than 1µs,
which is much faster than competing devices that require the
charge pump for all modes of operation.
Internal Loopback Mode
Setting ON = 0, DEN = 1, and RXEN = 1 or RXEN = 0
(QFN only), places the port in the loopback mode, a mode
that facilitates implementing board level self test functions. In
loopback, internal switches disconnect the Rx inputs from
the Rx outputs, and feed back the Tx outputs to the
appropriate Rx output. This way the data driven at the Tx
input appears at the corresponding Rx output (refer to
“Typical Operating Circuit” on page 6). The Tx outputs
remain connected to their terminals, so the external loads
are reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
FN6201.3
November 21, 2007
ISL81387, ISL41387
Note that the loopback mode uses an additional set of
receivers, as shown in “Typical Operating Circuit” on page 6.
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
VL can be anywhere from VCC down to 1.65V, but the input
switching points may not provide enough noise margin when
VL < 1.8V. Table 5 indicates typical VIH and VIL values for
various VL values so the user can ascertain whether or not a
particular VL voltage meets his or her needs.
ISL41387 (QFN Package) Special Features
TABLE 5. VIH AND VIL vs VL FOR VCC = 5V
Logic Supply (VL Pin)
The ISL41387 (QFN) includes a VL pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “logic” devices such as UARTs, ASICs,
and μcontrollers, and today most of these devices use power
supplies significantly lower than 5V. Thus, a 5V output level
from a 5V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
the logic device’s low VOH might not exceed the VIH of a 5V
powered dual protocol input. Connecting the VL pin to the
power supply of the logic device (as shown in Figure 11)
limits the ISL41387’s Rx output VOH to VL (see Figure 14),
and reduces the Tx and control input switching points to
values compatible with the logic device output levels.
Tailoring the logic pin input switching points and output levels
to the supply voltage of the UART, ASIC, or μcontroller
eliminates the need for a level shifter/translator between the
two ICs.
VCC = +5V
RA
DY
GND
VCC = +2V
VOH = 5V
RXD
VIH ≥ 2V
VOH ≤ 2V
ISL81387
TXD
GND
UART/PROCESSOR
VCC = +5V
VCC = +2V
RA
DY
VIH (V)
VIL (V)
1.65V
0.79
0.50
1.8V
0.82
0.60
2.0V
0.87
0.69
2.5V
0.99
0.86
3.3V
1.19
1.05
The VL supply current (IL) is typically less than 60µA, as
shown in Figures 19 and 20. All of the DC VL current is due
to inputs with internal pull-up resistors (SPB, SLEW, RXEN)
being driven to the low input state. The worst case IL current
occurs when all three of the inputs are low (see Figure 19),
due to the IL through the pull-up resistors. IIL through an
input pull-up resistor is ~20µA, so the IL in Figure 19 drops
by about 40µA (at VL = 5V) when the SPB is high and 232
mode disables the SLEW pin pull-up (middle vs top curve).
When all three inputs are driven high, IL drops to ~10nA, so
to minimize power dissipation drive these inputs high when
unneeded (e.g., SPB isn’t used in RS-232 mode, so drive it
high).
Active Low Rx Enable (RXEN)
In many RS-485 applications, especially half duplex
configurations, users like to accomplish “echo cancellation”
by disabling the corresponding receiver while its driver is
transmitting data. This function is available on the QFN
package via an active low RXEN pin. The active low function
also simplifies direction control, by allowing a single Tx/Rx
direction control line. If the active high RXEN were used,
either two valuable I/O pins would be used for direction
control, or an external inverter is required between DEN and
RXEN. Figure 12 details the advantage of using the RXEN
pin. When using RXEN, ensure that RXEN is tied to GND.
RS-485 Slew Rate Limited Data Rates
VL
GND
ESD
DIODE
VL (V)
VOH = 2V
RXD
VIH = 0.9V
VOH ≤ 2V
ISL41387
ESD
DIODE
TXD
GND
UART/PROCESSOR
FIGURE 11. USING VL PIN TO ADJUST LOGIC LEVELS
17
The ISL81387, ISL41387 FAST speed option (SLEW = High)
utilizes Tx output transitions optimized for a 20Mbps data
rate. These fast edges may increase EMI and reflection
issues, even though fast transitions aren’t required at the
lower data rates used by many applications. With the SLEW
pin low, both product types switch to a moderately slew rate
limited output transition targeted for 460kbps (MED) data
rates. The ISL41387 (QFN version) offers an additional, slew
rate limited data rate that is optimized for 115kbps (SLOW),
and is selected when SLEW = 0 and SPB = 0 (see Table 3).
The slew limited edges permit longer unterminated
networks, or longer stubs off terminated busses, and help
FN6201.3
November 21, 2007
ISL81387, ISL41387
minimize EMI and reflections. Nevertheless, for the best jitter
performance when driving long cables, the faster speed
options may be preferable, even at lower data rates. The
faster output transitions deliver less variability (jitter) when
loaded with the large capacitance associated with long
cables. Figures 42, 43, and 44 detail the jitter performance of
the three speed options while driving three different cable
lengths. The figures show that under all conditions the faster
the edge rate, the better the jitter performance. Of course,
faster transitions require more attention to ensuring short
stub lengths, and quality terminations, so there are trade-offs
to be made. Assuming a jitter budget of 10%, it is likely
better to go with the slow speed option for data rates of
115kbps or less, to minimize fast edge effects. Likewise, the
medium speed option is a good choice for data rates
between 115kbps and 460kbps. For higher data rates, or
when the absolute best jitter is required, use the high speed
option.
1kΩ
OR NC
+
RXEN *
VCC
RA
Tx/Rx
0.1µF
B
R
RXEN
A
DEN
Y
DY
Z
D
GND
ACTIVE HIGH RX ENABLE
ISL41387 +5V
+
VCC
RXEN
RA
0.1µF
B
R
RXEN *
A
DEN
Y
Tx/Rx
Evaluation Board
An evaluation board, part number ISL41387EVAL1, is
available to assist in assessing the dual protocol IC’s
performance. The evaluation board contains a QFN
packaged device, but because the same die is used in all
packages, the board is also useful for evaluating the
functionality of the other versions. The board’s design allows
for evaluation of all standard features, plus the QFN specific
features. Refer to the evaluation board application note for
details and contact your sales rep for ordering information.
Typical Performance Curves
DY
D
Z
GND
* QFN ONLY
ACTIVE LOW RX ENABLE
FIGURE 12. USING ACTIVE LOW vs ACTIVE HIGH RX
ENABLE
VCC = VL = 5V, TA = +25°C; Unless Otherwise Specified.
5
50
VOL, +25°C
HIGH OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
ISL41387 +5V
40
VOL, +85°C
30
20
VOH, +25°C
VOH, +85°C
10
4
3
IOH = -1mA
2
IOH = -8mA
1
IOH = -4mA
0
0
0
1
2
3
4
RECEIVER OUTPUT VOLTAGE (V)
5
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
18
0
1
2
3
4
5
VL (V)
FIGURE 14. RECEIVER HIGH OUTPUT VOLTAGE vs LOGIC
SUPPLY VOLTAGE (VL)
FN6201.3
November 21, 2007
ISL81387, ISL41387
Typical Performance Curves
VCC = VL = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
100
DIFFERENTIAL OUTPUT VOLTAGE (V)
3.6
DRIVER OUTPUT CURRENT (mA)
90
80
70
60
50
40
30
20
10
0
0
1
2
3
4
DIFFERENTIAL OUTPUT VOLTAGE (V)
RDIFF = 100Ω
3.4
3.3
3.2
RDIFF = 54Ω
3.1
3.0
-40
5
RS-232, RXEN, RXEN, ON = X, DEN = VCC
Y OR Z = LOW
3.5
FULL TEMP RANGE
RS-232, RXEN, RXEN = X, ON = VCC, DEN = GND
3.0
ICC (mA)
50
0
Y OR Z = HIGH
-50
2.5
2.0
RS-485, HALF DUPLEX, DEN = VCC, RXEN, RXEN, ON = X
+25°C
+85°C
1.5
-100
-40°C
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
1.0
-40
12
10m
100µ
VL ≤ VCC
400
ICC AND IL (mA)
RS-232, RXEN = GND, SPB = VL
1µ
100n
RS-485, SLEW, SPB, RXEN = VL
2
3
50
25
75
85
4
VL (V)
5
6
FIGURE 19. RS-232, VL SUPPLY CURRENT vs VL VOLTAGE
(QFN ONLY)
19
DEN, RXEN, DY, DZ/SLEW, ON = GND
NO LOAD
VIN = VL OR GND
RXEN = VL
RS-232/RS-485 ICC
300
200
100
RS-232, SPB, RXEN = VL OR
10n
0
-25
FIGURE 18. SUPPLY CURRENT vs TEMPERATURE
VL > VCC
RS-485, SLEW, SPB, RXEN = GND
10µ
RS-485, DEN = GND, RXEN, RXEN = X, ON = VCC
500
NO LOAD
VIN = VL or GND
DEN, RXEN, ON = GND
1m
RS-485, FULL DUPLEX, DEN = VCC, RXEN, RXEN, ON = X
TEMPERATURE (°C)
FIGURE 17. RS-485, DRIVER OUTPUT CURRENT vs SHORT
CIRCUIT VOLTAGE
IL (A)
85
75
4.0
100
1n
50
25
FIGURE 16. RS-485, DRIVER DIFFERENTIAL OUTPUT
VOLTAGE vs TEMPERATURE
150
-150
0
-25
TEMPERATURE (°C)
FIGURE 15. RS-485, DRIVER OUTPUT CURRENT vs
DIFFERENTIAL OUTPUT VOLTAGE
OUTPUT CURRENT (mA)
3.5
0
2.0
SPB = VL
RS-232 IL
2.5
SPB = GND
RS-485 IL
3.0
3.5
VL (V)
4.0
4.5
5.0
FIGURE 20. VCC AND VL SHDN SUPPLY CURRENTS vs VL
VOLTAGE (QFN ONLY)
FN6201.3
November 21, 2007
ISL81387, ISL41387
Typical Performance Curves
1700
VCC = VL = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
400
RDIFF = 54Ω, CL = 100pF
1650
|tPHLZ - tPLHY|
300
|tPLHZ - tPHLY|
1600
SKEW (ns)
PROPAGATION DELAY (ns)
RDIFF = 54Ω, CL = 100pF
350
tDHL
1550
tDLH
1500
250
200
150
100
tDHL
1450
|tDLH - tDHL|
50
1400
-40
0
-25
50
25
75
85
-40
0
-25
TEMPERATURE (°C)
25
50
75
85
TEMPERATURE (°C)
FIGURE 21. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (SLOW DATA RATE, QFN ONLY)
FIGURE 22. RS-485, DRIVER SKEW vs TEMPERATURE
(SLOW DATA RATE, QFN ONLY)
560
120
RDIFF = 54Ω, CL = 100pF
RDIFF = 54Ω, CL = 100pF
550
530
|tPHLZ - tPLHY|
80
SKEW (ns)
PROPAGATION DELAY (ns)
100
540
520
tDHL
510
tDLH
500
60
|tPLHZ - tPHLY|
40
tDHL
490
20
480
|tDLH - tDHL|
470
-40
-25
0
50
25
75
0
-40
85
0
25
TEMPERATURE (°C)
-25
TEMPERATURE (°C)
2.5
RDIFF = 54Ω, CL = 100pF
85
RDIFF = 54Ω, CL = 100pF
2.0
35
|tDLH - tDHL|
SKEW (ns)
PROPAGATION DELAY (ns)
75
FIGURE 24. RS-485, DRIVER SKEW vs TEMPERATURE
(MEDIUM DATA RATE, QFN ONLY)
FIGURE 23. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (MEDIUM DATA RATE, QFN
ONLY)
40
50
tDHL
30
tDLH
1.5
1.0
|tPLHZ - tPHLY|
25
0.5
20
-40
-25
0
25
50
75
TEMPERATURE (°C)
FIGURE 25. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (FAST DATA RATE)
20
85
|tPHLZ - tPLHY|
0
-40
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 26. RS-485, DRIVER SKEW vs TEMPERATURE
(FAST DATA RATE)
FN6201.3
November 21, 2007
ISL81387, ISL41387
0
RA
5
4
3
2
Y
Z
1
0
RA
0
5
4
Z
3
2
1
Y
0
TIME (400ns/DIV)
RA
0
5
4
3
2
RECEIVER OUTPUT (V)
0
DRIVER INPUT (V)
5
5
FIGURE 28. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (SLOW DATA RATE, QFN ONLY)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 27. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (SLOW DATA RATE, QFN ONLY)
DY
Y
Z
1
0
RDIFF = 60Ω, CL = 100pF
DY
5
5
4
3
2
1
Z
Y
0
4
DRIVER OUTPUT (V)
5
Y
3
2
FIGURE 30. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (MEDIUM DATA RATE, QFN ONLY)
RECEIVER OUTPUT (V)
RA
0
DRIVER INPUT (V)
RECEIVER OUTPUT (V)
DRIVER OUTPUT (V)
5
0
5
Z
1
0
TIME (10ns/DIV)
FIGURE 31. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (FAST DATA RATE)
21
0
TIME (200ns/DIV)
FIGURE 29. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (MEDIUM DATA RATE, QFN ONLY)
DY
5
RA
0
TIME (200ns/DIV)
RDIFF = 60Ω, CL = 100pF
0
5
TIME (400ns/DIV)
RDIFF = 60Ω, CL = 100pF
5
DRIVER INPUT (V)
0
DY
RDIFF = 60Ω, CL = 100pF
DY
5
0
RA
0
5
DRIVER INPUT (V)
5
RDIFF = 60Ω, CL = 100pF
DRIVER INPUT (V)
5
RECEIVER OUTPUT (V)
RDIFF = 60Ω, CL = 100pF
DY
DRIVER INPUT (V)
VCC = VL = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
5
4
Z
3
2
1
Y
0
TIME (10ns/DIV)
FIGURE 32. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (FAST DATA RATE)
FN6201.3
November 21, 2007
ISL81387, ISL41387
Typical Performance Curves
VCC = VL = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
7.5
VOUT+
5.0
2.5
ALL TOUTS LOADED WITH 3kΩ TO GND
500kbps
0
1 TRANSMITTER AT 250kbps OR 500kbps,
OTHER TRANSMITTER AT 30kbps
-2.5
500kbps
-5.0
-7.5
VOUT 250kbps
0
1000
2000
3000
4000
TRANSMITTER OUTPUT VOLTAGE (V)
250kbps
RS-232 REGION OF NONCOMPLIANCE
TRANSMITTER OUTPUT VOLTAGE (V)
7.5
5000
5.0
VOUT+
2.5
OUTPUTS STATIC
ALL TOUTS LOADED WITH 3kΩ TO GND
0
-2.5
-5.0
VOUT -
-7.5
-40
0
25
TEMPERATURE (°C)
-25
LOAD CAPACITANCE (pF)
FIGURE 33. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
LOAD CAPACITANCE
50
75
85
FIGURE 34. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
TEMPERATURE
TRANSMITTER OUTPUT CURRENT (mA)
40
CL = 3500pF, 1 CHANNEL SWITCHING
30
5
Y or Z = LOW
DY
20
0
10
5
VOUT SHORTED TO GND
0
0
-10
-5
Y/A
-20
5
Y or Z = HIGH
-30
0
-40
-40
-25
0
25
TEMPERATURE (°C)
50
75
FIGURE 35. RS-232, TRANSMITTER SHORT CIRCUIT
CURRENT vs TEMPERATURE
RA
85
2μs/DIV
FIGURE 36. RS-232, TRANSMITTER AND RECEIVER
WAVEFORMS AT 250kbps
60
VIN = ±5V
CL = 1000pF, 1 CHANNEL SWITCHING
RECEIVER + DUTY CYCLE (%)
5
DY
0
5
0
Y/A
-5
5
RA
0
FULL TEMP RANGE
58
56
54
SR IN = 15V/µs
52
SR IN = 100V/µs
50
48
1μs/DIV.
50
500
1000
1500
2000
DATA RATE (kbps)
FIGURE 37. RS-232, TRANSMITTER AND RECEIVER
WAVEFORMS AT 500kbps
22
FIGURE 38. RS-232, RECEIVER OUTPUT +DUTY CYCLE vs
DATA RATE
FN6201.3
November 21, 2007
ISL81387, ISL41387
VCC = VL = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
ALL TOUTS LOADED WITH 5kΩ TO GND
900
DATA RATE (kbps)
7.5
VOUT ≥ ±4V
1000
800
700
2 TRANSMITTERS AT +25°C
600
1 TRANSMITTER AT +25°C
500
400
300
200
1 TRANSMITTER AT +85°C
2 TRANSMITTERS AT +85°C
100
VOUT+
5.0
+25°C
+85°C
2.5
2 TRANSMITTERS SWITCHING
0
ALL TOUTS LOADED WITH 5kΩ TO GND, CL = 1000pF
-2.5
+85°C
-5.0
VOUT -
+25°C
RS-232 REGION OF NONCOMPLIANCE
1100
TRANSMITTER OUTPUT VOLTAGE (V)
Typical Performance Curves
-7.5
100
1000
2000
3000
LOAD CAPACITANCE (pF)
4000
5000
0
100
200
300
400
500
600
700
800
DATA RATE (kbps)
FIGURE 39. RS-232, TRANSMITTER MAXIMUM DATA RATE vs
LOAD CAPACITANCE
FIGURE 40. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
DATA RATE
100
450
2 TRANSMITTERS SWITCHING
400
ALL TOUTS LOADED WITH 3kΩ TO GND, CL = 1000pF
FAST
10
JITTER (%)
350
SKEW (ns)
MED
SLOW
+85°C
300
250
1
+25°C
200
150
50
DOUBLE TERM’ED WITH 121Ω
0.1
150
250
350
450
550
650
750
32 100
200
300
400
DATA RATE (kbps)
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 41. RS-232, TRANSMITTER SKEW vs DATA RATE
FIGURE 42. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 2000’ CAT-5 CABLE
100
100
SLOW
SLOW
MED
FAST
1
JITTER (%)
10
JITTER (%)
10
MED
FAST
1
DOUBLE TERM’ED WITH 121Ω
0.1
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 43. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 1000’ CAT-5 CABLE
23
DOUBLE TERM’ED WITH 121Ω
0.1
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 44. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 350’ CAT-5 CABLE
FN6201.3
November 21, 2007
ISL81387, ISL41387
Die Characteristics
SUBSTRATE AND QFN THERMAL PAD POTENTIAL
(POWERED UP):
GND
TRANSISTOR COUNT:
2490
PROCESS:
BiCMOS
24
FN6201.3
November 21, 2007
ISL81387, ISL41387
Package Outline Drawing
L40.6x6
40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 3, 10/06
4X 4.5
6.00
36X 0.50
A
B
6
PIN 1
INDEX AREA
6
PIN #1 INDEX AREA
40
31
30
1
6.00
4 . 10 ± 0 . 15
21
10
0.15
(4X)
11
20
0.10 M C A B
TOP VIEW
40X 0 . 4 ± 0 . 1
4 0 . 23 +0 . 07 / -0 . 05
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0 . 1
(
C
BASE PLANE
( 5 . 8 TYP )
SEATING PLANE
0.08 C
SIDE VIEW
4 . 10 )
( 36X 0 . 5 )
C
0 . 2 REF
5
( 40X 0 . 23 )
0 . 00 MIN.
0 . 05 MAX.
( 40X 0 . 6 )
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
25
FN6201.3
November 21, 2007
ISL81387, ISL41387
Small Outline Plastic Packages (SOIC)
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.014
0.019
0.35
0.49
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4961
0.5118
12.60
13.00
3
E
0.2914
0.2992
7.40
7.60
4
-B1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
α
e
A1
B
0.25(0.010) M
e
C
0.10(0.004)
C A M
B S
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
α
NOTES:
0.050 BSC
20
0°
20
8°
0°
7
8°
Rev. 2 6/05
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
26
FN6201.3
November 21, 2007
ISL81387, ISL41387
Shrink Small Outline Plastic Packages (SSOP)
N
M20.209 (JEDEC MO-150-AE ISSUE B)
INDEX
AREA
H
0.25(0.010) M
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
B M
E
1
2
3
0.25
0.010
SEATING PLANE
-A-
INCHES
GAUGE
PLANE
-B-
L
A
D
-C-
α
e
A2
A1
B
C
0.10(0.004)
0.25(0.010) M
C A M
B S
SYMBOL
MIN
MAX
MIN
MAX
A
0.068
0.078
1.73
1.99
A1
0.002
0.008’
0.05
0.21
A2
0.066
0.070’
1.68
1.78
NOTES
B
0.010’
0.015
0.25
0.38
C
0.004
0.008
0.09
0.20’
D
0.278
0.289
7.07
7.33
3
E
0.205
0.212
5.20’
5.38
4
e
0.026 BSC
H
0.301
L
0.025
N
α
NOTES:
MILLIMETERS
0.65 BSC
0.311
7.65
0.037
0.63
20
0 deg.
9
7.90’
0.95
6
20
8 deg.
0 deg.
7
8 deg.
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
Rev. 3 11/02
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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27
FN6201.3
November 21, 2007