IDT29FCT520AT/BT/CT/DT IDT29FCT521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/ BT/CT/DT each contain four 8-bit positive edge-triggered registers. These may be operated as a dual 2-level or as a single 4-level pipeline. A single 8-bit input is provided and any of the four registers is available at the 8-bit, 3-state output. These devices differ only in the way data is loaded into and between the registers in 2-level operation. The difference is illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT when data is entered into the first level (I = 2 or I = 1), the existing data in the first level is moved to the second level. In the IDT29FCT521AT/BT/CT/DT, these instructions simply cause the data in the first level to be overwritten. Transfer of data to the second level is achieved using the 4-level shift instruction (I = 0). This transfer also causes the first level to change. In either part I=3 is for hold. • • • • • A, B, C and D speed grades Low input and output leakage ≤1µA (max.) CMOS power levels True TTL input and output compatibility – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages FUNCTIONAL BLOCK DIAGRAM D0 -D7 8 MUX I 0 ,I1 2 REGISTER CONTROL CLK OCTAL REG. A1 OCTAL REG. B1 OCTAL REG. A2 OCTAL REG. B2 1 S0 ,S1 2 MUX OE 8 2619 drw 01 Y0 -Y7 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES 1994 Integrated Device Technology, Inc. APRIL 1994 DSC-4215/4 6.2 1 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES 1 24 2 23 3 22 4 5 6 7 8 9 P24-1 D24-1 SO24-2 SO24-7 SO24-8* & E24-1 21 20 19 18 17 16 10 15 11 14 12 13 INDEX Vcc S0 S1 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 OE 4 D1 D2 D3 NC D4 D5 D6 5 3 2 28 27 26 25 1 6 24 7 8 23 L28-1 22 9 21 10 20 11 19 12 13 14 15 16 17 18 Y0 Y1 Y2 NC Y3 Y4 Y5 D7 CLK GND NC OE Y7 Y6 I0 I1 D0 D1 D2 D3 D4 D5 D6 D7 CLK GND D0 I1 I0 NC Vcc S0 S1 PIN CONFIGURATIONS 2619 drw 03 2619 drw 02 *FCT520 only DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW LCC TOP VIEW DEFINITION OF FUNCTIONAL TERMS Pin Names REGISTER SELECTION Description S1 S0 Register Dn Register input Port. 0 0 B2 CLK Clock input. Enter data into registers on LOWto-HIGH transitions. 0 1 B1 1 0 A2 I0, I1 Instruction inputs. See Figure 1 and struction Control Tables. 1 1 A1 S0, S1 Multiplexer select. Inputs either register A1, A2, B1 or B2 data to be available at the output port. OE Output enable for 3-state output port. Yn Register output port. in- 2619 tbl 02 2619 tbl 01 DUAL 2-LEVEL SINGLE 4-LEVEL A1 B1 A1 B1 A1 B1 A2 B2 A2 B2 A2 B2 IDT29FCT520T I=2 I=1 I=0 A1 B1 A1 B1 A1 B1 A2 B2 A2 B2 A2 B2 IDT29FCT521T I=2 I=1 I=0 NOTE: 1. I = 3 for hold. Figure 1. Data Loading in 2-Level Operation 6.2 2619 drw 04 2 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES ABSOLUTE MAXIMUM RATINGS(1) CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Rating Commercial VTERM(2) Terminal Voltage –0.5 to +7.0 with Respect to GND (3) VTERM Terminal Voltage –0.5 to with Respect to VCC +0.5 GND TA Operating 0 to +70 Temperature TBIAS Temperature –55 to +125 Under Bias TSTG Storage –55 to +125 Temperature PT Power Dissipation 0.5 Military –0.5 to +7.0 Unit V –0.5 to VCC +0.5 V –55 to +125 °C –65 to +135 °C –65 to +150 °C 0.5 W I OUT –60 to +120 mA DC Output Current –60 to +120 Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V Typ. 6 VOUT = 0V 8 Max. Unit 10 pF 12 NOTE: 1. This parameter is measured at characterization but not tested. pF 2619 lnk 04 2619 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current (4) VCC = Max. VI = 2.7V — — ±1 µA IIL Input LOW Current(4) VCC = Max. VI = 0.5V — — ±1 µA VCC = Max. VO = 2.7V — — ±1 µA VO = 0.5V (4) IOZH High Impedance IOZL Output Current — — ±1 II Input HIGH Current(4) VCC = Max., VI = VCC (Max.) — — ±1 µA VIK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V –60 –120 –225 mA 2.4 3.3 — V 2.0 3.0 — — 0.3 0.5 V — 200 — mV — 0.01 1 mA (3) IOS Short Circuit Current VCC = Max. , VO = GND VOH Output HIGH Voltage VCC = Min. IOH = –6mA MIL. VIN = VIH or VIL IOH = –8mA COM’L. IOH = –12mA MIL. IOH = –15mA COM’L. VOL Output LOW Voltage VH Input Hysteresis ICC Quiescent Power Supply Current VCC = Min. IOL = 32mA MIL. VIN = VIH or VIL IOL = 48mA COM’L. — VCC = Max. VIN = GND or VCC NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is ±5µA at TA = -55°C. 6.2 2619 tbl 05 3 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES POWER SUPPLY CHARACTERISTICS Symbol Parameter ∆ICC Quiescent Power Supply Current, TTL Inputs HIGH ICCD Dynamic Power Supply Current(4) Test Conditions(1) Min. Typ.(2) Max. Unit — 0.5 2.0 mA VIN = VCC VIN = GND — 0.15 0.25 mA/ MHz VCC = Max., Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND One Bit Toggling at fi = 5MHz 50% Duty Cycle VIN = VCC VIN = GND — 1.5 3.5 mA VIN = 3.4V VIN = GND — 2.0 5.5 VCC = Max., Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND Eight Bits Toggling at fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND — 3.8 7.3(5) VIN = 3.4V VIN = GND — 6.0 16.3(5) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open OE = GND One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT +IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL HIgh Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. 6.2 2619 tbl 06 4 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT520AT/521AT Com'l. Symbol tPHL tPLH tPHL tPLH tSU tH tSU tH tPHZ tPLZ tPZH tPZL tW Parameter Propagation Delay CLK to Yn Propagation Delay S0 or S1 to Yn Set-up Time, HIGH or LOW Dn to CLK Hold Time, HIGH or LOW Dn to CLK Set-up Time, HIGH or LOW I0 or I1 to CLK Hold Time, HIGH or LOW I0 or I1 to CLK Output Disable Time Condition(1) CL = 50pF RL = 500Ω FCT520BT/521BT Mil. Com'l. Mil. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min. (2) Max. Unit 2.0 14.0 2.0 16.0 2.0 7.5 2.0 8.0 ns 2.0 13.0 2.0 15.0 2.0 7.5 2.0 8.0 ns 5.0 — 6.0 — 2.5 — 2.8 — ns 2.0 — 2.0 — 2.0 — 2.0 — ns 5.0 — 6.0 — 4.0 — 4.5 — ns 2.0 — 2.0 — 2.0 — 2.0 — ns 1.5 12.0 1.5 13.0 1.5 7.0 1.5 7.5 ns 1.5 15.0 1.5 16.0 1.5 7.5 1.5 8.0 ns 7.0 — 8.0 — 5.5 — 6.0 — ns Output Enable Time Clock Pulse Width HIGH or LOW 2619 tbl 07 FCT520CT/521CT Com'l. Symbol tPHL tPLH tPHL tPLH tSU tH tSU tH tPHZ tPLZ tPZH tPZL tW Parameter Propagation Delay CLK to Yn Propagation Delay S0 or S1 to Yn Set-up Time, HIGH or LOW Dn to CLK Hold Time, HIGH or LOW Dn to CLK Set-up Time, HIGH or LOW I0 or I1 to CLK Hold Time, HIGH or LOW I0 or I1 to CLK Output Disable Time Condition(1) CL = 50pF RL = 500Ω FCT520DT/521DT Mil. Com'l. Mil. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min. (2) Max. Unit 2.0 6.0 2.0 7.0 2.0 5.2 — — ns 2.0 6.0 2.0 7.0 2.0 4.8 — — ns 2.5 — 2.8 — 1.5 — — — ns 2.0 — 2.0 — 1.0 — — — ns 4.0 — 4.5 — 2.0 — — — ns 2.0 — 2.0 — 1.0 — — — ns 1.5 6.0 1.5 6.0 1.5 4.8 — — ns 1.5 6.0 1.5 7.0 1.5 4.0 — — ns 5.5 — 6.0 — 3.0 — — — ns Output Enable Time Clock Pulse Width HIGH or LOW(3) NOTES: 1. See test circuit and waveforms. 2. Minimum units are guaranteed but not tested on Propagation Delays. 2619 tbl 08 6.2 5 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES TEST CIRCUITS AND WAVEFORMS SWITCH POSITION TEST CIRCUITS FOR ALL OUTPUTS V CC 7.0V 500Ω Pulse Generator Open Drain Disable Low Closed Open All Other Tests D.U.T. 50pF RT Switch Enable Low V OUT VIN Test DEFINITIONS: 2619 lnk 09 CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. 500Ω CL 2619 drw 05 SET-UP, HOLD AND RELEASE TIMES DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tH tSU tREM tSU PULSE WIDTH 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH 2619 drw 07 2619 drw 06 PROPAGATION DELAY ENABLE AND DISABLE TIMES ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V DISABLE 3V CONTROL INPUT 1.5V OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH 2619 drw 08 SWITCH OPEN 0V tPLZ tPZL VOH 1.5V VOL 3.5V 0.3V VOL tPHZ 0.3V VOH 1.5V 0V 0V 2619 drw 09 NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns 6.2 6 IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT MULTILEVEL PIPELINE REGISTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES ORDERING INFORMATION 29FCT X XX Temperature Family Range XX Device Type X Package X Process Blank B Commercial MIL-STD-883, Class B P D L SO PY E Q Plastic DIP CERDIP Leadless Chip Carrier Small Outline IC Shrink Small Outline Package CERPACK Quarter-size Small Outline Package 520AT 521AT 520BT 521BT 520CT 521CT 520DT 521DT Multilevel Pipeline Register Multilevel Pipeline Register Blank 2 High Drive Balanced Drive 54 74 -55°C to +125°C 0°C to +70°C 2619 drw 10 6.2 7