TI LM2841YMK-ADJL/NOPB Input step-down dc/dc regulator in thin sot Datasheet

LM2841, LM2842
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LM2840/LM2841/LM2842/ LM2840-Q1/LM2841-Q1/LM2842-Q1 100/300/600 mA 42V Input
Step-Down DC/DC Regulator in Thin SOT
Check for Samples: LM2841, LM2842
FEATURES
DESCRIPTION
•
The LM2840, LM2841 and LM2842 are PWM DC/DC
buck (step-down) regulators. With a wide input range
from 4.5V-42V, they are suitable for a wide range of
applications such as power conditioning from
unregulated sources. They feature a low RDSON (0.9Ω
typical) internal switch for maximum efficiency (85%
typical). Operating frequency is fixed at 550 kHz (X
version) and 1.25 MHz (Y version) allowing the use of
small external components while still being able to
have low output voltage ripple. Soft-start can be
implemented using the shutdown pin with an external
RC circuit allowing the user to tailor the soft-start time
to a specific application.
1
2
•
•
•
•
•
•
•
•
•
LM2840Q, LM2841-Q1 and LM2842-Q1 are
Automotive Grade Products that are AEC-Q100
Grade 1 Qualified (-40°C to +125°C Operating
Junction Temperature)
Input Voltage Range of 4.5V to 42V
Output Current Options of 100 mA, 300 mA
and 600 mA
Feedback Pin Voltage of 0.765V
550 kHz (X) or 1.25 MHz (Y) Switching
Frequency
Low Shutdown IQ, 16 µA Typical
Short Circuit Protected
Internally Compensated
Soft-Start Circuitry
Small Overall Solution Size (SOT-6L Package)
The LM2840 is optimized for up to 100 mA, the
LM2841 for 300 mA and the LM2842 is optimized for
up to 600 mA load currents. They all have a 0.765V
nominal feedback voltage.
Additional features include: thermal shutdown, VIN
under-voltage lockout, and gate drive under-voltage
lockout. The LM2840, LM2841 and LM2842 are
available in a low profile SOT-6L package.
APPLICATIONS
•
•
•
•
Battery Powered Equipment
Industrial Distributed Power Applications
Portable Media Players
Portable Hand Held Instruments
Typical Application Circuit
CBOOT
L1
VOUT
LM2840/1/2-ADJL
VIN
VIN
CB
SHDN
SW
GND
FB
D1
R1
CIN
R2
COUT
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2013, Texas Instruments Incorporated
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Connection Diagram
Top View
LM2840/1/2
CB
1
GND
2
FB
3
PIN 1 ID
6
SW
5
VIN
4
SHDN
Figure 1. SOT 6 Lead
See Package Number DDC (R-PDSO-G6)
PIN DESCRIPTIONS
Pin
Name
1
CB
2
GND
3
FB
4
SHDN
Function
SW FET gate bias voltage. Connect CBOOT cap between CB and SW.
Ground connection.
Feedback pin: Set feedback voltage divider ratio with VOUT = VFB (1+(R1/R2)). Resistors should be
in the 100-10K range to avoid input bias errors.
Logic level shutdown input. Pull to GND to disable the device and pull high to enable the device. If
this function is not used tie to VIN or leave open.
5
VIN
Power input voltage pin: 4.5V to 42V normal operating range.
6
SW
Power FET output: Connect to inductor, diode, and CBOOT cap.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings
(1) (2)
VIN
-0.3V to +45V
SHDN
-0.3V to (VIN+0.3V) <45V
SW Voltage
-0.3V to +45V
CB Voltage above SW Voltage
7V
FB Voltage
-0.3V to +5V
Maximum Junction Temperature
150°C
Power Dissipation (3)
Internally Limited
Lead Temperature
300°C
Vapor Phase (60 sec.)
215°C
Infrared (15 sec.)
220°C
ESD Susceptibility
(1)
(4)
Human Body Model
2 kV
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated
using: PD (MAX) = (TJ(MAX) − TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and
the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal
shutdown engages at TJ=175°C (typ.) and disengages at TJ= 155°C (typ).
Human Body Model, applicable std. JESD22-A114-C.
(2)
(3)
(4)
Operating Conditions
Operating Junction Temperature Range
(1)
−40°C to +125°C
−65°C to +150°C
Storage Temperature
Input Voltage VIN
4.5V to 42V
SW Voltage
(1)
Up to 42V
All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% production tested. All limits at temperature extremes are ensured via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Electrical Characteristics
Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating
Temperature Range ( TJ = −40°C to +125°C). Minimum and Maximum limits are specified through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes
only. Unless otherwise stated the following conditions apply: VIN = 12V.
Symbol
IQ
Parameter
Quiescent current
Conditions
Min
(1)
SHDN = 0V
Typ
(2)
Max
(1)
16
40
Device On, Not Switching
1.30
1.75
Device On, No Load
1.35
1.85
Units
µA
mA
RDSON
Switch ON resistance
See (3)
0.9
1.6
Ω
ILSW
Switch leakage current
VIN = 42V
0.0
0.5
µA
ICL
Switch current limit
LM2840
(4)
525
900
mA
LM2841
(4)
525
900
mA
LM2842
(4)
1.15
1.7
A
0.1
1.0
µA
0.765
0.782
V
IFB
Feedback pin bias current
VFB
FB Pin reference voltage
(1)
(2)
(3)
(4)
(5)
LM2840/41/42
(5)
0.747
All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% production tested. All limits at temperature extremes are ensured via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Typical numbers are at 25°C and represent the most likely norm.
Includes the bond wires, RDSON from VIN pin to SW pin.
Current limit at 0% duty cycle. May be lower at higher duty cycle or input voltages below 6V.
Bias currents flow into pin.
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Electrical Characteristics (continued)
Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating
Temperature Range ( TJ = −40°C to +125°C). Minimum and Maximum limits are specified through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at TJ = +25°C, and are provided for reference purposes
only. Unless otherwise stated the following conditions apply: VIN = 12V.
Symbol
Parameter
Conditions
Min
(1)
(6)
Typ
(2)
Max
(1)
Units
tON(min)
Minimum ON time
See
100
150
ns
tOFF(min)
Minimum OFF time
X option
110
370
ns
Y option
104
200
ns
550
750
fSW
LM2840/41/42X, VFB = 0.5V
Switching frequency
325
LM2840/41/42X, VFB = 0V
LM2840/41/42Y, VFB = 0.5V
140
0.95
LM2840/41/42Y, VFB = 0V
DMAX
VUVP
V SHDN
Maximum duty cycle
LM2840/41/42X
88
94
LM2840/41/42Y
81
87
Undervoltage lockout
thresholds
On threshold
4.4
3.7
Shutdown threshold
Device on
Off threshold
Shutdown pin input bias current VSHDN = 2.3V
1.50
0.35
3.5
2.3
Device off
ISHDN
1.25
(5)
VSHDN = 0V
kHz
MHz
%
3.25
1.0
0.9
0.3
0.05
1.5
0.02
1.5
V
V
µA
THERMAL SPECIFICATIONS
RθJA
Junction-to-Ambient Thermal
Resistance, SOT-6L Package
RθJC
Junction-to-Case Thermal
Resistance, SOT-6L Package
(6)
(7)
4
See
(7)
121
°C/W
94
°C/W
Minimum On Time specified by design and simulation.
All numbers apply for packages soldered directly onto a 3" x 3" PC board with 2 oz. copper on 4 layers in still air in accordance to
JEDEC standards. Thermal resistance varies greatly with layout, copper thickness, number of layers in PCB, power distribution, number
of thermal vias, board size, ambient temperature, and air flow.
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Typical Performance Characteristics
Efficiency vs. Load Current (LM2842X, VOUT = 3.3V)
Efficiency vs. Load Current (LM2841X, VOUT = 3.3V)
100
100
VIN = 12V
VIN = 12V
80
VIN = 36V
60
VIN = 36V
EFFICIENCY (%)
EFFICIENCY (%)
80
VIN = 24V
40
60
VIN = 24V
40
20
20
0
0.0
0.1
0.2
0.3
0.4
0.5
0
0.0
0.6
0.1
0.2
0.3
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 2.
Figure 3.
Efficiency vs. Load Current (LM2840X, VOUT = 8V)
Switching Frequency vs. Temperature (X version)
100
VIN = 12V
90
EFFICIENCY (%)
80
VIN = 24V
70
60
50
40
30
20
10
0
0
20
40
60
80
100
120
LOAD CURRENT (mA)
Figure 4.
Figure 5.
Input UVLO Voltage vs. Temperature
Switch Current Limit vs. SHDN Pin Voltage
(Soft-start Implementation, LM2840/41)
SWITCH CURRENT LIMIT (mA)
800
600
400
200
0
1.0
1.6
2.2
2.8
3.4
4.0
SHDN PIN VOLTAGE (V)
Figure 6.
Figure 7.
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Typical Performance Characteristics (continued)
Switch Current Limit vs. SHDN Pin Voltage
(Soft-start Implementation, LM2842)
SHDN Pin Current vs. SHDN Pin Voltage
SWITCH CURRENT LIMIT (A)
1.2
1.0
0.9
0.7
0.6
0.4
1.1
1.7
2.3
2.8
3.4
4.0
SHDN PIN VOLTAGE (V)
Figure 8.
Figure 9.
Switching Node and Output Voltage Waveforms
Load Transient Waveforms
VIN = 12V, VOUT = 3.3V, IOUT = 200 mA
Top trace: VOUT, 10 mV/div, AC Coupled
Bottom trace: SW, 5V/div, DC Coupled
T = 1 µs/div
Figure 10.
VIN = 12V, VOUT = 3.3V, IOUT = 300 mA to 200 mA to 300 mA
Top trace: VOUT, 20 mV/div, AC Coupled
Bottom trace: IOUT, 100 mA/div, DC Coupled
T = 200 µs/div
Figure 11.
Start-up Waveform
VIN = 12V, VOUT = 3.3V, IOUT = 50 mA
Top trace: VOUT, 1V/div, DC Coupled
Bottom trace: SHDN, 2V/div, DC Coupled
T = 40 µs/div
Figure 12.
6
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BLOCK DIAGRAM
CB
+
OSC
SET
FB
+
PWM
Comp
Error
Amp
+
Bandgap
Soft
Start
VIN
Max Duty
Cycle Limit
+
RESET
Inductor
Current
Measurement
DC
LIMIT
BUCK
DRIVE
FET
Driver
SW
UVLO
TSD
UVLO
Comp
Thermal
Shutdown
BG
Voltage
Regulator
GND
SHDN
Figure 13. Block Diagram
OPERATION
PROTECTION
The LM2840/1/2 has dedicated protection circuitry running during normal operation to protect the IC. The thermal
shutdown circuitry turns off the power device when the die temperature reaches excessive levels. The UVLO
comparator protects the power device during supply power startup and shutdown to prevent operation at
voltages less than the minimum input voltage. A gate drive (CB) under-voltage lockout is included to ensure that
there is enough gate drive voltage to drive the MOSFET before the device tries to start switching. The
LM2840/1/2 also features a shutdown mode decreasing the supply current to approximately 16 µA.
CONTINUOUS CONDUCTION MODE
The LM2840/1/2 contains a current-mode, PWM buck regulator. A buck regulator steps the input voltage down to
a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady
state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW. In the first
cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and
the load current is supplied by COUT and the rising current through the inductor. During the second cycle the
transistor is open and the diode is forward biased due to the fact that the inductor current cannot instantaneously
change direction. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of
these two cycles determines the output voltage. The output voltage is defined approximately as: D=VOUT/VIN and
D’ = (1-D) where D is the duty cycle of the switch. D and D' will be required for design calculations.
DESIGN PROCEDURE
This section presents guidelines for selecting external components.
SETTING THE OUTPUT VOLTAGE
The output voltage is set using the feedback pin and a resistor divider connected to the output as shown on the
front page schematic. The feedback pin voltage 0.765V, so the ratio of the feedback resistors sets the output
voltage according to the following equation: VOUT=0.765V(1+(R1/R2))
Typically R2 will be given as 100Ω-10 kΩ for a starting value. To solve for R1 given R2 and VOUT use
R1=R2((VOUT/0.765V)-1).
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INPUT CAPACITOR
A low ESR ceramic capacitor (CIN) is needed between the VIN pin and GND pin. This capacitor prevents large
voltage transients from appearing at the input. Use a 2.2 µF-10 µF value with X5R or X7R dielectric. Depending
on construction, a ceramic capacitor’s value can decrease up to 50% of its nominal value when rated voltage is
applied. Consult with the capacitor manufacturer's data sheet for information on capacitor derating over voltage
and temperature.
INDUCTOR SELECTION
The most critical parameters for the inductor are the inductance, peak current, and the DC resistance. The
inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages.
L=
(VIN - VOUT)VOUT
VIN x IRIPPLE x fSW
(1)
A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current
stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage
ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the
ripple current increases with the input voltage, the maximum input voltage is always used to determine the
inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is
available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the
inductor copper loss equal 2% of the output power. See AN-1197 SNVA038 for more information on selecting
inductors. A good starting point for most applications is a 10 µH to 22 µH with 1.1A or greater current rating for
the LM2842 or a 0.7A or greater current rating for the LM2840/41. Using such a rating will enable the
LM2840/1/2 to current limit without saturating the inductor. This is preferable to the LM2840/1/2 going into
thermal shutdown mode and the possibility of damaging the inductor if the output is shorted to ground or other
longterm overload.
OUTPUT CAPACITOR
The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant
frequency, PWM mode is approximated by: VRIPPLE = IRIPPLE(ESR+(1/(8fSWCOUT))) The ESR term usually plays
the dominant role in determining the voltage ripple. Low ESR ceramic capacitors are recommended. Capacitors
in the range of 22 µF-100 µF are a good starting point with an ESR of 0.1Ω or less.
BOOTSTRAP CAPACITOR
A 0.15 µF ceramic capacitor or larger is recommended for the bootstrap capacitor (CBOOT). For applications
where the input voltage is less than twice the output voltage a larger capacitor is recommended, generally 0.15
µF to 1 µF to ensure plenty of gate drive for the internal switches and a consistently low RDSON.
SOFT-START COMPONENTS
The LM2840/1/2 has circuitry that is used in conjunction with the SHDN pin to limit the inrush current on start-up
of the DC/DC switching regulator. The SHDN pin in conjunction with a RC filter is used to tailor the soft-start for a
specific application. When a voltage applied to the SHDN pin is between 0V and up to 2.3V it will cause the cycle
by cycle current limit in the power stage to be modulated for minimum current limit at 0V up to the rated current
limit at 2.3V. Thus controlling the output rise time and inrush current at startup. The resistor value should be
selected so the current sourced into the SHDN pin will be greater then the leakage current of the SHDN pin (1.5
µA ) when the voltage at SHDN is equal or greater then 2.3V.
SHUTDOWN OPERATION
The SHDN pin of the LM2840/1/2 is designed so that it may be controlled using 2.3V or higher logic signals. If
the shutdown function is not to be used the SHDN pin may be tied to VIN. The maximum voltage to the SHDN pin
should not exceed 42V. If the use of a higher voltage is desired due to system or other constraints it may be
used, however a 100 kΩ or larger resistor is recommended between the applied voltage and the SHDN pin to
protect the device.
8
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SCHOTTKY DIODE
The breakdown voltage rating of the diode (D1) is preferred to be 25% higher than the maximum input voltage.
The current rating for the diode should be equal to the maximum output current for best reliability in most
applications. In cases where the duty cycle is greater than 50%, the average diode current is lower. In this case it
is possible to use a diode with a lower average current rating, approximately (1-D)IOUT, however the peak current
rating should be higher than the maximum load current. A 0.5A to 1A rated diode is a good starting point.
LAYOUT CONSIDERATIONS
To reduce problems with conducted noise pick up, the ground side of the feedback network should be connected
directly to the GND pin with its own connection. The feedback network, resistors R1 and R2, should be kept
close to the FB pin, and away from the inductor to minimize coupling noise into the feedback pin. The input
bypass capacitor CIN must be placed close to the VIN pin. This will reduce copper trace resistance which effects
input voltage ripple of the IC. The inductor L1 should be placed close to the SW pin to reduce EMI and capacitive
coupling. The output capacitor, COUT should be placed close to the junction of L1 and the diode D1. The L1, D1,
and COUT trace should be as short as possible to reduce conducted and radiated noise and increase overall
efficiency. The ground connection for the diode, CIN, and COUT should be as small as possible and tied to the
system ground plane in only one spot (preferably at the COUT ground point) to minimize conducted noise in the
system ground plane. For more detail on switching power supply layout considerations see Application Note AN1149: Layout Guidelines for Switching Power Supplies SNVA021.
Application Information
L1
15 PH
CBOOT
LM2840/1/2-ADJL
4.5V to 42V IN
VIN
CB
SHDN
SW
GND
FB
3.3V OUT
0.1 PF
D1
MA2YD26
R1
3.4k
R2
1.02k
CIN
2.2 PF
COUT
10 PF
Figure 14. Application Circuit, 3.3V Output @ 100 mA
Table 1. Some Recommended Inductors (Others May Be Used)
Manufacturer
Inductor
Contact Information
Coilcraft
LPS4018, DO1608C, DO3308, and LPO2506 series
www.coilcraft.com
800-3222645
MuRata
LQH55D and LQH66S series
www.murata.com
Coiltronics
MP2 and MP2A series
www.cooperbussman.com
Table 2. Some Recommended Input And Output Capacitors (Others May Be Used)
Manufacturer
Capacitor
Contact Information
Vishay Sprague
293D, 592D, and 595D series tantalum
www.vishay.com
407-324-4140
Taiyo Yuden
High capacitance MLCC ceramic
www.t-yuden.com
408-573-4150
Cornell Dubilier
ESRD seriec Polymer Aluminum Electrolytic
SPV and AFK series V-chip series
www.cde.com
MuRata
High capacitance MLCC ceramic
www.murata.com
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CBOOT
LM2840/1/2-ADJL
7V to 42V IN
SHDN
SW
GND
FB
5V OUT
0.15 PF
D1
MA2YD26
CB
VIN
L1
15 PH
R1
5.62k
CIN
2.2 PF
R2
1.02k
COUT
47 PF
Figure 15. Application Circuit, 5V Output
CBOOT
LM2840/1/2-ADJL
15V to 42V IN
VIN
CB
SHDN
SW
GND
FB
L1
47 PH
12V OUT
0.15 PF
D1
MA2YD26
R1
14.7k
R2
1k
CIN
2.2 PF
COUT
22 PF
Figure 16. Application Circuit, 12V Output
CBOOT
LM2840/1/2-ADJL
18V to 42V IN
VIN
CB
SHDN
SW
GND
FB
L1
47 PH
15V OUT
0.15 PF
D1
MA2YD26
R1
28k
CIN
2.2 PF
R2
1.5k
COUT
22 PF
Figure 17. Application Circuit, 15V Output
CBOOT
LM2840/1/2-ADJL
4.5V to 12V IN
VIN
CB
SHDN
SW
GND
FB
L1
10 PH
0.8V OUT
0.15 PF
D1
MA2YD26
R1
30.9
CIN
2.2 PF
R2
787
COUT
100 PF
Figure 18. Application Circuit, 0.8V Output
10
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REVISION HISTORY
Changes from Revision G (April 2013) to Revision H
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 10
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PACKAGE OPTION ADDENDUM
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8-Oct-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2840XMK-ADJL/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SE8B
LM2840XMKX-ADJL/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SE8B
LM2840XQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SE9B
LM2840YMK-ADJL/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SF1B
LM2840YQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SF2B
LM2840YQMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SF2B
LM2841XMK-ADJL/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STFB
LM2841XMKX-ADJL/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STFB
LM2841XQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB1B
LM2841YMK-ADJL/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STTB
LM2841YMKX-ADJL/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STTB
LM2841YQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB2B
LM2841YQMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB2B
LM2842XMK-ADJL/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STVB
LM2842XMKX-ADJL/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STVB
LM2842XQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB3B
LM2842XQMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB3B
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
8-Oct-2015
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2842YMK-ADJL/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STXB
LM2842YMKX-ADJL/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
STXB
LM2842YQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB4B
LM2842YQMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SB4B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
8-Oct-2015
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2840, LM2840-Q1, LM2841, LM2841-Q1, LM2842, LM2842-Q1 :
• Catalog: LM2840, LM2841, LM2842
• Automotive: LM2840-Q1, LM2841-Q1, LM2842-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LM2840XMK-ADJL/NOPB
LM2840XMKX-ADJL/NOP
B
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2840XQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2840YMK-ADJL/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2840YQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2840YQMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2841XMK-ADJL/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2841XQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2841YMK-ADJL/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2841YQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2841YQMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2842XMK-ADJL/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2841XMKX-ADJL/NOP
B
LM2841YMKX-ADJL/NOP
B
LM2842XMKX-ADJL/NOP
B
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM2842XQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2842XQMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2842YMK-ADJL/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2842YQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2842YQMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2842YMKX-ADJL/NOP
B
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2840XMK-ADJL/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
SOT
DDC
6
3000
210.0
185.0
35.0
LM2840XMKX-ADJL/NOP
B
LM2840XQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2840YMK-ADJL/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2840YQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2840YQMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2841XMK-ADJL/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
SOT
DDC
6
3000
210.0
185.0
35.0
SOT
DDC
6
1000
210.0
185.0
35.0
LM2841XMKX-ADJL/NOP
B
LM2841XQMK/NOPB
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
2-Sep-2015
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2841YMK-ADJL/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
SOT
DDC
6
3000
210.0
185.0
35.0
LM2841YMKX-ADJL/NOP
B
LM2841YQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2841YQMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2842XMK-ADJL/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
SOT
DDC
6
3000
210.0
185.0
35.0
LM2842XMKX-ADJL/NOP
B
LM2842XQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2842XQMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2842YMK-ADJL/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
SOT
DDC
6
3000
210.0
185.0
35.0
LM2842YQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2842YQMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2842YMKX-ADJL/NOP
B
Pack Materials-Page 3
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