HITACHI HD74ALVCH162827

HD74ALVCH162827
20-bit Buffers / Drivers with 3-state Outputs
ADE-205-188B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162827 is composed of two 10-bit sections with separate output enable signals. For
either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both
be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that
10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include
26 Ω resistors to reduce overshoot and undershoot.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@V CC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• All outputs have equivalent 26 Ω series resistors, so no external resistors are required.
HD74ALVCH162827
Function Table
Inputs
Output Y
OE1
OE2
A
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
H : High level
L : Low level
X : Immaterial
Z : High impedance
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HD74ALVCH162827
Pin Arrangement
56 1OE2
1OE1 1
1Y1 2
55 1A1
1Y2 3
54 1A2
GND 4
53 GND
1Y3 5
52 1A3
1Y4 6
VCC 7
51 1A4
1Y5 8
49 1A5
1Y6 9
48 1A6
1Y7 10
47 1A7
GND 11
46 GND
1Y8 12
45 1A8
1Y9 13
44 1A9
1Y10 14
43 1A10
2Y1 15
42 2A1
2Y2 16
41 2A2
2Y3 17
40 2A3
GND 18
39 GND
2Y4 19
38 2A4
2Y5 20
37 2A5
2Y6 21
36 2A6
VCC 22
35 VCC
2Y7 23
34 2A7
50 VCC
2Y8 24
33 2A8
GND 25
32 GND
2Y9 26
31 2A9
2Y10 27
30 2A10
2OE1 28
29 2OE2
(Top view)
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HD74ALVCH162827
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
VCC
–0.5 to 4.6
V
VI
–0.5 to 4.6
V
VO
–0.5 to VCC +0.5
V
Input clamp current
I IK
–50
mA
VI < 0
Output clamp current
I OK
±50
mA
VO < 0 or VO > VCC
Continuous output current
IO
±50
mA
VO = 0 to VCC
VCC, GND current / pin
I CC or IGND
±100
mA
Maximum power dissipation
at Ta = 55°C (in still air) *3
PT
1
W
Storage temperature
Tstg
–65 to 150
°C
Supply voltage
Input voltage
*1
Output voltage
Notes:
*1, 2
Conditions
TSSOP
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Supply voltage
VCC
2.3
3.6
V
Input voltage
VI
0
VCC
V
Output voltage
VO
0
VCC
V
High level output current
I OH
—
–6
mA
—
–8
VCC = 2.7 V
—
–12
VCC = 3.0 V
—
6
—
8
VCC = 2.7 V
—
12
VCC = 3.0 V
Low level output current
I OL
mA
Input transition rise or fall rate
∆t / ∆v
0
10
ns / V
Operating temperature
Ta
–40
85
°C
Note: Unused control inputs must be held high or low to prevent them from floating.
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Conditions
VCC = 2.3 V
VCC = 2.3 V
HD74ALVCH162827
Logic Diagram
1OE1 1
1OE2 56
1A1
55
2
1Y1
To nine other channels
2OE1 28
2OE2 29
2A1
42
15
2Y1
To nine other channels
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HD74ALVCH162827
Electrical Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V) *1
Input voltage
VIH
VIL
Output voltage
VOH
Min
Max
Unit
2.3 to 2.7
1.7
—
V
2.7 to 3.6
2.0
—
2.3 to 2.7
—
0.7
2.7 to 3.6
—
0.8
I OH = –100 µA
Min to Max VCC–0.2
—
2.3
1.9
—
I OH = –4 mA, VIH = 1.7 V
2.3
1.7
—
I OH = –6 mA, VIH = 1.7 V
3.0
2.4
—
I OH = –6 mA, VIH = 2.0 V
2.7
2.0
—
I OH = –8 mA, VIH = 2.0 V
3.0
2.0
—
I OH = –12 mA, VIH = 2.0 V
Min to Max —
0.2
I OL = 100 µA
2.3
—
0.4
I OL = 4 mA, VIL = 0.7 V
2.3
—
0.55
I OL = 6 mA, VIL = 0.7 V
3.0
—
0.55
I OL = 6 mA, VIL = 0.8 V
2.7
—
0.6
I OL = 8 mA, VIL = 0.8 V
3.0
—
0.8
I OL = 12 mA, VIL = 0.8 V
I IN
3.6
—
±5
I IN (hold)
2.3
45
—
VIN = 0.7 V
2.3
–45
—
VIN = 1.7 V
3.0
75
—
VIN = 0.8 V
3.0
–75
—
VIN = 2.0 V
3.6
—
±500
VIN = 0 to 3.6 V
I OZ
3.6
—
±10
µA
VOUT = VCC or GND
Quiescent supply current I CC
3.6
—
40
µA
VIN = VCC or GND
3.0 to 3.6
—
750
µA
VIN = one input at (VCC–0.6) V,
other inputs at V CC or GND
VOL
Input current
Off state output current
*2
∆I CC
V
Test Conditions
µA
VIN = VCC or GND
Notes: 1. For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
2. For I/O ports, the parameter I OZ includes the input leakage current.
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HD74ALVCH162827
Switching Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
Typ
Max
Unit
FROM
(Input)
TO
(Output)
Propagation delay time
t PLH
2.5±0.2
1.0
—
4.4
ns
A
Y
t PHL
2.7
—
—
4.4
3.3±0.3
1.0
—
3.8
t ZH
2.5±0.2
1.2
—
6.3
ns
OE
Y
t ZL
2.7
—
—
6.2
3.3±0.3
1.0
—
5.1
t HZ
2.5±0.2
1.9
—
5.9
ns
OE
Y
t LZ
2.7
—
—
5.2
3.3±0.3
1.3
—
4.7
3.3
—
3.5
—
pF
Control inputs
3.3
—
6.0
—
3.3
—
7.0
—
Output enable time
Output disable time
Input capacitance
Output capacitance
CIN
CO
Data inputs
pF
Outputs
Test Circuit
See under table
500 Ω
S1
OPEN
GND
*1
C L = 50 pF
500 Ω
Load Circuit for Outputs
Symbol
t PLH / t PHL
t ZH/ t HZ
t ZL / t LZ
Note:
1.
Vcc=2.5±0.2V
Vcc=2.7V,
3.3±0.3V
OPEN
OPEN
GND
GND
4.6 V
6.0 V
CL includes probe and jig capacitance.
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HD74ALVCH162827
Waveforms – 1
tr
tf
90 %
Input
VIH
90 %
Vref
Vref
10 %
10 %
GND
t PHL
t PLH
VOH
Output
Vref
Vref
VOL
Waveforms – 2
tf
tr
VIH
90 %
90 %
Vref
Output
Control
Vref
10 %
t ZL
10 %
GND
t LZ
≈VOH1
Vref
Waveform - A
t ZH
Waveform - B
VOL + 0.3 V
t HZ
VOH – 0.3 V
Vref
VOL
VOH
≈VOL1
TEST
VIH
Vref
VOH1
VOL1
Notes:
1.
2.
3.
4.
8
Vcc=2.5±0.2V
Vcc=2.7V,
3.3±0.3V
2.3 V
2.7 V
1.2 V
2.3 V
1.5 V
3.0 V
GND
GND
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10
MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
Waveform–A is for an output with internal conditions such that the output is low except when
disabled by the output control.
Waveform–B is for an output with internal conditions such that the output is high except
when disabled by the output control.
The output are measured one at a time with one transition per measurement.
HD74ALVCH162827
Package Dimensions
Unit : mm
+0.3
14.00 –0.1
29
6.10 +0.3
–0.1
56
28
0.15 ± 0.05
0.08 M
0.40 Max
0.10
1.20 max
0.20 +0.1
–0.05
0.50
0.05 Min
1
8.10 ± 0.3
10° Max
0.50 ± 0.1
Hitachi code
EIAJ code
JEDEC code
TTP-56D
—
—
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HD74ALVCH162827
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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