Maxim MAX782C/D Triple-output power-supply controller for notebook computer Datasheet

19-0146; Rev 2; 5/94
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Triple-Output Power-Supply
Controller for Notebook Computers
_______________________Applications
Notebook Computers
Portable Data Terminals
Communicating Computers
Pen-Entry Systems
ON3
µP
MEMORY
POWER
SECTION
PART
TEMP. RANGE
+5V
MAX782
LOW-BATTERY WARNING
VPP (0V/5V/12V)
VOUT
0°C to +70°C
36 SSOP
3.3V
MAX782RCBX
MAX782SCBX
0°C to +70°C
0°C to +70°C
36 SSOP
36 SSOP
3.45V
3.6V
Ordering Information continued on last page.
__________________Pin Configuration
TOP VIEW
ON3 1
36 SS3
D1 2
35 CS3
D2 3
34 FB3
D3 4
33 DH3
VH 5
Q3 6
MAX782
32 LX3
31 BST3
30 DL3
Q1 8
29 V+
VPPA 9
28 VL
27 FB5
VDD 10
26 PGND
VPPB 11
25 DL5
24 BST5
REF 13
SYNC 14
23 LX5
DA1 15
22 DH5
DA0 16
21 CS5
PERIPHERALS
SUSPEND POWER
VPP (0V/5V/12V)
PIN-PACKAGE
MAX782CBX
4
ON5
SYNC
______________Ordering Information
GND 12
+3.3V
VPP
CONTROL
Dual PWM Buck Controllers (+3.3V and +5V)
Dual PCMCIA VPP Outputs (0V/5V/12V)
Three Precision Comparators or Level Translators
95% Efficiency
420µA Quiescent Current;
70µA in Standby (linear regulators alive)
♦ 5.5V to 30V Input Range
♦ Small SSOP Package
♦ Fixed Output Voltages Available:
3.3 (standard)
3.45 (High-Speed Pentium™)
3.6 (PowerPC™)
Q2 7
______Typical Application Diagram
5.5V
TO
30V
___________________________Features
♦
♦
♦
♦
♦
DUAL
PCMCIA
SLOTS
DB1 17
20 SS5
DB0 18
19 ON5
SSOP
™Idle-Mode is a trademark of Maxim Integrated Products. Pentium is a trademark of Intel. PowerPC is a trademark of IBM.
________________________________________________________________ Maxim Integrated Products
Call toll free 1-800-998-8800 for free samples or literature.
1
MAX782
_______________General Description
The MAX782 is a system-engineered power-supply controller for notebook computers or similar battery-powered
equipment. It provides two high-performance step-down
(buck) pulse-width modulators (PWMs) for +3.3V and +5V,
and dual PCMCIA VPP outputs powered by an integral flyback winding controller. Other functions include dual, lowdropout, micropower linear regulators for CMOS/RTC backup, and three precision low-battery-detection comparators.
High efficiency (95% at 2A; greater than 80% at loads
from 5mA to 3A) is achieved through synchronous rectification and PWM operation at heavy loads, and IdleMode TM operation at light loads. It uses physically
small components, thanks to high operating frequencies (300kHz/200kHz) and a new current-mode PWM
architecture that allows for output filter capacitors as
small as 30µF per ampere of load. Line- and load-transient response are terrific, with a high 60kHz unity-gain
crossover frequency allowing output transients to be
corrected within four or five clock cycles. Low system
cost is achieved through a high level of integration and
the use of low-cost, external N-channel MOSFETs. The
integral flyback winding controller provides a low-cost,
+15V high-side output that regulates even in the
absence of a load on the main output.
Other features include low-noise, fixed-frequency PWM
operation at moderate to heavy loads and a synchronizable oscillator for noise-sensitive applications such as
electromagnetic pen-based systems and communicating computers. The MAX782 is a monolithic BiCMOS IC
available in fine-pitch, SSOP surface-mount packages.
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
ABSOLUTE MAXIMUM RATINGS
V+ to GND .................................................................-0.3V, +36V
PGND to GND........................................................................±2V
VL to GND ...................................................................-0.3V, +7V
BST3, BST5 to GND ..................................................-0.3V, +36V
LX3 to BST3.................................................................-7V, +0.3V
LX5 to BST5.................................................................-7V, +0.3V
Inputs/Outputs to GND
(D1-D3, ON5, REF, SYNC, DA1, DA0, DB1, DB0, ON5,
SS5, CS5, FB5, CS3, FB3, SS3, ON3) ..........-0.3V, (VL + 0.3V)
VDD to GND.................................................................-0.3V, 20V
VPPA, VPPB to GND.....................................-0.3V, (VDD + 0.3V)
VH to GND ...................................................................-0.3V, 20V
Q1-Q3 to GND.................................................-0.3V, (VH + 0.3V)
DL3, DL5 to PGND...........................................-0.3V, (VL + 0.3V)
DH3 to LX3 ..................................................-0.3V, (BST3 + 0.3V)
DH5 to LX5 ..................................................-0.3V, (BST5 + 0.3V)
REF, VL, VPP Short to GND........................................Momentary
REF Current.........................................................................20mA
VL Current ...........................................................................50mA
VPPA, VPPB Current .........................................................100mA
Continuous Power Dissipation (TA = +70°C)
SSOP (derate 11.76mW/°C above +70°C) ...................941mW
Operating Temperature Ranges:
MAX782CBX/MAX782__CBX ...............................0°C to +70°C
MAX782EBX/MAX782__EBX ............................-40°C to +85°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings‘” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = 15V, GND = PGND = 0V, IVL = IREF = 0mA, ON3 = ON5 = 5V, other digital input levels are 0V or +5V, TA = TMIN to TMAX,
unless otherwise noted.)
PARAMETER
CONDITIONS
+3.3V AND 5V STEP-DOWN CONTROLLERS
Input Supply Range
FB5 Output Voltage
FB3 Output Voltage
Load Regulation
Line Regulation
Current-Limit Voltage
SS3/SS5 Source Current
SS3/SS5 Fault Sink Current
15V FLYBACK CONTROLLER
VDD Regulation Setpoint
VDD Shunt Setpoint
VDD Shunt Current
0mV < (CS5-FB5) < 70mV, 6V < V+ < 30V
(includes load and line regulation)
MAX782
0mV < (CS3-FB3) < 70mV, 6V < V+ < 30V
MAX782R
(includes load and line regulation)
MAX782S
Either controller (CS_ - FB_ = 0mV to 70mV)
Either controller (V+ = 6V to 30V)
MIN
TYP
5.5
MAX
UNITS
30
V
4.80
5.08
5.20
V
3.17
3.32
3.46
3.35
3.50
3.65
2
0.03
3.46
3.60
3.75
V
V
V
%
%/V
CS3-FB3 or CS5-FB5
80
100
120
CS5-FB5 (VDD < 13V, flyback mode)
-50
-100
-160
2.5
2
4.0
6.5
µA
mA
14
20
V
V
mA
Falling edge, hysteresis = 1%
Rising edge, hysteresis = 1%
VDD = 20V
13
18
2
3
mV
Quiescent VDD Current
VDD = 18V, ON3 = ON5 = 5V,
VPPA/B programmed to 12V with no external load
140
300
µA
VDD Off Current
VDD = 18V, ON3 = ON5 = 5V,
VPPA/B programmed to Hi-Z or 0V
15
30
µA
PCMCIA REGULATORS (Note 1)
VPPA/VPPB Output Voltage
VPPA/VPPB Off Input Current
2
Program to 12V, 13V < VDD < 19V, 0mA < IL < 60mA
11.6
12.1
12.5
Program to 5V, 13V < VDD < 19V, 0mA < IL < 60mA
4.85
5.05
5.20
Program to 0V, 13V < VDD < 19V, -0.3mA < IL < 0.3mA
-0.3
Program to Hi-Z, VDD = 19V, 0V < VPP < 12V
_______________________________________________________________________________________
V
0.3
35
µA
Triple-Output Power-Supply
Controller for Notebook Computers
(V+ = 15V, GND = PGND = 0V, IVL = IREF = 0mA, ON3 = ON5 = 5V, other digital input levels are 0V or +5V, TA = TMIN to TMAX,
unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
INTERNAL REGULATOR AND REFERENCE
VL Output Voltage
ON5 = ON3 = 0V, 5.5V < V+ < 30V, 0mA < IL < 25mA
4.5
5.5
V
VL Fault Lockout Voltage
Falling edge, hysteresis = 1%
3.6
4.2
V
VL/FB5 Switchover Voltage
Rising edge of FB5, hysteresis = 1%
4.2
4.7
V
REF Output Voltage
No external load (Note 2)
3.24
3.36
V
REF Fault Lockout Voltage
Falling edge
2.4
3.2
V
REF Load Regulation
0mA < IL < 5mA
30
75
mV
V+ Standby Current
D1 = D2 = D3 = ON3 = ON5 = DA0 = DA1 = DB0 =
DB1 = 0V, V+ = 30V
70
110
µA
Quiescent Power Consumption
(both PWM controllers on)
D1 = D2 = D3 = DA0 = DA1 = DB0 = DB1 = 0V,
FB5 = CS5 = 5.25V, FB3 = CS3 = 3.5V
6.0
8.6
mW
V+ Off Current
FB5 = CS5 = 5.25V, VL switched over to FB5
30
60
µA
COMPARATORS
D1-D3 Trip Voltage
Falling edge, hysteresis = 1%
D1-D3 Input Current
D1 = D2 = D3 = 0V to 5V
1.61
Q1-Q3 Source Current
VH = 15V, Q1-Q3 forced to 2.5V
12
Q1-Q3 Sink Current
VH = 15V, Q1-Q3 forced to 2.5V
200
Q1-Q3 Output High Voltage
ISOURCE = 5µA, VH = 3V
Q1-Q3 Output Low Voltage
ISINK = 20µA, VH = 3V
Quiescent VH Current
VH = 18V, D1 = D2 = D3 = 5V, no external load
1.69
V
±100
nA
20
30
µA
500
1000
µA
VH-0.5
V
0.4
V
6
10
µA
OSCILLATOR AND INPUTS/OUTPUTS
Oscillator Frequency
SYNC = 3.3V
270
300
330
SYNC = 0V or 5V
170
200
230
SYNC High Pulse Width
200
SYNC Low Pulse Width
200
SYNC Rise/Fall Time
Maximum Duty Cycle
Input Low Voltage
ns
ns
Not tested
Oscillator SYNC Range
240
SYNC = 3.3V
89
92
SYNC = 0V or 5V
92
95
ON3, ON5, DA0, DA1, DB0, DB1, SYNC
ON3, ON5, DA0, DA1, DB0, DB1
Input High Voltage
SYNC
kHz
200
ns
350
kHz
%
0.8
2.4
V
V
VL-0.5
Input Current
ON3, ON5, DA0, DA1, DB0, DB1, VIN = 0V or 5V
DL3/DL5 Sink/Source Current
DL3, DL5 forced to 2V
1
DH3/DH5 Sink/Source Current
BST3-LX3 = BST5-LX5 = 4.5V, DH3, DH5 forced to 2V
1
DL3/DL5 On Resistance
High or low
7
Ω
DH3/DH5 On Resistance
High or low, BST3-LX3 = BST5-LX5 = 4.5V
7
Ω
±1
µA
A
A
Note 1: Output current is further limited by maximum allowable package power dissipation.
Note 2: Since the reference uses VL as its supply, V+ line regulation error is insignificant.
_______________________________________________________________________________________
3
MAX782
ELECTRICAL CHARACTERISTICS (continued)
__________________________________________Typical Operating Characteristics
(Circuit of Figure 1, Transpower transformer type TTI5870, TA = +25°C, unless otherwise noted.)
100
VIN = 6V
EFFICIENCY (%)
EFFICIENCY (%)
90
VIN = 15V
80
70
0.001
COMPONENTS,
OF TABLE 5. SYNC = 0V,
+3.3V OFF, IDD = 0mA
0.1
0.01
VIN = 30V
80
EFFICIENCY vs.
+3.3V OUTPUT CURRENT, 300kHz
EFFICIENCY (%)
VIN = 6V
VIN = 10V
VIN = 15V
80
+5V LOAD = 0A-1A
1
+5V LOAD = 3A
0.1
10
EFFICIENCY vs.
+3.3V OUTPUT CURRENT, 200kHz
5
15
10
25
20
30
INPUT VOLTAGE (V)
QUIESCENT INPUT CURRENT vs.
INPUT VOLTAGE
10000
IDD = 0mA
+5V ON
+5V LOAD = 0mA
+5V ON, +5V LOAD = 0mA
IDD = 0mA,
COMPONENTS OF TABLE 5
EFFICIENCY (%)
1
0.1
+5V OUTPUT CURRENT (A)
100
RSENSE = 0.020Ω
0.01
0.01
+5V OUTPUT CURRENT (A)
100
90
+3V LOAD = 0mA
VIN = 6V
VIN = 15V
90
70
0.001
10
1
10
IDD = 0mA
+3.3V OFF
VIN = 10V
IDD OUTPUT CURRENT vs. INPUT VOLTAGE
COILTRONIX CTX03-12062 TRANSFORMER
IDD LOAD CURRENT (A)
100
EFFICIENCY vs.
+5V OUTPUT CURRENT, 300kHz
+3.3V LOAD = +5V LOAD = 0mA
VIN = 6V
90
VIN = 15V
VIN = 30V
80
INPUT CURRENT (µA)
EFFICIENCY vs.
+5V OUTPUT CURRENT, 200kHz
1000
+5V, +3V ON
100
+5V, +3V OFF
0.01
0.1
70
0.001
10
1
10
0.01
1
0.1
+5V OUTPUT CURRENT vs.
MINIMUM INPUT VOLTAGE, 300kHz
9
8
7
IDD = 140mA
6
IDD = 60mA
MINIMUM INPUT VOLTAGE (V)
IDD = 300mA
IDD = 300mA
IDD = 140mA
6
IDD = 60mA
IDD = 0mA
+5V OUTPUT CURRENT (A)
4
25
30
CIRCUIT OF FIGURE 1,
SYNC = REF (300kHz)
ON3 = ON5 = 5V
100
10
+5V, VIN = 7.5V
+5V, VIN = 30V
+3.3V, VIN = 7.5V
1
IDD = 0mA
5
1
20
SWITCHING FREQUENCY vs.
LOAD CURRENT
1000
7
15
INPUT VOLTAGE (V)
COMPONENTS OF TABLE 4,
SYNC = 0V
8
10
5
+5V OUTPUT CURRENT vs.
MINIMUM INPUT VOLTAGE, 200kHz
9
0.1
0
+3.3V OUTPUT CURRENT (A)
+3.3V OUTPUT CURRENT (A)
5
0.01
10
SWITCHING FREQUENCY (kHz)
70
0.001
MINIMUM INPUT VOLTAGE (V)
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
10
0.01
0.1
1
+5V LOAD CURRENT (A)
10
0.1
100µA
10mA
1mA
100mA
LOAD CURRENT
_______________________________________________________________________________________
1A
Triple-Output Power-Supply
Controller for Notebook Computers
IDLE-MODE WAVEFORMS
PULSE-WIDTH MODULATION MODE WAVEFORMS
LX VOLTAGE
10V/div
LX VOLTAGE
10V/div
+5V OUTPUT
VOLTAGE
50mV/div
+5V OUTPUT
VOLTAGE
50mV/div
HORIZONTAL = 5µs/div
+5V OUTPUT CURRENT = 42mA
INPUT VOLTAGE = 16V
HORIZONTAL = 500ns/div
+5V OUTPUT CURRENT = 1A
INPUT VOLTAGE = 16V
+5V LOAD-TRANSIENT RESPONSE
+3.3V LOAD-TRANSIENT RESPONSE
3A
0A
3A
LOAD CURRENT
0A
+5V OUTPUT
50mV/div
HORIZONTAL = 200µs/div
VIN = 15V
LOAD CURRENT
+3.3V OUTPUT
50mV/div
HORIZONTAL = 200µs/div
VIN = 15V
_______________________________________________________________________________________
5
MAX782
_____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, Transpower transformer type TTI5870, TA = +25°C, unless otherwise noted.)
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
_____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, Transpower transformer type TTI5870, VDD ≥ 13V, TA = +25°C, unless otherwise noted.)
+5V LINE-TRANSIENT RESPONSE, RISING
+5V LINE-TRANSIENT RESPONSE, FALLING
+5V OUTPUT
50mV/div
+5V OUTPUT
50mV/div
VIN, 10V TO 16V
2V/div
VIN, 16V TO 10V
2V/div
HORIZONTAL = 20µs/div
ILOAD = 2A
HORIZONTAL = 20µs/div
ILOAD = 2A
+3.3V LINE-TRANSIENT RESPONSE, FALLING
+3.3V LINE-TRANSIENT RESPONSE, RISING
+3.3V OUTPUT
50mV/div
+3.3V OUTPUT
50mV/div
VIN, 10V TO 16V
2V/div
VIN, 16V TO 10V
2V/div
HORIZONTAL = 20µs/div
ILOAD = 2A
6
HORIZONTAL = 20µs/div
ILOAD = 2A
_______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
PIN
NAME
FUNCTION
1
ON3
2
D1
#1 level-translator/comparator noninverting input. Inverting comparator input is internally connected to
1.650V. Controls Q1. Connect to GND if unused.
3
D2
#2 level-translator/comparator noninverting input. Inverting comparator input is internally connected to
1.650V. Controls Q2. Connect to GND if unused.
4
D3
#3 level-translator/comparator noninverting input. Inverting comparator input is internally connected to
1.650V. Controls Q3. Connect to GND if unused.
5
VH
External supply input for level-translator/comparator. For N-channel FET drive, connect to VDD or external
+13V to +18V supply. For low-battery comparators, connect to +3.3V or +5V (or to VL/REF).
6
Q3
#3 level-translator/comparator output. Sources 20µA from VH when D3 is high. Sinks 500µA to GND
when D3 is low, even with VH = 0V.
7
Q2
#2 level-translator/comparator output. Sources 20µA from VH when D2 is high. Sinks 500µA to GND
when D2 is low, even with VH = 0V.
8
Q1
#1 level-translator/comparator output. Sources 20µA from VH when D1 is high. Sinks 500µA to GND
when D1 is low, even with VH = 0V.
9
VPPA
0V, 5V, 12V, Hi-Z PCMCIA VPP output. Sources up to 60mA. Controlled by DA0 and DA1.
10
VDD
15V flyback input (feedback). A weak shunt regulator conducts 3mA to GND when VDD exceeds 19V.
Also the supply input to the VPP regulators.
11
VPPB
0V, 5V, 12V, Hi-Z PCMCIA VPP output. Sources up to 60mA. Controlled by DB0 and DB1.
12
GND
Low-current analog ground
13
REF
3.3V reference output. Sources up to 5mA for external loads. Bypass to GND with 1µF/mA load or
0.22µF minimum.
14
SYNC
15-18
DA1, DA0,
DB1, DB0
19
ON5
Logic input to turn on +5V. Logic high turns on the regulator. Connect to VL for automatic startup.
20
SS5
+5V-supply soft-start control input. Ramp time to full current limit is 1ms/nF of capacitance to GND.
21
CS5
+5V-supply current-sense input. +100mV = current limit in buck mode, -100mV = current limit in flyback
mode (where the ±100mV are referenced to FB5).
22
DH5
+5V-supply external MOSFET high-side switch-drive output
23
LX5
+5V-supply inductor connection
Logic input to turn on +3.3V. Logic high turns on the regulator. Connect to VL for automatic start-up.
Oscillator frequency control and synchronization input: Connect to VL or to GND for f = 200kHz; connect
to REF for f = 300kHz. For external synchronization in the 240kHz to 350kHz range, a high-to-low transition causes the start of a new cycle.
Intel 82365 compatible PCMCIA VPP control inputs (see Table 1)
_______________________________________________________________________________________
7
MAX782
______________________________________________________________Pin Description
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
_________________________________________________Pin Description (continued)
PIN
NAME
FUNCTION
24
BST5
+5V-supply boost capacitor connection (0.1µF to LX5)
25
DL5
+5V-supply external MOSFET synchronous-rectifier drive output
26
PGND
27
FB5
28
VL
Internal 5V-supply output. Bypass with 4.7µF. This pin is linearly regulated from V+ or switched to the
+5V output to improve efficiency. VL is always on and can source up to 5mA for external loads.
29
V+
Main (battery) input: 5.5V to 30V
30
DL3
+3.3V-supply external MOSFET synchronous-rectifier drive output
31
BST3
+3.3V-supply boost capacitor connection (0.1µF to LX3)
32
LX3
+3.3V-supply inductor connection
33
DH3
+3.3V-supply external MOSFET high-side switch-drive output
34
FB3
+3.3V-supply feedback and low-side current-sense terminal
35
CS3
+3.3V-supply current-sense input. Maximum is +100mV referenced to FB3.
36
SS3
+3.3V-supply soft-start control input. Ramp time to full current limit is 1ms/nF of capacitance to GND.
Power ground
+5V-supply feedback input and low-side current-sense terminal
Table 1. Truth Table for VPP Control Pins
D_0
D_1
VPP_
0
0
1
1
0
1
0
1
0V
5V
12V
Hi-Z
_______________Detailed Description
The MAX782 converts a 5.5V to 30V input to five outputs
(Figure 1). It produces two high-power, switch-mode,
pulse-width modulated (PWM) supplies, one at +5V and
the other at +3.3V. These two supplies operate at either
200kHz or 300kHz, allowing extremely small external
components to be used. Output current capability
depends on external components, and can exceed 5A
8
on each supply. A 15V high-side (VDD) supply is also
provided, delivering an output current that can exceed
300mA, depending on the external components chosen.
Two linear regulators supplied by the 15V VDD line create programmable VPP supplies for PCMCIA slots.
These supplies (VPPA, VPPB) can be programmed to be
grounded or high impedance, or to deliver 5V or 12V at
up to 60mA.
An internal 5V, 25mA supply (VL) and a 3.3V, 5mA reference voltage (REF) are also generated, as shown in
Figure 2. Fault-protection circuitry shuts off the PWM
and high-side supply when the internal supplies lose
regulation.
Three precision comparators are included. Their output stages permit them to be used as level translators
for driving high-side external power MOSFETs: For
example, to facilitate switching VCC lines to PCMCIA
slots.
_______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
C1
33µF
29
16
15
VPP
CONTROL
INPUTS
18
17
V+
DA0
DA1
C14 C7
150µF 150µF
R1
25mΩ
L1
10µH
C5
31
33
32
30
D3
1N5819
N3
35
(NOTE 2)
+3.3V ON/OFF
C9
0.01µF
+5V ON/OFF
OSC SYNC
N1- N4 = Si9410DY
NOTE 1: BATTERY VOLTAGE RANGE 6.5V to 30V
WITH COMPONENTS SHOWN
SEE LOW-VOLTAGE (6-CELL) OPERATION SECTION.
NOTE 2: SEE FIGURE 5.
VDD
+5V at 5mA
9
C11
1µF
0V, 5V, 12V
11
C10
1µF
0V, 5V, 12V
10
MAX782
0.1µF
N1
VPPB
DB1
D1A
1N4148
+3.3V at 3A
VL
VPPA
DB0
BST3
BST5
DH3
DH5
LX3
LX5
DL3
DL5
CS3
CS5
34 FB3
36
SS3
1
ON3
19
ON5
14 SYNC
GND
12
C13
33µF
28
C2
4.7µF
FB5
SS5
VH
D1-D3
Q1-Q3
24
D2
EC11FS1
D1B
1N4148 C4
0.1µF
22
N2
1:2.2
MAX782
BATTERY INPUT
5.5V TO 30V
(NOTE 1)
+15V AT 300mA, SEE
HIGH-SIDE SUPPLY (VDD)
SECTION.
C12
2.2µF
23
+5V at 3A
25
N4
21
L2 10µH
D4
1N5819
R2
20mΩ
C6
330µF
27
20
5
C8
0.01µF
(NOTE 2)
COMPARATOR SUPPLY INPUT
2, 3, 4
3
8, 7, 6
3
COMPARATOR INPUTS
COMPARATOR OUTPUTS
REF PGND
13
26
3.3V AT 5mA
C3
1µF
Figure 1. MAX782 Application Circuit
+3.3V Supply
+5V Supply
The +3.3V supply is produced by a current-mode PWM
step-down regulator using two small N-channel MOSFETs,
a catch diode, an inductor, and a filter capacitor.
Efficiency is greatly enhanced by the use of the second
MOSFET (connected from LX3 to PGND), which acts as
a synchronous rectifier. A 100nF capacitor connected
to BST3 provides the drive voltage for the high-side
(upper) N-channel MOSFET.
A current limit set by an external sense resistor prevents
excessive inductor current during start-up or under
short-circuit conditions. A soft-start capacitor can be
chosen to tailor the rate at which the output ramps up.
This supply can be turned on by connecting ON3 to
logic high, or can be turned off by connecting ON3 to
GND. All logic levels are TTL and CMOS compatible.
The +5V output is produced by a current-mode PWM
step-down regulator similar to the +3.3V supply. This
supply uses a transformer primary as its inductor, the
secondary of which is used for the high-side (VDD)
supply. It also has current limiting and soft-start. It can
be turned off by connecting ON5 to GND, or turned on
by connecting ON5 to logic high.
The +5V supply’s dropout voltage, as configured in
Figure 1, is typically 400mV at 2A. As VIN approaches
5V, the +5V output gracefully falls with VIN until the VL
regulator output hits its undervoltage lockout threshold.
At this point, the +5V supply turns off.
The default frequency for both PWM controllers is
300kHz (with SYNC connected to REF), but 200kHz
may be used by connecting SYNC to GND or VL.
_______________________________________________________________________________________
9
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
+5V LDO
LINEAR
REGULATOR
V+
VL
P
5V
3.3V
REF
FB3
CS3
3.3V
PWM
CONTROLLER
(SEE FIG. 3)
BST3
DH3
LX3
4.5V
DL3
+3.3V
REFERENCE
SS3
ON
PGND
GND
4V
FAULT
ON3
2.8V
300kHz/200kHz
ON
OSCILLATOR
SYNC
FB5
CS5
5V
PWM
CONTROLLER
(SEE FIG. 3)
STANDBY
BST5
DH5
LX5
DL5
VPPA
DA0
DA1
LINEAR
REGULATOR
VPPB
DB0
DB1
SS5
ON
LINEAR
REGULATOR
ON5
13V
VDD REG
VDD
13V TO 19V
19V
D3
Q3
1.65V
D2
Q2
1.65V
D1
Q1
1.65V
VH
Figure 2. MAX782 Block Diagram
10
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
MAX782
CS_
1X
60kHz
LPF
FB_
MAIN PWM
COMPARATOR
REF, 3.3V
(OR INTERNAL
5V REFERENCE)
BST_
R
LEVEL
SHIFT
Q
S
DH_
LX_
SLOPE COMP
OSC
MINIMUM
CURRENT
(IDLE-MODE)
25mV
VL
4µA
CURRENT
LIMIT
SHOOTTHROUGH
CONTROL
0mV-100mV
30R
SS_
3.3V
ON_
N
1R
SYNCHRONOUS
RECTIFIER CONTROL
R
–100mV
N
S
VL
Q
LEVEL
SHIFT
DL_
PGND
N
VDD REG
(SEE FIG. 2)
1µs
SINGLE-SHOT
Figure 3. PWM Controller Block Diagram
______________________________________________________________________________________
11
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
+3.3V and +5V PWM Buck Controllers
The two current-mode PWM controllers are identical
except for different preset output voltages and the
addition of a flyback winding control loop to the +5V
side (see Figure 3, +3.3V/+5V PWM Controller Block
Diagram). Each PWM is independent except for being
synchronized to a master oscillator and sharing a common reference (REF) and logic supply (VL). Each PWM
can be turned on and off separately via ON3 and ON5.
The PWMs are a direct-summing type, lacking a traditional integrator-type error amplifier and the phase shift
associated with it. They therefore do not require any
external feedback compensation components if the filter capacitor ESR guidelines given in the Design
Procedure are followed.
The main gain block is an open-loop comparator that
sums four input signals: an output voltage error signal,
current-sense signal, slope-compensation ramp, and
precision voltage reference. This direct-summing
method approaches the ideal of cycle-by-cycle control
of the output voltage. Under heavy loads, the controller
operates in full PWM mode. Every pulse from the oscillator sets the output latch and turns on the high-side
switch for a period determined by the duty cycle
(approximately VOUT/VIN). As the high-side switch turns
off, the synchronous rectifier latch is set and, 60ns later,
the low-side switch turns on (and stays on until the
beginning of the next clock cycle, in continuous mode,
or until the inductor current crosses through zero, in
discontinuous mode). Under fault conditions where the
inductor current exceeds the 100mV current-limit
threshold, the high-side latch is reset and the high-side
switch is turned off.
At light loads, the inductor current fails to exceed the
25mV threshold set by the minimum current comparator. When this occurs, the PWM goes into idle-mode,
skipping most of the oscillator pulses in order to reduce
the switching frequency and cut back switching losses.
The oscillator is effectively gated off at light loads
because the minimum current comparator immediately
resets the high-side latch at the beginning of each
cycle, unless the FB_ signal falls below the reference
voltage level.
A flyback winding controller regulates the +15V VDD
supply in the absence of a load on the main +5V output. If VDD falls below the preset +13V VDD regulation
threshold, a 1µs one-shot is triggered that extends the
on-time of the low-side switch beyond the point where
the inductor current crosses zero (in discontinuous
mode). This causes inductor (primary) current to
reverse, pulling current out of the output filter capacitor
and causing the flyback transformer to operate in the
12
forward mode. The low impedance presented by the
transformer secondary in forward mode allows the
+15V filter capacitor to be quickly charged again,
bringing VDD into regulation.
Soft-Start/SS_ Inputs
Connecting capacitors to SS3 and SS5 allows gradual
build-up of the +3.3V and +5V supplies after ON3 and
ON5 are driven high. When ON3 or ON5 is low, the
appropriate SS capacitors are discharged to GND.
When ON3 or ON5 is driven high, a 4µA constant current source charges these capacitors up to 4V. The
resulting ramp voltage on the SS_ pins linearly increases the current-limit comparator setpoint so as to
increase the duty cycle to the external power MOSFETs
up to the maximum output. With no SS capacitors, the
circuit will reach maximum current limit within 10µs.
Soft-start greatly reduces initial in-rush current peaks
and allows start-up time to be programmed externally.
Synchronous Rectifiers
Synchronous rectification allows for high efficiency by
reducing the losses associated with the Schottky rectifiers. Also, the synchronous rectifier MOSFETS are
necessary for correct operation of the MAX782's boost
gate-drive and VDD supplies.
When the external power MOSFET N1 (or N2) turns off,
energy stored in the inductor causes its terminal voltage to reverse instantly. Current flows in the loop
formed by the inductor, Schottky diode, and load, an
action that charges up the filter capacitor. The Schottky
diode has a forward voltage of about 0.5V which,
although small, represents a significant power loss,
degrading efficiency. A synchronous rectifier, N3 (or
N4), parallels the diode and is turned on by DL3 (or
DL5) shortly after the diode conducts. Since the on
resistance (rDS(ON)) of the synchronous rectifier is very
low, the losses are reduced.
The synchronous rectifier MOSFET is turned off when
the inductor current falls to zero.
Cross conduction (or “shoot-through”) is said to occur
if the high-side switch turns on at the same time as the
synchronous rectifier. The MAX782’s internal breakbefore-make timing ensures that shoot-through does not
occur. The Schottky rectifier conducts during the time
that neither MOSFET is on, which improves efficiency
by preventing the synchronous-rectifier MOSFET’s
lossy body diode from conducting.
The synchronous rectifier works under all operating conditions, including discontinuous-conduction and idle-mode.
The +5V synchronous rectifier also controls the 15V VDD
voltage (see the High-Side Supply (VDD) section).
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
Modes of Operation
PWM Mode
Under heavy loads – over approximately 25% of full load
– the +3.3V and +5V supplies operate as continuous-current PWM supplies (see Typical Operating
Characteristics). The duty cycle (%ON) is approximately:
%ON = VOUT/VIN
Current flows continuously in the inductor: First, it
ramps up when the power MOSFET conducts; then, it
ramps down during the flyback portion of each cycle
as energy is put into the inductor and then discharged into the load. Note that the current flowing
into the inductor when it is being charged is also
flowing into the load, so the load is continuously
receiving current from the inductor. This minimizes
output ripple and maximizes inductor use, allowing
very small physical and electrical sizes. Output ripple is primarily a function of the filter capacitor (C7 or
C6) effective series resistance (ESR) and is typically
under 50mV (see the Design Procedure section).
Output ripple is worst at light load and maximum
input voltage.
Idle Mode
Under light loads (<25% of full load), efficiency is further enhanced by turning the drive voltage on and off
for only a single clock period, skipping most of the
clock pulses entirely. Asynchronous switching, seen as
“ghosting” on an oscilloscope, is thus a normal operating
MAX782
Boost Gate-Driver Supply
Gate-drive voltage for the high-side N-channel switch is
generated with a flying-capacitor boost circuit as shown
in Figure 4. The capacitor is alternately charged from
the VL supply via the diode and placed in parallel with
the high-side MOSFET’s gate-source terminals. On startup, the synchronous rectifier (low-side) MOSFET forces
LX_ to 0V and charges the BST_ capacitor to 5V. On the
second half-cycle, the PWM turns on the high-side
MOSFET by connecting the capacitor to the MOSFET
gate by closing an internal switch between BST_ and
DH_. This provides the necessary enhancement voltage
to turn on the high-side switch, an action that “boosts”
the 5V gate-drive signal above the battery voltage.
Ringing seen at the high-side MOSFET gates (DH3 and
DH5) in discontinuous-conduction mode (light loads) is
a natural operating condition caused by the residual
energy in the tank circuit formed by the inductor and
stray capacitance at the LX_ nodes. The gate driver
negative rail is referred to LX_, so any ringing there is
directly coupled to the gate-drive supply.
BATTERY
INPUT
VL
VL
BST_
DH_
LEVEL
TRANSLATOR
LX_
PWM
VL
DL_
Figure 4. Boost Supply for Gate Drivers
condition whenever the load current is less than
approximately 25% of full load.
At certain input voltage and load conditions, a transition
region exists where the controller can pass back and
forth from idle-mode to PWM mode. In this situation,
short bursts of pulses occur that make the current
waveform look erratic, but do not materially affect the
output ripple. Efficiency remains high.
Current Limiting
The voltage between CS3 (CS5) and FB3 (FB5) is continuously monitored. An external, low-value shunt resistor is
connected between these pins, in series with the inductor, allowing the inductor current to be continuously measured throughout the switching cycle. Whenever this
voltage exceeds 100mV, the drive voltage to the external
high-side MOSFET is cut off. This protects the MOSFET,
the load, and the battery in case of short circuits or temporary load surges. The current-limiting resistor R1 (R2)
is typically 25mΩ (20mΩ) for 3A load current.
Oscillator Frequency; SYNC Input
The SYNC input controls the oscillator frequency.
Connecting SYNC to GND or to VL selects 200kHz operation; connecting to REF selects 300kHz operation. SYNC
can also be driven with an external 240kHz to 350kHz
CMOS/TTL source to synchronize the internal oscillator.
Normally, 300kHz is used to minimize the inductor and
filter capacitor sizes, but 200kHz may be necessary for
low input voltages (see Low-Voltage (6-cell) Operation).
______________________________________________________________________________________
13
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
High-Side Supply (VDD)
The 15V VDD supply is obtained from the rectified and
filtered secondary of transformer L2. VDD is enabled
whenever the +5V supply is on (ON5 = high). The primary and secondary of L2 are connected so that, during the flyback portion of each cycle (when MOSFET
N2 is off and N4 is on), energy stored in the core is
transferred into the +5V load through the primary and
into VDD through the secondary, as determined by the
turns ratio. The secondary voltage is added to the +5V
to make VDD.
See the Typical Operating
Characteristics for the VDD supply’s load capability.
Unlike other coupled-inductor flyback converters, the
VDD voltage is regulated regardless of the loading on
the +5V output. (Most coupled-inductor converters can
only support the auxiliary output when the main output
is loaded.) When the +5V supply is lightly loaded, the
circuit achieves good control of VDD by pulsing the
MOSFET normally used as the synchronous rectifier.
This draws energy from the +5V supply’s output capacitor and uses the transformer in a forward-converter
mode (i.e., the +15V output takes energy out of the
secondary when current is flowing in the primary).
Note that these forward-converter pulses are interspersed with normal synchronous-rectifier pulses, and
they only occur at light loads on the +5V rail.
The transformer secondary’s rectified and filtered output is only roughly regulated, and may be between 13V
and 19V. It is brought back into VDD, which is also the
feedback input, and used as the source for the PCMCIA
VPP regulators (see Generating Additional VPP Outputs
Using External Linear Regulators). It can also be used
as the VH power supply for the comparators or any
external MOSFET drivers.
When the input voltage is above 20V, or when the +5V
supply is heavily loaded and VDD is lightly loaded, L2’s
interwinding capacitance and leakage inductance can
produce voltages above that calculated from the turns
ratio. A 3mA shunt regulator limits VDD to 19V.
Clock-frequency noise on the VDD rail of up to 3Vp-p is
a facet of normal operation, and can be reduced by
adding more output capacitance.
PCMCIA-Compatible
Programmable VPP Supplies
Two independent regulators are provided to furnish
PCMCIA VPP supplies. The VPPA and VPPB outputs
can be programmed to deliver 0V, 5V, 12V, or to be high
impedance. The 0V output mode has a 250Ω pull-down
to discharge external filter capacitors and ensure that
flash EPROMs cannot be accidentally programmed.
These linear regulators operate from the high-side sup14
Table 2. VPP Program Codes
DA0
DA1
VPPA
0
0
1
1
0
1
0
1
0V
5V
12V
Hi-Z
DB0
DB1
VPPB
0
0
1
1
0
1
0
1
0V
5V
12V
Hi-Z
ply (VDD), and each can furnish up to 60mA. Bypass
VPPA and VPPB to GND with at least 1µF, with the
bypass capacitors less than 20mm from the VPP pins.
The outputs are programmed with DA0, DA1, DB0 and
DB1, as shown in Table 2.
These codes are Intel 82365 (PCMCIA digital controller)
compatible. For other interfaces, one of the inputs can
be permanently wired high or low and the other toggled
to turn the supply on and off. The truth table shows that
either a “0” or “1” can be used to turn each supply on.
The high-impedance state is to accomodate external
programming voltages. The two VPP outputs can be
safely connected in parallel for increased load capability
if the control inputs are also tied together (i.e., DA0 to
DB0, DA1 to DB1). If VPAA and VPPB are connected in
parallel, some devices may exhibit several milliamps of
increased quiescent supply current when enabled, due
to slightly mismatched output voltage set points.
Comparators
Three noninverting comparators can be used as precision voltage comparators or high-side drivers. The
supply for these comparators (VH) is brought out and
may be connected to any voltage between +3V and
+19V. The noninverting inputs (D1-D3) are high impedance, and the inverting input is internally connected to
a 1.650V reference. Each output (Q1-Q3) sources
20µA from VH when its input is above 1.650V, and
sinks 500µA to GND when its input is below 1.650V.
The Q1-Q3 outputs can be fixed together in wired-OR
configuration since the pull-up current is only 20µA.
Connecting VH to a logic supply (5V or 3V) allows the
comparators to be used as low-battery detectors. For driving N-channel power MOSFETs to turn external loads on
and off, VH should be 6V to 12V higher than the load voltage. This enables the MOSFETs to be fully turned on and
results in low rDS(ON). VDD is a convenient source for VH.
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
Internal VL and REF Supplies
An internal linear regulator produces the 5V used by the
internal control circuits. This regulator’s output is available on pin VL and can source 5mA for external loads.
Bypass VL to GND with 4.7µF. To save power, when
the +5V switch-mode supply is above 4.5V, the internal
linear regulator is turned off and the high-efficiency +5V
switch-mode supply output is connected to VL.
The internal 3.3V bandgap reference (REF) is powered
by the internal 5V VL supply, and is always on. It can
furnish up to 5mA. Bypass REF to GND with 0.22µF,
plus 1µF/mA of load current.
Both the VL and REF outputs remain active, even when
the switching regulators are turned off, to supply memory keep-alive power.
These linear-regulator ouputs can be directly connected
to the corresponding step-down regulator outputs (i.e.,
REF to +3.3V, VL to +5V) to keep the main supplies alive
in standby mode. However, to ensure start-up, standby
load currents must not exceed 5mA on each supply.
Fault Protection
The +3.3V and +5V PWM supplies, the high-side supply, and the comparators are disabled when either of
two faults is present: VL < +4.0V or REF < +2.8V (85%
of its nominal value).
__________________Design Procedure
Figure 1’s schematic and Table 2’s component list
show values suitable for a 3A, +5V supply and a 3A,
+3.3V supply. This circuit operates with input voltages
from 6.5V to 30V, and maintains high efficiency with
output currents between 5mA and 3A (see the Typical
Operating Characteristics). This circuit’s components
may be changed if the design guidelines described in
this section are used – but before beginning the design,
the following information should be firmly established:
VIN(MAX), the maximum input (battery) voltage. This
value should include the worst-case conditions under
which the power supply is expected to function, such
as no-load (standby) operation when a battery charger
is connected but no battery is installed. VIN(MAX) cannot exceed 30V.
VIN(MIN), the minimum input (battery) voltage. This
value should be taken at the full-load operating current under the lowest battery conditions. If VIN(MIN)
is below about 6.5V, the power available from the
VDD supply will be reduced. In addition, the filter
capacitance required to maintain good AC load regulation increases, and the current limit for the +5V
supply has to be increased for the same load level.
+3.3V Inductor (L1)
Three inductor parameters are required: the inductance
value (L), the peak inductor current (ILPEAK), and the
coil resistance (RL). The inductance is:
VOUT x (VIN(MAX) - VOUT)
L = ————————————VIN(MAX) x f x IOUT x LIR
where:
VOUT = output voltage, 3.3V;
VIN(MAX) = maximum input voltage (V);
f = switching frequency, normally 300kHz;
IOUT = maximum +3.3V DC load current (A);
LIR = ratio of inductor peak-to-peak AC
current to average DC load current, typically 0.3.
A higher value of LIR allows smaller inductance, but
results in higher losses and higher ripple.
The highest peak inductor current (ILPEAK) equals the
DC load current (IOUT) plus half the peak-to-peak AC
inductor current (ILPP). The peak-to-peak AC inductor
current is typically chosen as 30% of the maximum DC
load current, so the peak inductor current is 1.15 times
IOUT.
The peak inductor current at full load is given by:
VOUT x (VIN(MAX) - VOUT)
ILPEAK = IOUT + —————————————.
2 x f x L x VIN(MAX)
The coil resistance should be as low as possible,
preferably in the low milliohms. The coil is effectively in
series with the load at all times, so the wire losses alone
are approximately:
Power loss = IOUT2 x RL
In general, select a standard inductor that meets the L,
ILPEAK, and RL requirements (see Tables 3 and 4). If a
standard inductor is unavailable, choose a core with an
LI2 parameter greater than L x I LPEAK2, and use the
largest wire that will fit the core.
______________________________________________________________________________________
15
MAX782
The comparators are always active when V+ is above
+4V, even when VH is 0V. Thus, Q1-Q3 will sink current
to GND even when VH is 0V, but they will only source
current from VH when VH is above approximately 1.5V.
If Q1, Q2, or Q3 is externally pulled above VH, an internal diode conducts, pulling VH a diode drop below the
output and powering anything connected to VH. This
voltage will also power the other comparator outputs.
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
+5V Transformer (T1)
Table 3 lists two commercially available transformers
and parts for a custom transformer. The following
instructions show how to determine the transformer
parameters required for a custom design:
LP, the primary inductance value
ILPEAK, the peak primary current
LI2, the core’s energy rating
RP and RS, the primary and secondary resistances
N, the primary-to-secondary turns ratio.
The transformer primary is specified just as the +3.3V
inductor, using VOUT = +5.0V; but the secondary output
(VDD) power must be added in as if it were part of the
primary. VDD current (IDD) usually includes the VPPA
and VPPB output currents. The total +5V power, PTOTAL,
is the sum of these powers:
PTOTAL = P5 + PDD
where:
P5 = VOUT x IOUT;
PDD = VDD x IDD;
and:
VOUT = output voltage, 5V;
IOUT = maximum +5V load current (A);
VDD = VDD output voltage, 15V;
IDD = maximum VDD load current (A);
so:
PTOTAL = (5V x IOUT) + (15V x IDD)
and the equivalent +5V output current, ITOTAL, is:
ITOTAL = PTOTAL / 5V
= [(5V x IOUT) + (15V x IDD)] / 5V.
The primary inductance, LP, is given by:
VOUT x (VIN(MAX) - VOUT)
LP = ———————————————
VIN(MAX) x f x ITOTAL x LIR
where:
VOUT = output voltage, 5V;
VIN(MAX) = maximum input voltage;
f = switching frequency, normally 300kHz;
ITOTAL = maximum equivalent load current (A);
LIR = ratio of primary peak-to-peak AC
current to average DC load current, typically 0.3.
The highest peak primary current (I LPEAK) equals the
total DC load current (ITOTAL) plus half the peak-to-peak
AC primary current (ILPP). The peak-to-peak AC primary
current is typically chosen as 30% of the maximum DC
load current, so the peak primary current is 1.15 times
ITOTAL. A higher value of LIR allows smaller inductance,
but results in higher losses and higher ripple.
The peak current in the primary at full load is given by:
VOUT x (VIN(MAX) - VOUT)
ILPEAK = ITOTAL + —————————————.
2 x f x LP x VIN(MAX)
Choose a core with an LI2 parameter greater than LP x
ILPEAK2.
16
The winding resistances, RP and RS, should be as low
as possible, preferably in the low milliohms. Use the
largest gauge wire that will fit on the core. The coil is
effectively in series with the load at all times, so the
resistive losses in the primary winding alone are
approximately (ITOTAL)2 x RP.
The minimum turns ratio, NMIN, is 5V:(15V-5V). Use 1:2.2
to accommodate the tolerance of the +5V supply. A
greater ratio will reduce efficiency of the VPP regulators.
Minimize the diode capacitance and the interwinding
capacitance, since they create losses through the
VDD shunt regulator. These are most significant when
the input voltage is high, the +5V load is heavy, and
there is no load on VDD.
Ensure the transformer secondary is connected with the
right polarity: A VDD supply will be generated with either
polarity, but proper operation is possible only with the correct polarity. Test for correct connection by measuring the
VDD voltage when VDD is unloaded and the input voltage
(VIN) is varied over its full range. Correct connection is
indicated if VDD is maintained between 13V and 20V.
Current-Sense Resistors (R1, R2)
The sense resistors must carry the peak current in the
inductor, which exceeds the full DC load current.
The internal current limiting starts when the voltage
across the sense resistors exceeds 100mV nominally,
80mV minimum. Use the minimum value to ensure
adequate output current capability: For the +3.3V
supply, R1 = 80mV / (1.15 x I OUT); for the +5V supply,
R2 = 80mV/(1.15 x ITOTAL), assuming that LIR = 0.3.
Since the sense resistance values (e.g. R1 = 25mΩ for
IOUT = 3A) are similar to a few centimeters of narrow
traces on a printed circuit board, trace resistance can
contribute significant errors. To prevent this, Kelvin
connect the CS_ and FB_ pins to the sense resistors;
i.e., use separate traces not carrying any of the inductor or load current, as shown in Figure 5.
Run these traces parallel at minimum spacing from one
another. The wiring layout for these traces is critical for
stable, low-ripple outputs (see the Layout and
Grounding section).
MOSFET Switches (N1-N4)
The four N-channel power MOSFETs are usually identical and must be “logic-level” FETs; that is, they must
be fully on (have low r DS(ON) ) with only 4V gatesource drive voltage. The MOSFET r DS(ON) should
ideally be about twice the value of the sense resistor.
MOSFETs with even lower r DS(ON) have higher gate
capacitance, which increases switching time and
transition losses.
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
FAT, HIGH-CURRENT TRACES
MAIN CURRENT PATH
KELVIN SENSE TRACES
SENSE RESISTOR
MAX782
Figure 5. Kelvin Connections for the Current-Sense Resistors
In idle-mode, the ripple has a capacitive and resistive
component:
4 x 10-4 x L
VOUT(RPL)(C) = ——————— x
RCS2 x CF
1
1
——— + ————— Volts
VOUT
VIN - VOUT
(
)
0.02 x ESRCF
VOUT(RPL)(R) = ——————- Volts
RCS
The total ripple, VOUT(RPL), can be approximated as follows:
if VOUT(RPL)(R) < 0.5 VOUT(RPL)(C),
then VOUT(RPL) = VOUT(RPL)(C),
otherwise, VOUT(RPL) = 0.5 VOUT(RPL)(C) +
VOUT(RPL)(R).
Diode D2
MOSFETs with low gate-threshold voltage specifications (i.e., maximum VGS(TH) = 2V rather than 3V) are
preferred, especially for high-current (5A) applications.
Output Filter Capacitors (C6, C7, C14)
The output filter capacitors determine the loop stability
and output ripple voltage. To ensure stability, the minimum capacitance and maximum ESR values are:
VREF
CF > —————————————
VOUT x RCS x 2 x π x GBWP
and,
VOUT x RCS
ESRCF < ——————
VREF
where:
CF = output filter capacitance, C6 or C7 (F);
VREF = reference voltage, 3.3V;
VOUT = output voltage, 3.3V or 5V;
RCS = sense resistor (Ω);
GBWP = gain-bandwidth product, 60kHz;
ESRCF = output filter capacitor ESR (Ω).
Be sure to select output capacitors that satisfy both the
minimum capacitance and maximum ESR requirements. To achieve the low ESR required, it may be
appropriate to use a capacitance value 2 or 3 times
larger than the calculated minimum.
The voltage rating of D2 should be at least 2 x VIN +
5V plus a safety margin. A rating of at least 75V is
necessary for the maximum 30V supply. A Schottky
diode is preferable for lower input voltages, and is
required for input voltages under 7V. Use a highspeed silicon diode (with a higher breakdown voltage
and lower capacitance) for high input voltages. D2’s
current rating should exceed twice the maximum current load on VDD.
Diodes D3 and D4
Use 1N5819s or similar Schottky diodes. D3 and D4
conduct only about 3% of the time, so the 1N5819’s
1A current rating is conservative. The voltage rating
of D3 and D4 must exceed the maximum input supply
voltage from the battery. These diodes must be
Schottky diodes to prevent the lossy MOSFET body
diodes from turning on, and they must be placed
physically close to their associated synchronous rectifier MOSFETs.
Soft-Start Capacitors (C8, C9)
A capacitor connected from GND to either SS pin causes that supply to ramp up slowly. The ramp time to full
current limit, tSS, is approximately 1ms for every nF of
capacitance on SS_, with a minimum value of 10µs.
Typical capacitor values are in the 10nF to 100nF
range; a 5V rating is sufficient.
______________________________________________________________________________________
17
MAX782
The output ripple in continuous-current mode is:
VOUT(RPL) = ILPP(MAX) x (ESRCF+1/(2 x π x f x CF)).
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
Because this ramp is applied to the current-limit circuit,
the actual time for the output voltage to ramp up
depends on the load current and output capacitor
value. Using Figure 1’s circuit with a 2A load and no
SS capacitor, full output voltage is reached about
600µs after ON_ is driven high.
Boost Capacitors (C4, C5)
Capacitors C4 and C5 store the boost voltage and provide the supply for the DH3 and DH5 drivers. Use 0.1µF
and place each within 10mm of the BST_ and LX_ pins.
Boost Diodes (D1A, D1B)
Bypass Capacitors
Input Filter Capacitors (C1, C13)
Use at least 3µF/W of output power for the input filter
capacitors, C1 and C13. They should have less than
150mΩ ESR, and should be located no further than
10mm from N1 and N2 to prevent ringing. Connect
the negative terminals directly to PGND. Do not
exceed the surge current ratings of input bypass
capacitors.
VPP and VDD Bypass Capacitors (C10, C11, C12)
Use 2.2µF for VDD, and 1µF for VPPA and VPPB.
Use high-speed signal diodes; e.g., 1N4148 or equivalent.
Table 3. Surface-Mount Components
(See Figure 1 for schematic diagram and Table 4 for phone numbers.)
COMPONENT
MANUFACTURER
PART NO.
33µF, 35V tantalum capacitors
Sprague
595D336X0035R2B
C2
4.7µF, 16V tantalum capacitor
Sprague
595D475X0016A2B
C3
1µF, 20V tantalum capacitor
Sprague
595D475X0016A2B
C4, C5
0.1µF, 16V ceramic capacitors
Murata-Erie
GRM42-6X7R104K50V
C6
330µF, 10V tantalum capacitor
Sprague
595D337X0010R2B
C7, C14
150µF, 10V tantalum capacitors
Sprague
595D157X0010D2B
C8, C9
0.01µF, 16V ceramic capacitors
Murata-Erie
GRM42-6X7R103K50V
C10, C11
1µF, 35V tantalum capacitors
Sprague
595DD105X0035A2B
C12
2.2µF, 25V tantalum capacitor
Sprague
595DD225X0025B2B
1N4148SMTN diodes (fast recovery)
Philips
BAW56
Fast-recovery high voltage diode
Nihon
EC11FS1
D3, D4
1N5819 SMT diodes
Nihon
EC10QS04
L1
10µH, 2.65A inductor
Sumida
CDR125-100
N-channel MOSFETs (SO-8)
Siliconix
Si9410DY
R1
0.025Ω, 1% (SMT) resistor
IRC
LR2010-01-R025-F
R2
0.020Ω, 1% (SMT) resistor
IRC
LR2010-01-R020-F
Transformer (these two have different
sizes and pinouts)
Coiltronics
Transpower Technologies
CTX03-12067-1
TTI5870
Transformer (for 5.5V, 200kHz operation)
Coiltronics
CTX03-12062-1
TDK
TDK
TDK
PC40EEM12.7/13.7-A160
BEM12.7/13.7-118G
FEM12.7/13.7-A
8 turns #24 AWG
18 turns #26 AWG
D1A, D1B
D2
N1-N4
L2
18
SPECIFICATION
C1, C13
Custom Transformer:
Core Set
Bobbin
Clamp
Primary
Secondary
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
Company
Factory FAX
[country code]
USA Phone
Central Semi
Coiltronics
IRC
Murata-Erie
Nihon
Siliconix
Sprague
Sumida
TDK
Transpower Tech.
[ 1] (516) 435-1824
[ 1] (407) 241-9339
[ 1] (213) 772-9028
[ 1] 404 736-3030
[81] 3-3494-7414
[ 1] (408) 727-5414
[ 1] (603) 224-1430
[81] 3-3607-5144
[81] 3-3278-5358
[ 1] 702 831-3521
(516) 435-1110
(407) 241-7876
(512) 992-7900
(404) 736-1300
(805) 867-2555
(408) 988-8000
(603) 224-1961
(708) 956-0666
(708) 803-6100
(702) 831-0140
__________Applications Information
Efficiency Considerations
Achieving outstanding efficiency over a wide range of
loads is a result of balanced design rather than bruteforce overkill, particularly with regard to selecting the
power MOSFETs. Generally, the best approach is to
design for two loading conditions, light load and heavy
load (corresponding to suspend and run modes in the
host computer), at some nominal battery voltage (such
as 1.2V/cell for NiCd or NiMH). Efficiency improves as
the input voltage is reduced, as long as the high-side
switch saturation voltage is low relative to the input voltage. If there is a choice, use the lowest-voltage battery
pack possible, but with at least six cells.
Heavy-Load Efficiency
Losses due to parasitic resistances in the switches,
coil, and sense resistor dominate at high load-current
levels. Under heavy loads, the MAX782 operates in the
continuous-conduction mode, where there is a large
DC offset to the inductor current plus a small sawtooth
AC component (see the +3.3V Inductor section). This
DC current is exactly equal to the load current – a fact
that makes it easy to estimate resistive losses through
the assumption that total inductor current is equal to
this DC offset current.
The major loss mechanisms under heavy loads are, in
usual order of importance:
● I2R losses
● gate-charge losses
● diode-conduction losses
● transition losses
● capacitor-ESR losses
● losses due to the operating supply current of the IC.
Inductor core losses are fairly low at heavy loads
because the inductor current’s AC component is small.
Therefore, they are not accounted for in this analysis.
Efficiency = P OUT /P IN x 100% = P OUT /(P OUT +
PDTOTAL) x 100%
PDTOTAL = PD(I2R) + PDGATE + PDDIODE + PDTRAN +
PDCAP + PDIC
PD(I2R) = resistive loss = (ILOAD2) x (RCOIL + rDS(ON) +
RCS)
where RCOIL is the DC resistance of the coil, rDS(ON) is
the drain-source on resistance of the MOSFET, and
RCS is the current-sense resistor value. Note that the
r DS(ON) term assumes that identical MOSFETs are
employed for both the synchronous rectifier and highside switch, because they time-share the inductor current. If the MOSFETs are not identical, losses can be
estimated by averaging the two individual r DS(ON)
terms according to duty factor.
PDGATE = gate driver loss = qG x f x VL
where VL is the MAX782’s logic supply voltage (nominally 5V) and qG is sum of the gate charge for lowside and high-side switches. Note that gate charge
losses are dissipated in the IC, not the MOSFETs,
and therefore contribute to package temperature rise.
For matched MOSFETs, qG is simply twice the gate
charge of a single MOSFET (a data sheet specification). If the +5V buck SMPS is turned off, replace VL
in this equation with VIN.
PDIODE = diode conduction losses = ILOAD x VD x tD x f
where t D is the diode’s conduction time (typically
110ns), VD is the forward voltage of the Schottky diode,
and f is the switching frequency.
VIN2 x CRSS x ILOAD x f
PDTRAN = transition loss = ———————————
IDRIVE
______________________________________________________________________________________
19
MAX782
Table 4. Surface-Mount Components
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
where CRSS is the reverse transfer capacitance of the
high-side MOSFET (a data sheet parameter), f is the
switching frequency, and IDRIVE is the peak current
available from the MAX782’s large high-side gate drive r ou t put s ( DH5 or DH3, appr ox im a t e l y 1 A ) .
Additional switching losses are introduced by other
sources of stray capacitance at the switching node,
including the catch diode capacitance, coil interwinding capacitance, and low-side switch-drain capacitance. They are given as PD SW = VIN2 x CSTRAY x f,
but are usually negligible compared to CRSS losses.
The low-side switch introduces only tiny switching
losses, since its drain-source voltage is already low
when it turns on.
PDCAP = capacitor ESR loss = IRMS2 x ESR
and,
IRMS = RMS AC input current
√ VOUT(VIN - VOUT)
= ILOAD x ————————
VIN
where ESR is the equivalent series resistance of the
input bypass capacitor. Note that losses in the output
filter capacitors are small when the circuit is heavily
loaded, because the current into the capacitor is not
chopped. The output capacitor sees only the small AC
sawtooth ripple current. Ensure that the input bypass
capacitor has a ripple current rating that exceeds the
value of IRMS.
PDIC is the IC’s quiescent power dissipation and is a data
sheet parameter (6mW typically for the entire IC at VIN =
15V). This power dissipation is almost completely independent of supply voltage whenever the +5V step-down
switch-mode power supply is on, since power to the chip
is bootstrapped from the +5V output. When calculating
the efficiency of each individual buck controller, use 3mW
for PDIC, since each controller consumes approximately
half of the total quiescent supply current.
Example: +5V buck SMPS at 300kHz, VIN = 15V, ILOAD
= 2A, RCS = RCOIL = ESR = 25mΩ, both transistors are
Si9410DY with rDS(ON) = 0.05Ω, CRSS = 160pF, and qG
= 30nC.
PDTOTAL = 400mW (I2R) + 90mW (GATE) + 36mW
(DIODE) + 22mW (TRAN) + 22mW (CAP) + 3mW (IC)
= 573mW
Efficiency = 10W/(10W + 573mW) x 100% = 94.6%
(actual measured value = 94%).
Light-Load Efficiency
Under light loads, the PWMs operate in the discontinuous-conduction mode, where the inductor current discharges to zero at some point during each switching
20
cycle. New loss mechanisms, insignificant at heavy
loads, start to become important. The basic difference
is that, in discontinuous mode, the inductor current’s
AC component is large compared to the load current.
This increases core losses and losses in the output filter capacitors. Ferrite cores are recommended over
powdered toroid types for best light-load efficiency.
At light loads, the inductor delivers triangular current
pulses rather than the nearly constant current found in
continuous mode. These pulses ramp up to a point set
by the idle-mode current comparator, which is internally
fixed at approximately 25% of the full-scale current-limit
level. This 25% threshold provides an optimum balance between low-current efficiency and output voltage
noise (the efficiency curve would actually look better if
this threshold were set at about 45%, but the output
noise would then be too high).
Reducing I2R losses though the brute-force method of
specifying huge, low-rDS(ON) MOSFETs can result in
atrocious efficiency, especially at mid-range and lightload conditions. Even at heavy loads, the gate charge
losses introduced by huge 50A MOSFETs usually more
than offset any gain obtained through lower rDS(ON).
Layout and Grounding
Good layout is necessary to achieve the designed output power, high efficiency, and low noise. Good layout
includes use of a ground plane, appropriate component placement, and correct routing of traces using
appropriate trace widths. The following points are in
order of importance:
1. A ground plane is essential for optimum performance.
In most applications, the power supply is located on a
multilayer motherboard, and full use of the four or
more copper layers is recommended. Use the top
and bottom layers for interconnections, and the inner
layers for an uninterrupted ground plane.
2. Keep the Kelvin-connected current-sense traces
short, close together, and away from switching
nodes. See Figure 5.
3. Place the LX node components N1, N3, D3, and L1
as close together as possible. This reduces resistive
and switching losses and keeps noise due to
ground inductance confined. Do the same with the
other LX node components N2, N4, D4, and L2.
4. The input filter capacitor C1 should be less than
10mm away from N1’s drain. The connecting copper trace carries large currents and must be at least
2mm wide, preferably 5mm.
Similarly, place C13 close to N2’s drain, and connect them with a wide trace.
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
MAX782
5. Keep the gate connections to the MOSFETs short for
low inductance (less than 20mm long and more than
0.5mm wide) to ensure clean switching.
6. To achieve good shielding, it is best to keep all
high-voltage switching signals (MOSFET gate drives DH3 and DH5, BST3 and BST5, and the two LX
nodes) on one side of the board and all sensitive
nodes (CS3, CS5, FB3, FB5 and REF) on the other
side.
7. Connect the GND and PGND pins directly to the
ground plane, which should ideally be an inner layer
of a multilayer board.
8. Connect the bypass capacitor C2 very close (less
than 10mm) to the VL pin.
9. Minimize the capacitance at the transformer secondary. Place D5 and C12 very close to each other
and to the secondary, then route the output to the IC’s
VDD pin with a short trace. Bypass with 0.1µF close
to the VDD pin if this trace is longer than 50mm.
The layout for the evaluation board is shown in the
Evaluation Kit section. It provides an effective, lownoise, high-efficiency example.
+5V
SUPPLY
FB5
1M
R1
MAX782
D_
Q_ +5V
POWER-READY
604k
1.65V
R2
GND
Figure 6. Power-Ready Signal for the +5V Supply
Power-Ready and Power Sequencing
A “power-ready” signal can be generated from one of
the comparator outputs by connecting one of the supplies (e.g., the +5V output – see Figure 6) through a
high-resistance voltage divider to the comparator input.
The threshold for the +5V-output comparator is set by
R1 and R2 according to the formula: VTH = 1.65V x (R1
+ R2) / R2. For example, choosing R1 = 1MΩ and R2 =
604kΩ sets the nominal threshold to 4.38V.
If the power-ready signal is required to indicate when
both the +3.3V and the +5V supplies have come up,
use the MAX707 supervisory circuit shown in Figure 7.
The threshold for the +3.3V-line comparator is set by
R1 and R2 according to the formula: VTH = 1.25V x (R1
+ R2) / R2. For example, choosing R1 = 1.2MΩ and R2
= 1MΩ sets the nominal threshold to 2.75V. The threshold for the +5V supply is preset inside the MAX707,
and is typically 4.65V. The reset outputs remain asserted while either supply line is below its threshold, and
for at least 140ms after both lines are fully up.
If sequencing of the +3.3V and +5V supplies is critical,
several approaches are possible. For example, the
SS3 and SS5 capacitors can be sized to ensure that
the two supplies come up in the desired order. This
technique requires that the SS capacitors be selected
specifically for each individual situation, because the
loading on each supply affects its power-up speed.
+5V
SUPPLY
+3.3V
SUPPLY
VCC
RESET
R1
1.24M
4.65V
RESET
POWER READY
RESET
POWER READY
MR
PFI
PFO
R2
1M
1.25V
MAX707
GND
Figure 7. Power-Ready Signal Covers Both +3.3V and +5V
Supplies with External Voltage Monitor IC (MAX707)
Another approach uses the “power-ready” comparator
output signal (see Figure 6) from one supply as a control input to the ON_ pin of the other supply.
______________________________________________________________________________________
21
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
+5V SUPPLY
VDD
C4
100nF
+3.3V SUPPLY
+5V SUPPLY
VH
FB5
VCC
d
PCMCIA 2.0
DIGITAL
CONTROLLER
R4
1M
MAX782 Q1
N1
g
s
P
SET1
HYST1
C2
100
nF
ICL7665
R5
820k
R6
1M
R3
1M
1.3V
POWER READY
C3
100nF
D1
FB3
VCC_EN1
D2
Q2
s
OUT2
SLOT
VCC
ON3
MECHANICAL
SWITCH
N
NOTE: MOSFET BODY DIODES SHOWN FOR CLARITY.
SET2
C1
22nF
Figure 9. Simple Switching for PCMCIA Slot VCC
GND
Figure 8 shows a more complex example of power
sequencing. On power-up, the Intel 486SL computer
requires the +5V supply to come up before the +3.3V
supply. A power-ready signal is required ≥50ms later.
This circuit’s ON3 output connects to the MAX782’s
ON3 pin, and can be wire-OR connected with an opendrain output to enable another circuit to turn the +3.3V
supply off.
PCMCIA Slot +3.3V/+5V VCC Switching
The MAX782 contains level shifters that simplify driving
external power MOSFETs to switch PCMCIA card VCC
to 3.3V and 5V. While a PCMCIA card is being inserted
into the socket, the VCC pins on the card edge should
be powered down to 0V so “hot insertion” does not
damage the PCMCIA card. The simplest way to do this
is to use a mechanical switch that has to be physically
opened before the PCMCIA card can be inserted. The
switch, which disconnects VCC, can be closed only
when the card has been fitted snugly into its socket.
Figure 9’s circuit illustrates this approach and correctly
shows the connections to both MOSFETs: N2 appears
to be inserted with drain and source the wrong way
around, but this is necessary to prevent its body diode
from pulling the +3.3V supply up to 5V when VCC is
connected to the +5V supply.
+5V
FB5
Figure 8. Power-Up Sequencing for the Intel 486SL
22
N2
g
d
R1
1M
R2
390k
+3.3V SUPPLY
VCC_EN0
PCMCIA 2.0
DIGITAL
CONTROLLER
MAX782 Q1
VCC_EN0
D1
FB3
VCC_EN1
D2
Q2
N3
SLOT
VCC
+3.3V
N1
100µF
VDD
VH
N2
NOTE: MOSFET BODY DIODES SHOWN FOR CLARITY.
Figure 10. Using the Level Shifters to Switch PCMCIA Slot VCC
Figure 10’s circuit provides an alternative method of
connecting the VCC supply to the PCMCIA slot. While
it avoids using a mechanical switch, it does not provide
the security of a physical interlock. Placing the two
MOSFETs N1 and N2 with their body diodes facing in
opposite directions allows VCC to be shut down to 0V
without using a mechanical switch, and allows VCC to
be driven to 5V without the +3.3V supply being pulled
up to 5V.
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
MAX782
(Circuit of Figure 1, f = 200kHz, VIN Range = 5.5V to 12V)
VDD
Coiltronics CTX03-12062
(low-leakage inductance,
10µH primary)
Transformer L2:
Filter Capacitor C6:
660µF
Sense Resistor:
25mΩ
1N5819 or equivalent
Schottky diode
Flyback Rectifier D2:
The MAX782 has three comparators/level-shifters that
can be used for this purpose, and two that are needed for
each PCMCIA port. Two transistors can be used as
shown in Figure 11 to provide two additional TTL-input
MOSFET gate drivers for a second PCMCIA slot. The
component values have been carefully chosen to provide
smooth switching from 5V to 3.3V without make-beforebreak glitches, and without a break in the VCC supply.
MAX782
Table 5. Components for Low-Voltage
Operation
1M
PCMCIA 2.0
DIGITAL
CONTROLLER
FB5
FB3
+5V
+3.3V
1M
2N3904
VCC_EN0
SLOT
VCC
510k
100µF
1M
VCC_EN1
2N3904
NOTE: MOSFET BODY DIODES SHOWN FOR CLARITY.
Low-Voltage (6-Cell) Operation
Low input voltages, such as the 6V end-of-life voltage of
a 6-cell NiCd battery, place extra demands on the +5V
buck regulator because of the very low input-output differential voltage. The standard application circuit works
well with supply voltages down to 6.5V; at input voltages
less than 6.5V, some component changes are needed
(see Table 5), and the operating frequency must be set
to 200kHz. The two main issues are load-transient
response and load capability of the +15V VDD supply.
The +5V supply’s load-transient response is impaired due
to reduced inductor-current slew rate, which is in turn
caused by reduced voltage applied across the buck inductor during the high-side switch-on time. So, the +5V output
sags when hit with an abrupt load current change, unless
the +5V filter capacitor value is increased. Note that only the
capacitance is affected and ESR requirements don’t
change. Therefore, the added capacitance can be supplied by an additional low-cost bulk capacitor in parallel with
the normal low-ESR switching-regulator capacitor. The
equation for voltage sag under a step-load change follows:
ISTEP2 x L
VSAG = —————————————————
2 x CF x (VIN(MIN) x DMAX - VOUT)
where DMAX is the maximum duty cycle. Higher duty
cycles are possible when the oscillator frequency is
reduced to 200kHz, due to fixed propagation delays
through the PWM comparator becoming a lesser part of
the whole period. The tested worst-case limit for DMAX
is 92% at 200kHz. Lower inductance values can reduce
Figure 11. Using Discrete Circuitry to Switch PCMCIA 2.0 Slot VCC
the filter capacitance requirement, but only at the
expense of increased noise at high input voltages (due
to higher peak currents).
The components shown in Table 5 allow the main +5V
supply to deliver 2A from VIN = 5.5V, or alternatively
allow the +15V supply to deliver 70mA while simultaneously providing +5V at 2A from V IN = 5.7V. Note:
Components for +3.3V don’t need to be changed.
The +15V supply’s load capability is also affected by
low input voltages, especially under heavy loads. When
the +5V supply is heavily loaded, there simply isn’t
enough extra duty cycle left for the flyback winding
controller to deliver energy to the secondary. VDD loadcurrent limitations are thus determined by the worstcase duty-cycle limits, and also by any parasitic resistance or inductance on the transformer secondary.
These parasitics, most notably the transformer leakage
inductance and the forward impedance of the +15V
rectifier diode, limit the rate-of-rise of current in the secondary during the brief interval when primary current
reverses and the transformer conducts in the forward
mode. See the Typical Operating Characteristics. For
low-voltage applications that require heavy +15V load
currents (for example, 6-cell circuits where +12V VPP
must deliver 120mA or more), see the MAX783 data
sheet. This device is similar to the MAX782 except the
+15V flyback winding controller has been shifted from
the +5V side to the +3.3V side.
______________________________________________________________________________________
23
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
Total Shutdown Circuits
When the +5V and +3.3V supplies are off, the complete
MAX782 circuit consumes only about 70µA, plus any
leakage through the off MOSFETs. Some NiCd batteries can be damaged if they are fully discharged and
then left for long periods (months) under load. Even
100µA can do damage if left long enough.
The complete power-supply system can be shut down
by taking ON5 low, cutting the supply to the MAX782’s
V+ pin, while the bootstrapped +5V supply is turned
off. This removes the supply from the controller, and
turns off all the supplies. In this condition, the current
consumption drops to the level of the leakage currents
in the off transistors. Switching the V+ supply off is
easy because the V+ line draws very little power;
switching the entire power input from the battery would
be more difficult.
Figure 12 shows a logic interface for a momentary
switch that toggles the whole system on and off. The
logic circuit runs from the battery supply, so the input
voltage from the battery is limited to the normal operating range for the flip-flop gates, which is usually 18V for
4000-series CMOS circuits. The active-high OFF input
permits the supplies to be turned off under logic control
as well as when the switch is pushed. If this logic input
is not required, omit R1 and Q1. The supplies can only
be turned on using the hardware switch. For automatic
turn-off, connect the OFF input to a battery-voltage
sensing comparator or to a timer powered from VL.
Ensure that any signal connected to OFF does not
glitch high at power-up.
(+5.5V TO +18V)
VBATT
CD4011B
ON/
OFF
S
ON
1N4148
1M
1M
1µF
ZETEX
ZVP2106G
SOT 223
1M
1N4148
ON
R
V+
1N4148
1M
1µF
1M
Q1
2N4401
OFF
R1
1M
VL
MAX782
ON5
PGND
1N4148
ON5
Figure 12. Hardware/Software Total Shutdown Circuit
Q1
2N4403
VDD
OUT
FROM MAX782
C1
100nF
R4
1k
C3
10nF
R1
16.9k
Generating Additional VPP Outputs
Using External Linear Regulators
Figure 13 shows a low-dropout linear regulator
designed to provide an additional VPP output from the
VDD line. It can be turned off with a logic-level signal;
its output can be switched to 5V or 12V; and it provides excellent rejection of the high-frequency noise
on VDD. If a monolithic linear regulator is used,
choose one having good PSRR performance at
300kHz.
3
6
2
4
R5
100k
OFF/ON
R2
6.34k
7
U1
OP27
FROM MAX782
REF
C2
6.8µF
R3
26.7k
C4
10nF
Q2
2N7002
Q3
2N7002
12/5
OFF/ON
12/5
VOUT (V)
1
0
0
X
0
1
0
5
12
X = DON'T CARE
Figure 13. External Regulator For Additional VPP Outputs
24
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
___________Ev Kit Quick Reference
To set up the EV kit, use the following procedure:
1. Connect a power supply to the BATT IN terminals.
The supply voltage should be between 6.5V and 30V.
Input current may be several amps, depending on the
input voltage and the output power demanded.
2. Turn on the +5V output by setting the ON5 dip
switch to ON. The 5V OUT edge pad now supplies
+5V at up to 3A, and +15V is now available at the
+15V OUT edge pad.
3. Turn on the +3.3V output by setting the ON3 dip
switch to ON. The 3.3V OUT edge pad now supplies +3.3V at up to 3A. The two regulators may be
operated independently.
4. To use the VPPA/VPPB programmable voltage outputs, ON5 must be enabled. Set the four-circuit dip
switch to the desired code and measure the output at
the VPPA and VPPB edge pads. DA0 and DA1 control VPPA’s state; DB0 and DB1 control VPPB’s state.
When active, outputs Q1-Q3 pull up to VH. Resistor
R16, located on the back of the board, pulls the highside driver voltage VH up to +15V. By removing R16
and installing a resistor at the empty R15 site, VH may
be tied to the +3.3V output. Alternately, both R15 and
R16 may be omitted and the user may supply an arbitrary voltage between 3V and 20V at the VH edge pad.
Note that Q1-Q3 are not meant to drive high-current
loads directly.
The D1-D3 comparators can be used as precision voltage detectors by installing resistor dividers at each
input (R11/R12, R10/R13, R9/R14).
Power-Supply Controls
ON3 – Enable 3.3V power supply
ON5 – Enable 5.0V power supply
SYNC – Switch-mode power-supply frequency input
(optional)
VPP Voltage Outputs
The PCMCIA-compatible programmable voltage outputs are controlled by the DA0, DA1, DB0, and DB1
logic-level inputs. The MAX782 provides industrystandard Intel 82365-comptaible VPPA/VPPB PCMCIA
controls (see Pin Description ). The four-circuit dip
switch connects the same way as the edge pads.
From left to right, switch 1 controls DA1, switch 2 controls DA0, switch 3 controls DB1, and switch 4 controls
DB0. VPPA and VPPB are capable of supplying 60mA
each.
_______Ev Kit Detailed Description
Battery Input
BATT IN – Battery input, 6.5V to 30V
GND – Ground
The battery input voltage should be between 6.5V and
30V. The input voltage upper limit is set by the voltage
rating of the input bypass capacitors, C1 and C13, and
may not exceed the MAX782’s 30V maximum rating.
Higher input voltages generally require physically larger input capacitors.
Low-Battery Detection Comparators
To demonstrate the level shifters / high-side drivers,
ON5 must be enabled so the +15V (VDD) is available
to pull up the Q1-Q3 outputs. Measure the high-side
driver supply at the VH edge pad. Logic-level edge
pads D1-D3 control the outputs Q1-Q3. Q1-Q3 pull up
to VH whenever the corresponding input D1-D3 is at a
logic-high level.
______________________________________________________________________________________
25
MAX782
________Evaluation Kit Information
The MAX782 evaluation kit (EV kit) is an assembled,
surface-mount demonstration board. The kit embodies
the standard application circuit and uses dip switches
to control the 3V, 5V, and VPP outputs. The board
accepts battery input voltages between 6.5V and 30V,
and provides up to 30W of output power. All functions
are controlled by standard CMOS/TTL logic levels.
26
Figure 14. MAX782 EV Kit Schematic
______________________________________________________________________________________
D3B
D2B
D18
ON5
ON3
3.3V
OUT
DB0
DA0
DB1
DA1
C7
150µF
10V
C16
150µF
10V
R14 OPEN
R13 OPEN
R12 OPEN
29
MAX782
V+
VL
VH
6
7
8
14
R17
100k
13
27
21
25
23
22
24
10
11
9
28
5
C8
0.01µF
Q3
Q2
Q1
SYNC
REF
FB5
CS5
DL5
LX5
DH5
BST5
VDD
VPPB
VPPA
SS3 GND PGND SS5
36
12
26
20
D3
D2
D1
ON5
ON3
FB3
CS3
DL3
LX3
DH3
BST3
DB0
DB1
DA0
DA1
C9
0.01µF
4
3
2
19
X1B
34
35
30
1
R7 R9 R10 R11
1M 1M 1M 1M
N3
32
33
X1A
R8
1M
D3
1N5819
X2D
0.1µF
18
X2C
R1
0.025Ω
17
X2B
D1
31
16
C5
15
N1
R4 R5 R6
1M 1M 1M
X2A
L1
10µH
R3
1M
D1
C2
4.7µF
C3
1µF
20V
C4
0.1µF
16V
R15
OPEN
N4
N2
L2
C10
1µF
35V
C1
33µF
35V
R2
0.02Ω
C6
2.2µF
25V
C11
1µF
35V
C13
33µF
35V
N1–N4 = Si9410DY
D1 = BAW56L OR TWO 1N4148s
D4
1N5819
D2
EC11FS1
R16
560Ω
BATT IN
Q3
Q2
Q1
SYNC
5V
OUT
C6
330µF
10V
+15V
OUT
VPPB
VPPA
VH
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
Triple-Output Power-Supply
Controller for Notebook Computers
MAX782
Figure 15. MAX782 EV Kit Top Component Layout and Silk Screen, Top View
______________________________________________________________________________________
27
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
Figure 16. MAX782 EV Kit Ground Plane (Layers 2 and 3), Top View
28
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
MAX782
Figure 17. MAX782 EV Kit Top Layer (Layer 1), Top View
______________________________________________________________________________________
29
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
Figure 18. MAX782 EV Kit, Bottom Component Layout and Silk Screen, Bottom View
30
______________________________________________________________________________________
Triple-Output Power-Supply
Controller for Notebook Computers
MAX782
Figure 19. MAX782 EV Kit Bottom Layer (Layer 4), Top View
______________________________________________________________________________________
31
MAX782
Triple-Output Power-Supply
Controller for Notebook Computers
___________________Chip Topography
D2
D3
ON3
D1
CS3
FB3
SS3
_Ordering Information (continued)
PART
DH3
TEMP. RANGE
MAX782C/D
VH
LX3
Q3
Q2
BST3
MAX782EBX
MAX782REBX
MAX782SEBX
Q1
PIN-PACKAGE
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
Dice*
VOUT
—
36 SSOP
36 SSOP
36 SSOP
3.3V
3.45V
3.6V
VPPA
DL3
V+
VDD
0.181"
(4.597mm)
FB5
PGND
VL
VPPB
EV KIT
TEMP. RANGE
MAX782EVKIT-SO
0°C to +70°C
BOARD TYPE
Surface Mount
* Contact factory for dice specifications.
DL5
GND
BST5
REF
SYNC
LX5
DA1
ON5
CS5
DB1
SS5
DA0
DB0
0.132"
(3.353mm)
DH5
TRANSISTOR COUNT: 1569
SUBSTRATE CONNECTED TO GND
________________________________________________________Package Information
DIM
E
A
A1
B
C
D
E
e
H
L
α
H
INCHES
MAX
MIN
0.104
0.094
0.011
0.004
0.017
0.011
0.012
0.009
0.610
0.604
0.298
0.292
0.032 BSC
0.416
0.398
0.035
0.020
8˚
0˚
MILLIMETERS
MIN
MAX
2.39
2.64
0.10
0.28
0.30
0.44
0.23
0.32
15.34
15.49
7.42
7.57
0.80 BSC
10.10
10.57
0.51
0.89
0˚
8˚
21-0032A
D
α
A
0.127mm
0.004in.
e
B
A1
C
L
36-PIN PLASTIC
SHRINK
SMALL-OUTLINE
PACKAGE
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
32 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
© 1994 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.