Compact 600 mA, 3 MHz, Step-Down Converter with Output Discharge ADP2109 Data Sheet FEATURES GENERAL DESCRIPTION Peak efficiency: 95% Discharge switch function Fixed frequency operation: 3 MHz Typical quiescent current: 18 μA Maximum load current: 600 mA Input voltage: 2.3 V to 5.5 V Uses tiny multilayer inductors and capacitors Current mode architecture for fast load and line transient response 100% duty-cycle low dropout mode Internal synchronous rectifier Internal compensation Internal soft start Current overload protection Thermal shutdown protection Shutdown supply current: 0.2 μA 5-ball WLCSP Supported by ADIsimPower™ design tool The ADP2109 is a high efficiency, low quiescent current stepdown dc-to-dc converter with an internal discharge switch that allows automatic discharge of the output capacitor in an ultrasmall 5-ball WLCSP package. The total solution requires only three tiny external components. It uses a proprietary high speed current mode and constant frequency pulse-width modulation (PWM) control scheme for excellent stability, and transient response. To ensure the longest battery life in portable applications, the ADP2109 has a power save mode that reduces the switching frequency under light load conditions. The ADP2109 runs on input voltages of 2.3 V to 5.5 V, which allow for single lithium or lithium polymer cell, multiple alkaline or NiMH cells, PCMCIA, USB, and other standard power sources. The maximum load current of 600 mA is achievable across the input voltage range. The ADP2109 is available in fixed output voltages of 1.8 V, 1.5 V, 1.2 V, and 1.0 V. All versions include an internal power switch and synchronous rectifier for minimal external part count and high efficiency. The ADP2109 has an internal soft start and internal compensation. During logic-controlled shutdown, the input is disconnected from the output and the ADP2109 draws less than 1 μA from the input source. APPLICATIONS PDAs and palmtop computers Wireless handsets Digital audio, portable media players Digital cameras, GPS navigation units Other key features include undervoltage lockout to prevent deep battery discharge and soft start to prevent input current overshoot at startup. The ADP2109 is available in a 5-ball WLCSP. A similar converter, the ADP2108, provides the same features and operations as the ADP2109 without the discharge switch and is available in both WLCSP and TSOT packages with additional output voltages. TYPICAL APPLICATIONS CIRCUIT 1µH 2.3V TO 5.5V VIN 1.0V TO 1.8V SW 10µF 4.7µF ADP2109 ON EN FB GND 07964-001 OFF Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009–2012 Analog Devices, Inc. All rights reserved. ADP2109 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Discharge Switch ........................................................................ 11 Applications ....................................................................................... 1 Short-Circuit Protection............................................................ 11 General Description ......................................................................... 1 Undervoltage Lockout ............................................................... 11 Typical Applications Circuit............................................................ 1 Thermal Protection .................................................................... 11 Revision History ............................................................................... 2 Soft Start ...................................................................................... 11 Specifications..................................................................................... 3 Current Limit .............................................................................. 11 Input and Output Capacitor, Recommended Specifications .. 3 100% Duty Operation ................................................................ 11 Absolute Maximum Ratings ............................................................ 4 Applications Information .............................................................. 12 Thermal Resistance ...................................................................... 4 ADIsimPower Design Tool ....................................................... 12 ESD Caution .................................................................................. 4 External Component Selection ................................................ 12 Pin Configuration and Function Descriptions ............................. 5 Thermal Considerations............................................................ 13 Typical Performance Characteristics ............................................. 6 PCB Layout Guidelines.............................................................. 13 Theory of Operation ...................................................................... 10 Evaluation Board ............................................................................ 14 Control Scheme .......................................................................... 10 Outline Dimensions ....................................................................... 15 PWM Mode ................................................................................. 10 Ordering Guide .......................................................................... 15 Power Save Mode ........................................................................ 10 Enable/Shutdown ....................................................................... 11 REVISION HISTORY 7/12—Rev. A to Rev B Changes to Features Section............................................................. 1 Added ADIsimPower Design Tool Section ..................................12 4/10—Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 15 4/09—Revision 0: Initial Version Rev. B | Page 2 of 16 Data Sheet ADP2109 SPECIFICATIONS VIN = 3.6 V, VOUT = 1.8 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. 1 Table 1. Parameters INPUT CHARACTERISTICS Input Voltage Range Undervoltage Lockout Threshold OUTPUT CHARACTERISTICS Output Voltage Accuracy POWER SAVE MODE TO PWM CURRENT THRESHOLD PWM TO POWER SAVE MODE CURRENT THRESHOLD INPUT CURRENT CHARACTERISTICS DC Operating Current Shutdown Current SW CHARACTERISTICS SW On Resistance Current Limit Discharge SW Resistance ENABLE CHARACTERISTICS EN Input High Threshold EN Input Low Threshold EN Input Leakage Current OSCILLATOR FREQUENCY START-UP TIME THERMAL CHARACTERISTICS Thermal Shutdown Threshold Thermal Shutdown Hysteresis 1 Conditions Min Typ Max Unit 2.15 5.5 2.3 2.25 V V V +2 +2.5 % % mA mA 30 1.0 μA μA 2.3 VIN rising VIN falling 2.05 PWM mode VIN = 2.3 V to 5.5 V, PWM mode −2 −2.5 85 80 ILOAD = 0 mA, device not switching EN = 0 V, TA = TJ = −40°C to +85°C 18 0.2 PFET NFET PFET switch peak current limit VOUT = 1.0 V 320 300 1300 150 1100 1500 1.2 EN = 0 V, 3.6 V ILOAD = 200 mA −1 2.5 0 3.0 0.4 +1 3.5 550 150 20 mΩ mΩ mA Ω V V μA MHz μs °C °C All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter MINIMUM INPUT AND OUTPUT CAPACITANCE MINIMUM AND MAXIMUM INDUCTANCE Symbol CMIN L Conditions TA = −40°C to +125°C TA = −40°C to +125°C Rev. B | Page 3 of 16 Min 4.7 0.3 Typ Max 3.0 Unit µF µH ADP2109 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VIN, EN FB, SW to GND Operating Ambient Temperature Range Operating Junction Temperature Range Storage Temperature Range Lead Temperature Range Soldering Conditions Rating −0.4 V to +6.5 V −1.0 V to (VIN + 0.2 V) −40°C to +85°C −40°C to +125°C −65°C to +150°C −65°C to +150°C JEDEC J-STD-020 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to GND. The ADP2109 can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that the junction temperature (TJ) is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low PCB thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as TJ is within specification limits. TJ of the device is dependent on the ambient temperature (TA) of the device, the power dissipation (PD) of the device, and the junction-toambient thermal resistance (θJA) of the package. Maximum TJ is calculated from TA and PD using the following formula: TJ = TA + (PD × θJA) THERMAL RESISTANCE θJA is specified for a device mounted on a JEDEC 2S2P PCB. Table 4. Thermal Resistance Package Type 5-Ball WLCSP ESD CAUTION Rev. B | Page 4 of 16 θJA 105 Unit °C/W Data Sheet ADP2109 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BALL A1 INDICATOR 1 2 VIN GND A SW B EN FB TOP VIEW (BALL SIDE DOWN) Not to Scale 07964-003 C Figure 2. Pin Configuration Table 5. Pin Function Descriptions Pin No. A1 Mnemonic VIN A2 B C1 C2 GND SW EN FB Description Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater capacitor as close to the ADP2109 as possible. Ground. Connect all the input and output capacitors to GND. Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier. Enable Input. Drive EN high to turn on the ADP2109. Drive EN low to turn it off and reduce the input current to 0.1 μA. Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator. Rev. B | Page 5 of 16 ADP2109 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.6 V, TA = 25°C, VEN = VIN, unless otherwise noted. 1400 24 +85°C 1300 1200 CURRENT LIMIT (A) QUIESCENT CURRENT (µA) 22 20 +25°C 18 –40°C 16 1100 1000 900 800 14 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) 600 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 07964-004 INPUT VOLTAGE (V) Figure 6. PMOS Current Limit vs. Input Voltage 0.15 3400 0.14 3300 0.13 OUTPUT CURRENT (A) 3500 3200 –40°C 3100 3000 +25°C 2900 +85°C 2800 0.12 0.11 0.10 0.09 0.08 PWM TO PSM 0.06 2600 0.05 PSM TO PWM +85°C 2.8 3.3 3.8 4.3 4.8 5.3 INPUT VOLTAGE (V) 0.04 2.5 3.0 3.5 4.0 4.5 5.0 5.5 07964-008 2500 2.3 –40°C 0.07 2700 07964-005 FREQUENCY (kHz) Figure 3. Quiescent Supply Current vs. Input Voltage 5.5 07964-009 12 2.5 07964-007 700 INPUT VOLTAGE (V) Figure 7. Mode Transition Across Temperature Figure 4. Switching Frequency vs. Input Voltage 0.15 1.840 0.14 1.830 0.13 OUTPUT CURRENT (A) 1.835 IOUT = 150mA 1.825 1.820 1.815 IOUT = 500mA 1.810 0.12 0.11 0.10 0.09 PSM TO PWM 1.805 0.08 1.800 0.07 1.795 –45 –25 –5 15 35 55 TEMPERATURE (°C) 75 07964-006 OUTPUT VOLTAGE (V) IOUT = 10mA PWM TO PSM 0.06 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) Figure 8. Mode Transition Figure 5. Output Voltage vs. Temperature Rev. B | Page 6 of 16 5.0 Data Sheet ADP2109 1.825 100 90 80 70 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 1.805 EFFICIENCY (%) OUTPUT VOLTAGE (V) 1.815 1.795 60 50 40 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 30 1.785 20 0.1 0.2 0.3 0.4 0.5 0.6 OUTPUT CURRENT (A) 0 0.001 07964-010 0 0.01 0.1 1 OUTPUT CURRENT (A) 07964-013 10 1.775 Figure 12. Efficiency, VOUT = 1.0 V Figure 9. Load Regulation, VOUT = 1.8 V 1.025 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V 1.020 VIN 3 OUTPUT VOLTAGE (V) 1.015 SW 1.010 1.005 4 1.000 VOUT 0.995 1 0 0.1 0.2 0.3 0.4 0.5 0.6 OUTPUT CURRENT (A) CH1 50mV CH3 1V 07964-011 0.985 Figure 10. Load Regulation, VOUT = 1.0 V M 40µs T 10.80% CH4 2V A CH3 3.26V 07964-014 0.990 Figure 13. Line Transient, VOUT = 1.8 V, Power Save Mode, ILOAD = 20 mA 100 90 VIN 80 60 50 VIN = 2.7V VIN = 3.6V VIN = 4.5V VIN = 5.5V SW 40 3 4 30 VOUT 20 1 0 0.001 0.01 0.1 OUTPUT CURRENT (A) 1 20mV CH3 1V CH4 2V M 40µs 10.80% A CH3 3.26V Figure 14. Line Transient, VOUT = 1.8 V, PWM, ILOAD =100 mA Figure 11. Efficiency, VOUT = 1.8 V Rev. B | Page 7 of 16 07964-015 10 07964-012 EFFICIENCY (%) 70 ADP2109 Data Sheet SW VIN 4 SW VOUT 1 3 4 IOUT 2 VOUT CH4 2V M 40µs T 10.80% A CH3 3.26V CH1 50mV Figure 15. Line Transient, VOUT = 1.0 V CH2 50mA Ω CH4 2V M 40µs T 25.4% A CH2 12mA 07964-019 CH1 50mV CH3 1V 07964-016 1 Figure 18. Load Transient, VOUT = 1.8 V, 5 mA to 50 mA SW SW 4 4 VOUT IL 2 1 VOUT EN 1 2 IOUT M 40µs T 19.80% A CH2 36mA CH1 1V CH3 5V Figure 16. Load Transient, VOUT = 1.8 V, 300 mA to 600 mA CH2 250mA CH4 5V M 40µs T 10.80% A CH3 2V 07964-020 CH2 200mA Ω CH4 2V 2V 07964-021 CH1 50mV 07964-017 3 Figure 19. Startup, VOUT = 1.8 V, 400 mA SW 4 4 SW IL 1 2 VOUT VOUT IOUT 1 EN 2 CH1 50mV CH2 250mA CH4 2V M 40µs T 25.4% A CH2 5mA 07964-018 3 CH1 1V CH3 5V CH2 250mA CH4 5V M 40µs T 10.80% A CH3 Figure 20. Startup, VOUT = 1.8 V, 5 mA Figure 17. Load Transient, VOUT = 1.8 V, 50 mA to 300 mA Rev. B | Page 8 of 16 Data Sheet ADP2109 SW SW 4 4 IL IL 2 VOUT 1 2 EN VOUT M 40µs T 19.80% A CH3 2.1V 07964-022 CH1 500mV CH2 500mA CH3 5V CH4 5V CH1 20mV Figure 21. Startup, VOUT = 1.0 V, 600 mA M 200ns T 20% A CH4 2.64V Figure 24. Typical PWM Waveform, 200 mA 120 RELATIVE OUTPUT VOLTAGE (%) VIN = 5.5V LOAD = 0mA VOUT = 1.0V VOUT CH2 200mA CH4 2V 07964-023 1 3 1 ENABLE 3 SW 100 80 60 50µF 40 20µF 20 M 4.00ms T 73.40% A CH1 380mV 07964-030 CH1 500mV CH3 2.00V CH4 5.00V Figure 22. Typical Discharge Curve, VOUT = 1.0 V, VIN = 5.5 V 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 TIME (ms) Figure 25. Discharge Profile with Different Values of Output Capacitors SW 4 IL 2 VOUT CH2 500mA CH4 2V M 2µs T 20% A CH4 2.64mA 07964-024 1 CH1 50mV 07964-031 10µF 4 Figure 23. Typical Power Save Mode Waveform, 50 mA Rev. B | Page 9 of 16 ADP2109 Data Sheet THEORY OF OPERATION GM ERROR AMP PWM COMP VIN SOFT START ILIMIT FB PSM COMP PWM/ LOW PSM CONTROL CURRENT SW DRIVER AND ANTISHOOTTHROUGH OSCILLATOR UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN GND 07964-025 ADP2109 EN Figure 26. Functional Block Diagram The ADP2109 is a step-down dc-to-dc converter that uses a fixed frequency and high speed current mode architecture. The high switching frequency and tiny 5-ball WLCSP package allow for a small step-down dc-to-dc converter solution. synchronous rectifier stays on for the rest of the cycle. The ADP2109 regulates the output voltage by adjusting the peak inductor current threshold. The ADP2109 operates with an input voltage of 2.3 V to 5.5 V and regulates an output voltage down to 1.0 V. The ADP2109 smoothly transitions to the power save mode of operation when the load current decreases below the power save mode current threshold. On entry to power save mode, an offset is induced in the PWM regulation level, which makes the output voltage rise. When it has reached a level of approximately 1.5 % above the PWM regulation level, PWM operation is turned off. At this point, both power switches are off and the ADP2109 enters an idle mode. COUT discharges until VOUT falls to the PWM regulation voltage, at which point the device drives the inductor to make VOUT rise again to the upper threshold. This process repeats while the load current is below the power save mode current threshold. CONTROL SCHEME The ADP2109 operates with a fixed frequency, current mode PWM control architecture at medium to high loads for high efficiency, but it shifts to a power save mode control scheme at light loads, to lower the regulation power losses. When operating in fixed frequency PWM mode, the duty cycle of the integrated switches is adjusted and regulates the output voltage. When operating in power save mode at light loads, the output voltage is controlled in a hysteretic manner, with higher VOUT ripple. During part of this time, the converter is able to stop switching and enters an idle mode, which improves conversion efficiency. PWM MODE In PWM mode, the ADP2109 operates at a fixed frequency of 3 MHz, set by an internal oscillator. At the start of each oscillator cycle, the PFET switch is turned on, putting a positive voltage across the inductor. Current in the inductor increases until the current sense signal crosses the peak inductor current threshold that turns off the PFET switch and turns on the NFET synchronous rectifier. This puts a negative voltage across the inductor, causing the inductor current to decrease. The POWER SAVE MODE Power Save Mode Current Threshold The power save mode current threshold is set to 80 mA. The ADP2109 employs a scheme that enables this current to remain accurately controlled, independent of VIN and VOUT levels. This scheme also ensures that there is very little hysteresis between the power save mode current threshold for entry to and exit from the power save mode. The power save mode current threshold has been optimized for excellent efficiency over all load currents. Rev. B | Page 10 of 16 Data Sheet ADP2109 ENABLE/SHUTDOWN SOFT START The ADP2109 starts operation with soft start when the EN pin is toggled from logic low to logic high. Pulling the EN pin low forces the device into shutdown mode, reducing the shutdown current below 1 μA. The ADP2109 has an internal soft start function that ramps the output voltage in a controlled manner upon startup, thereby limiting the inrush current. This prevents possible input voltage drops when a battery or a high impedance power source is connected to the input of the converter. DISCHARGE SWITCH The ADP2109 has an integrated resistor of typically 150 Ω, as shown in Figure 27, to discharge the output capacitor when the EN pin goes low or when the device goes into under-voltage lock out or thermal shutdown. The time to discharge is typically 200 µs. FB After the EN pin is driven high, internal circuits start to power up. The time required to settle after the EN pin is driven high is called the power-up time. After the internal circuits are powered up, the soft start ramp is initiated and the output capacitor is charged linearly until the output voltage is in regulation. The time required for the output voltage to ramp is called the soft start time. 07964-002 Start-up time in the ADP2109 is the measure of when the output is in regulation after the EN pin is driven high. Start-up time consists of the power-up time and soft start time. CURRENT LIMIT Figure 27. Internal Discharge Switch on Feedback SHORT-CIRCUIT PROTECTION The ADP2109 includes frequency foldback to prevent output current runaway on a hard short. When the voltage at the feedback pin falls below half of the target output voltage, indicating the possibility of a hard short at the output, the switching frequency is reduced to half of the internal oscillator frequency. The reduction in the switching frequency allows more time for the inductor to discharge, preventing a runaway of output current. UNDERVOLTAGE LOCKOUT To protect against battery discharge, undervoltage lockout circuitry is integrated on the ADP2109. If the input voltage drops below the 2.15 V undervoltage lockout (UVLO) threshold, the ADP2109 shuts down and both the power switch and synchronous rectifier turn off. When the voltage rises above the UVLO threshold, the soft start period is initiated, and the part is enabled. The ADP2109 has protection circuitry to limit the amount of positive current flowing through the PFET switch and through the synchronous rectifier. The positive current limit on the power switch limits the amount of current that can flow from the input to the output. The negative current limit prevents the inductor current from reversing direction and flowing out of the load. 100% DUTY OPERATION With a drop in VIN, or an increase in ILOAD, the ADP2109 reaches the limit where, even with the PFET switch on 100% of the time, VOUT drops below the desired output voltage. At this limit, the ADP2109 smoothly transitions to a mode where the PFET switch stays on 100% of the time. When the input conditions change again and the required duty cycle falls, the ADP2109 immediately restarts PWM regulation without allowing overshoot on VOUT. THERMAL PROTECTION In the event the ADP2109 junction temperatures rise above 150°C, the thermal shutdown circuit turns off the converter. Extreme junction temperatures can be the result of high current operation, poor circuit board design, and/or high ambient temperature. A 20°C hysteresis is included so that when thermal shutdown occurs, the ADP2109 does not return to operation until the on-chip temperature drops below 130°C. When coming out of thermal shutdown, soft start is initiated. Rev. B | Page 11 of 16 ADP2109 Data Sheet APPLICATIONS INFORMATION ADISIMPOWER DESIGN TOOL Output Capacitor The ADP2109 is supported by ADIsimPower design tool set. ADIsimPower is a collection of tools that produce complete power designs optimized for a specific design goal. The tools enable the user to generate a full schematic, bill of materials, and calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and all real external components. For more information about ADIsimPower design tools, refer to www.analog.com/ADIsimPower. The tool set is available from this website, and users can also request an unpopulated board through the tool. Higher output capacitor values reduce the output voltage ripple and improve load transient response. When choosing this value, it is also important to account for the loss of capacitance due to output voltage dc bias. EXTERNAL COMPONENT SELECTION Parameters like efficiency and transient response can be affected by varying the choice of external components in the applications circuit, as shown in Figure 1. The worst-case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage is calculated using the following equation: Inductor CEFF = COUT × (1 – TEMPCO) × 1(1 – TOL) The high switching frequency of the ADP2109 allows for the selection of small chip inductors. For best performance, use inductor values between 0.7 μH and 3 μH. Recommended inductors are shown in Table 6. The peak-to-peak inductor current ripple is calculated using the following equation: VOUT × (VIN − VOUT ) VIN × f SW × L where: fSW is the switching frequency. L is the inductor value. In this example, the worst-case temperature coefficient (TEMPCO) over −40°C to +85°C is assumed to be 15% for an X5R dielectric. The tolerance of the capacitor (TOL) is assumed to be 10%, and COUT is 9.2481 μF at 1.8 V from the graph in Figure 28. Substituting these values in the equation yields CEFF = 9.2481 μF × (1 – 0.15) × (1 – 0.1) = 7.0747 μF The minimum dc current rating of the inductor must be greater than the inductor peak current. The inductor peak current is calculated using the following equation: To guarantee the performance of the ADP2109, it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors be evaluated for each application. 12 I RIPPLE 2 10 Inductor conduction losses are caused by the flow of current through the inductor, which has an associated internal DCR. Larger sized inductors have smaller DCR, which may decrease inductor conduction losses. Inductor core losses are related to the magnetic permeability of the core material. Because the ADP2109 is a high switching frequency dc-to-dc converter, shielded ferrite core material is recommended for its low core losses and low EMI. Table 6. Suggested 1.0 μH Inductors Vendor Murata Coilcraft Toko TDK Model LQM2HPN1R0M LPS3010-102 MDT2520-CN CPL2512T Dimensions 2.5 × 2.0 × 1.1 3.0 × 3.0 × 0.9 2.5 × 2.0 × 1.2 2.5 × 1.5 × 1.2 8 6 4 2 0 ISAT (mA) 1500 1700 1800 1500 DCR (mΩ) 90 85 100 100 Rev. B | Page 12 of 16 0 1 2 3 4 5 DC BIAS VOLTAGE (V) Figure 28. Typical Capacitor Performance 6 07964-026 I PEAK = I LOAD( MAX ) + where: CEFF is the effective capacitance at the operating voltage. TEMPCO is the worst-case capacitor temperature coefficient. TOL is the worst-case component tolerance. CAPACITANCE (µF) I RIPPLE = Ceramic capacitors are manufactured with a variety of dielectrics, each with a different behavior over temperature and applied voltage. Capacitors must have a dielectric that is adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions. X5R or X7R dielectrics with a voltage rating of 6.3 V or 10 V are recommended for best performance. Y5V and Z5U dielectrics are not recommended for use with any dc-to-dc converter because of their poor temperature and dc bias characteristics. Data Sheet ADP2109 The peak-to-peak output voltage ripple for a chosen output capacitor and inductor values is calculated using the following equation: VRIPPLE = VIN I RIPPLE = (2π × f SW ) × 2 × L × C OUT 8 × f SW × C OUT Capacitors with lower equivalent series resistance (ESR) are preferred to guarantee low output voltage ripple, as shown in the following equation: ESRCOUT ≤ VRIPPLE I RIPPLE The effective capacitance needed for stability, which includes temperature and dc bias effects, is 7 µF. Table 7. Suggested 10 μF Capacitors Vendor Murata Taiyo Yuden TDK Type X5R X5R X5R Model GRM188R60J106 JMK107BJ106 C1608JB0J106K Case Size 0603 0603 0603 Voltage Rating (V) 6.3 6.3 6.3 Input Capacitor Higher value input capacitors help to reduce the input voltage ripple and improve transient response. Maximum input capacitor current is calculated using the following equation: I CIN ≥ I LOAD( MAX ) VOUT (VIN − VOUT ) VIN To minimize supply noise, place the input capacitor as close as possible to the VIN pin of the ADP2109 IC. As with the output capacitor, a low ESR capacitor is recommended. The list of recommended capacitors is shown in Table 8. Table 8. Suggested 4.7 μF Capacitors Vendor Murata Taiyo Yuden TDK Type X5R X5R X5R Model GRM188R60J475ME19 JMK107BJ475 C1608X5R0J475 Case Size 0603 0603 0603 Voltage Rating (V) 6.3 6.3 6.3 THERMAL CONSIDERATIONS Because of the high efficiency of the ADP2109, only a small amount of power is dissipated inside the ADP2109 package, which reduces thermal constraints. However, in applications with maximum loads at high ambient temperature, low supply voltage, and high duty cycle, the heat dissipated in the package is great enough that it may cause the junction temperature of the die to exceed the maximum junction temperature of 125°C. If the junction temperature exceeds 150°C, the converter goes into thermal shutdown. It recovers when the junction temperature falls below 130°C. The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as shown in the following equation: TJ = TA + TR where: TJ is the junction temperature. TA is the ambient temperature. TR is the rise in temperature of the package due to power dissipation to it. The rise in temperature of the package is directly proportional to the power dissipation in the package. The proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: TR = θJA × PD where: TR is the rise of temperature of the package. θJA is the thermal resistance from the junction of the die to the ambient temperature of the package. PD is the power dissipation in the package. PCB LAYOUT GUIDELINES Poor layout can affect ADP2109 performance causing electromagnetic interference (EMI) and electromagnetic compatibility (EMC) problems, ground bounce, and voltage losses. Poor layout can also affect regulation and stability. A good layout is implemented using the following rules: • • • • Rev. B | Page 13 of 16 Place the inductor, input capacitor, and output capacitor close to the IC using short tracks. These components carry high switching frequencies and the large tracks act like antennas. Route the output voltage path away from the inductor and SW node to minimize noise and magnetic interference. Maximize the size of ground metal on the component side to help with thermal dissipation. Use a ground plane with several vias connecting to the component side ground to further reduce noise interference on sensitive circuit nodes. ADP2109 Data Sheet EVALUATION BOARD TB5 GND IN CIN 4.7µF EN A2 C1 VIN SW B 1 L1 1µH 2 GND EN FB C2 VOUT TB3 VOUT COUT 10µF U1 TB4 GND OUT Figure 29. Evaluation Board Schematic 07964-028 TB2 EN A1 Figure 30. Top Layer, Recommended Layout 07964-029 VIN VIN Figure 31. Bottom Layer, Recommended Layout Rev. B | Page 14 of 16 07964-027 ADP2109 TB1 Data Sheet ADP2109 OUTLINE DIMENSIONS 1.06 1.02 0.98 0.022 REF 0.657 0.602 0.546 0.50 REF SEATING PLANE 2 1 A BALL A1 IDENTIFIER 0.330 0.310 0.290 1.49 1.45 1.41 0.866 REF 0.50 B C 0.355 0.330 0.304 COPLANARITY 0.04 BOTTOM VIEW (BALL SIDE UP) 0.280 0.250 0.220 021109-B TOP VIEW (BALL SIDE DOWN) Figure 32. 5-Ball Wafer Level Chip Scale Package [WLCSP] (CB-5-3) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADP2109ACBZ-1.0-R7 ADP2109ACBZ-1.2-R7 ADP2109ACBZ- 1.5-R7 ADP2109ACBZ-1.8-R7 ADP2109CB-1.8EVALZ 1 Temperature Range –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C Output Voltage (V) 1.0 1.2 1.5 1.8 Package Description 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] 5-Ball Wafer Level Chip Scale Package [WLCSP] Evaluation Board for 1.8 V Z = RoHS Compliant Part. Rev. B | Page 15 of 16 Package Option CB-5-3 CB-5-3 CB-5-3 CB-5-3 Branding L9D L9E LDA L9F ADP2109 Data Sheet NOTES ©2009–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07964-0-7/12(B) Rev. B | Page 16 of 16