DRV134 DRV135 DRV 134 DRV 134 DRV 135 SBOS094A – JANUARY 1998 – REVISED APRIL 2007 AUDIO BALANCED LINE DRIVERS FEATURES DESCRIPTION ● BALANCED OUTPUT ● LOW DISTORTION: 0.0005% at f = 1kHz ● WIDE OUTPUT SWING: 17Vrms into 600Ω ● HIGH CAPACITIVE LOAD DRIVE ● HIGH SLEW RATE: 15V/µs ● WIDE SUPPLY RANGE: ±4.5V to ±18V ● LOW QUIESCENT CURRENT: ±5.2mA ● 8-PIN DIP, SO-8, AND SOL-16 PACKAGES ● COMPANION TO AUDIO DIFFERENTIAL LINE RECEIVERS: INA134 and INA137 ● IMPROVED REPLACEMENT FOR SSM2142 The DRV134 and DRV135 are differential output amplifiers that convert a single-ended input to a balanced output pair. These balanced audio drivers consist of high performance op amps with on-chip precision resistors. They are fully specified for high performance audio applications and have excellent ac specifications, including low distortion (0.0005% at 1kHz) and high slew rate (15V/µs). The on-chip resistors are laser-trimmed for accurate gain and optimum output common-mode rejection. Wide output voltage swing and high output drive capability allow use in a wide variety of demanding applications. They easily drive the large capacitive loads associated with long audio cables. Used in combination with the INA134 or INA137 differential receivers, they offer a complete solution for transmitting analog audio signals without degradation. APPLICATIONS ● ● ● ● ● ● ● ● ● AUDIO DIFFERENTIAL LINE DRIVERS AUDIO MIX CONSOLES DISTRIBUTION AMPLIFIERS GRAPHIC/PARAMETRIC EQUALIZERS DYNAMIC RANGE PROCESSORS DIGITAL EFFECTS PROCESSORS TELECOM SYSTEMS HI-FI EQUIPMENT INDUSTRIAL INSTRUMENTATION The DRV134 is available in 8-pin DIP and SOL-16 surface-mount packages. The DRV135 comes in a spacesaving SO-8 surface-mount package. Both are specified for operation over the extended industrial temperature range, –40°C to +85°C and operate from –55°C to +125°C. V+ 50Ω +VO A2 +Sense 10kΩ –Sense VIN A1 50Ω Gnd –VO A3 10kΩ All resistors 30kΩ unless otherwise indicated. V– Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 1998-2007, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com SPECIFICATIONS: VS = ±18V At TA = +25°C, VS = ±18V, RL = 600Ω differential connected between +VO and –VO, unless otherwise noted. DRV134PA, UA DRV135UA PARAMETER AUDIO PERFORMANCE Total Harmonic Distortion + Noise CONDITIONS THD+N Noise Floor, RTO(1) Headroom, RTO(1) INPUT Input Impedance(2) Input Current ZIN IIN FREQUENCY RESPONSE Small-Signal Bandwidth Slew Rate Settling Time: 0.01% Overload Recovery POWER SUPPLY Rated Voltage Voltage Range Quiescent Current TEMPERATURE RANGE Specification Range Operation Range Storage Range Thermal Resistance 8-Pin DIP SO-8 Surface Mount SOL-16 Surface Mount TYP f = 20Hz to 20kHz,VO = 10Vrms f = 1kHz, VO = 10Vrms 20kHz BW THD+N < 1% 0.001 0.0005 –98 +27 VIN = ±7.07V 10 ±700 MAX UNITS % % dBu dBu ±1000 kΩ µA [(+VO) – (–VO)]/VIN VIN = ±10V GAIN Differential Initial Error vs Temperature Single-Ended Initial Error vs Temperature Nonlinearity OUTPUT Common-Mode Rejection, f = 1kHz Signal Balance Ratio, f = 1kHz Output Offset Voltage Offset Voltage, Common-Mode vs Temperature Offset Voltage, Differential vs Temperature vs Power Supply Output Voltage Swing, Positive Negative Impedance Load Capacitance, Stable Operation Short-Circuit Current MIN 5.8 6 ±0.1 ±10 ±2 dB % ppm/°C VIN = ±5V 5.8 OCMR SBR See OCMR Test Circuit, Figure 4 See SBR Test Circuit, Figure 5 VOCM(3) VIN = 0 VOD(4) VIN = 0 PSRR VS = ±4.5V to ±18V No Load(5) No Load(5) CL ISC 46 35 80 (V+) – 3 (V–) + 2 CL Tied to Ground (each output) 6 ±0.7 ±10 0.0003 68 54 ±50 ±150 ±1 ±5 110 (V+) – 2.5 (V–) + 1.5 50 1 ±85 VOUT = 10V Step Output Overdriven 10% ±250 ±10 ±4.5 ±5.2 IO = 0 –40 –55 –55 θJA 100 150 80 mV µV/°C mV µV/°C dB V V Ω µF mA MHz V/µs µs µs ±18 VS dB % ppm/°C % of FS dB dB 1.5 15 2.5 3 SR IQ ±2 ±18 ±5.5 V V mA +85 +125 +125 °C °C °C °C/W °C/W °C/W NOTES: (1) dBu = 20log (Vrms /0.7746); RTO = Referred-to-Output. (2) Resistors are ratio matched but have ±20% absolute value. (3) VOCM = [(+VO) + (–VO)]/ 2. (4) VOD = (+VO) – (–VO). (5) Ensures linear operation. Includes common-mode offset. 2 DRV134, DRV135 www.ti.com SBOS094A PIN CONFIGURATIONS Top View 8-Pin DIP/SO-8 –VO 1 8 +VO –Sense 2 7 +Sense Gnd 3 6 V+ VIN 4 5 V– Top View SOL-16 NC 1 16 NC NC 2 15 NC –VO 3 14 +VO –Sense 4 13 +Sense Gnd 5 12 V+ VIN 6 11 V– NC 7 10 NC NC 8 9 NC ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– .................................................................... 40V Input Voltage Range .................................................................... V– to V+ Output Short-Circuit (to ground) .............................................. Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may affect device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR DRV134PA DRV134UA " DRV135UA " DIP-8 SOL-16 Surface Mount " SO-8 Surface Mount " P DW " D " SPECIFIED TEMPERATURE RANGE ORDERING NUMBER TRANSPORT MEDIA, QUANTITY –40°C to +85°C –40°C to +85°C " –40°C to +85°C " DRV134PA DRV134UA DRV134UA/1K DRV135UA DRV135UA/2K5 Rails, 50 Rails, 48 Tape and Reel. 1000 Rails, 100 Tape and Reel, 2500 NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI wwebsite at www.ti.com. DRV134, DRV135 SBOS094A www.ti.com 3 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±18V, RL = 600Ω differential connected between +VO and –VO, unless otherwise noted. TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY 0.01 0.01 Differential Mode VO = 10Vrms No Cable A B 0.001 Differential Mode VO = 10Vrms 500 ft cable See Figure 3 for Test Circuit A: R1 = R2 = RL = ∞ (no load) B: R1 = R2 = 600Ω, RL = ∞ C: R1 = R2 = ∞, RL = 600Ω A B THD+N (%) THD+N (%) See Figure 3 for Test Circuit A: R1 = R2 = RL = ∞ (no load) B: R1 = R2 = 600Ω, RL = ∞ C: R1 = R2 = ∞, RL = 600Ω 0.001 C C DRV134 Output DRV134 Output 0.0001 0.0001 20 100 1k 10k 20k 100 1k 10k 20k Frequency (Hz) TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY SYSTEM TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY 0.1 0.01 Single-Ended Mode VO = 10Vrms See Figure 3 for Test Circuit A: R1 = R2 = RL = ∞ (no load) B: R1 = R2 = ∞ RL = 600Ω 0.01 A B THD+N (%) –VO or +VO Grounded A: R1 = 600Ω (250 ft cable) B: R1 = ∞ (no cable) THD+N (%) 20 Frequency (Hz) Differential Mode VO = 10Vrms A (no cable) 0.001 0.001 B (500ft cable) INA137 Output DRV134 Output 0.0001 0.0001 20 100 1k 10k 20k 20 10k HEADROOM—TOTAL HARMONIC DISTORTION+NOISE vs OUTPUT AMPLITUDE DIM INTERMODULATION DISTORTION vs OUTPUT AMPLITUDE 20k 1 f = 1kHz Single-Ended Mode Differential Mode 500 ft Cable RL = 600Ω 500 ft Cable RL = 600Ω Differential Mode 0.1 0.1 500 ft Cable RL = 600Ω DIM (%) THD+N (%) 1k Frequency (Hz) 1 0.01 0.01 0.001 0.001 5 10 15 20 25 No Cable RL = ∞ BW = 30kHz No Cable RL = ∞ DRV134 Output 0.0001 0.0001 30 5 Output Amplitude (dBu) 4 100 Frequency (Hz) 10 15 20 25 30 Output Amplitude (dBu) DRV134, DRV135 www.ti.com SBOS094A TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±18V, RL = 600Ω differential connected between +VO and –VO, unless otherwise noted. HARMONIC DISTORTION PRODUCTS vs FREQUENCY 0.01 5 0.001 Voltage Gain (dB) Amplitude (% of Fundamental) GAIN vs FREQUENCY 10 No Cable, RL = ∞ 500 ft Cable, RL = 600Ω Differential Mode 2nd Harmonic 0.0001 3rd Harmonic 0.00001 20 100 1k 10k –5 –10 20k 1k 100k 1M Frequency (Hz) OUTPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY OUTPUT VOLTAGE NOISE vs NOISE BANDWIDTH 10M Voltage Noise (µVrms) 100 1k 100 10 10 1 0.1 1 10 100 1k 10k 100k 1M 1 100 1k 10k Frequency (Hz) POWER SUPPLY REJECTION vs FREQUENCY MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY 100k Output Voltage Swing (Vrms) 20 100 +PSRR 80 60 –PSRR 40 20 10 Frequency (Hz) 120 Power Supply Rejection (dB) 10k Frequency (Hz) 10k Voltage Noise (nV/√Hz) 0 VS = ±4.5V to ±18V 0 16 0.1% Distortion 12 0.01% Distortion 8 4 RL = 600Ω Diff Mode 0 10 100 1k 10k 100k 1M 10k Frequency (Hz) 50k 80k 100k Frequency (Hz) DRV134, DRV135 SBOS094A 20k www.ti.com 5 TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±18V, RL = 600Ω differential connected between +VO and –VO, unless otherwise noted. THD+N ≤ 0.1% OUTPUT VOLTAGE SWING vs OUTPUT CURRENT OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE 18 THD+N ≤ 0.1% 16 +25°C 14 16 Output Voltage Swing (V) Differential Output Voltage (Vrms) 20 12 8 4 12 8 –8 +25°C –10 –12 –14 –18 ±4 ±6 ±8 ±10 ±12 ±14 ±16 ±18 ±20 0 QUIESCENT CURRENT vs SUPPLY VOLTAGE Short-Circuit Current (mA) Quiescent Current (mA) ±80 ±100 ±120 ±5.4 T = –55°C ±5.2 T = +25°C ±5 T = +125°C ±4.8 ±100 ±4 ±6 ±8 ±10 ±12 ±14 ±16 +ISC ±80 –ISC ±60 ±40 ±4.6 ±20 ±18 –75 –50 –25 0 25 50 75 Supply Voltage (V) Temperature (°C) DIFFERENTIAL OFFSET VOLTAGE PRODUCTION DISTRIBUTION COMMON-MODE OFFSET VOLTAGE PRODUCTION DISTRIBUTION 45 100 125 35 Typical production distribution of packaged units. All package types included. 30 Percent of Units (%) 35 ±60 SHORT-CIRCUIT CURRENT vs TEMPERATURE ±5.6 40 ±40 Output Current (mA) Supply Voltage (V) Percent of Units (%) –55°C +125°C –16 0 30 25 20 15 10 25 15 10 5 0 0 –250 –225 –200 –175 –150 –125 –100 –75 –50 –25 0 25 50 75 100 125 150 175 200 225 250 –10 –9 –8 –7 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 7 8 9 10 Typical production distribution of packaged units. All package types included. 20 5 Differential Offset Voltage (mV) 6 –55°C +125°C 10 Common-Mode Offset Voltage (mV) DRV134, DRV135 www.ti.com SBOS094A TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, VS = ±18V, RL = 600Ω differential connected between +VO and –VO, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE CL = 100pF CL = 1000pF 50mV/div 50mV/div SMALL-SIGNAL STEP RESPONSE 2µs/div LARGE-SIGNAL STEP RESPONSE LARGE-SIGNAL STEP RESPONSE CL = 100pF CL = 1000pF 5V/div 5V/div 2µs/div 2µs/div 2µs/div SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 40 100mV Step Overshoot (%) 30 20 10 0 10 100 1k 10k Load Capacitance (pF) DRV134, DRV135 SBOS094A www.ti.com 7 APPLICATIONS INFORMATION resistors. Characterized by low differential-mode output impedance (50Ω) and high common-mode output impedance (1.6kΩ), the DRV134 is ideal for audio applications. Normally, +VO is connected to +Sense, –VO is connected to –Sense, and the outputs are taken from these junctions as shown in Figure 1. For applications with large dc cable offset errors, a 10µF electrolytic nonpolarized blocking capacitor at each sense pin is recommended as shown in Figure 2. The DRV134 (and DRV135 in SO-8 package) converts a single-ended, ground-referenced input to a floating differential output with +6dB gain (G = 2). Figure 1 shows the basic connections required for operation. Decoupling capacitors placed close to the device pins are strongly recommended in applications with noisy or high impedance power supplies. The DRV134 consists of an input inverter driving a crosscoupled differential output stage with 50Ω series output V– V+ 1µF 1µF 5 6 (12) (11) DRV134 DRV135 50Ω 8 A2 +VO (14) 7 (13) +Sense 10kΩ VIN 4 G = +6dB (6) 2 Gnd A1 3 (4) 1 50Ω A3 (5) (3) –Sense –VO 10kΩ All resistors 30kΩ unless otherwise indicated. SOL-16 pin numbers in parentheses. FIGURE 1. Basic Connections. DRIVER DRV134 DRV135 RECEIVER 50Ω A2 8 7 10µF(1) +VO BALANCED CABLE PAIR –VO 5 2 10kΩ VIN 4 6 2 Gnd 3 A1 50Ω A3 VO 10µF(1) 1 –VO 3 1 +VO INA134, INA137 INA134 (G = 1): VO = 2VIN INA137 (G = 1/2): VO = VIN 10kΩ All resistors 30kΩ unless otherwise indicated. Pin numbers shown for DIP and SO-8 versions. NOTE: (1) Optional 10µF electrolytic (nonpolarized) capacitors reduce common-mode offset errors. FIGURE 2. Complete Audio Driver/Receiver Circuit. 8 DRV134, DRV135 www.ti.com SBOS094A Excellent internal design and layout techniques provide low signal distortion, high output level (+27dBu), and a low noise floor (–98dBu). Laser trimming of thin film resistors assures excellent output common-mode rejection (OCMR) and signal balance ratio (SBR). In addition, low dc voltage offset reduces errors and minimizes load currents. Up to approximately 10kHz, distortion is below the measurement limit of commonly used test equipment. Furthermore, distortion remains relatively constant over the wide output voltage swing range (approximately 2.5V from the positive supply and 1.5V from the negative supply). A special output stage topology yields a design with minimum distortion variation from lot-to-lot and unit-to-unit. Furthermore, the small and large signal transient response curves demonstrate the DRV134’s stability under load. For best system performance, it is recommended that a high input-impedance difference amplifier be used as the receiver. Used with the INA134 (G = 0dB) or the INA137 (G = ±6dB) differential line receivers, the DRV134 forms a complete solution for driving and receiving audio signals, replacing input and output coupling transformers commonly used in professional audio systems (Figure 2). When used with the INA137 (G = –6dB) overall system gain is unity. OUTPUT COMMON-MODE REJECTION Output common-mode rejection (OCMR) is defined as the change in differential output voltage due to a change in output common-mode voltage. When measuring OCMR, VIN is grounded and a common-mode voltage, VCM, is applied to the output as shown in Figure 4. Ideally no differential mode signal (VOD) should appear. However, a small mode-conversion effect causes an error signal whose magnitude is quantified by OCMR. AUDIO PERFORMANCE The DRV134 was designed for enhanced ac performance. Very low distortion, low noise, and wide bandwidth provide superior performance in high quality audio applications. Laser-trimmed matched resistors provide optimum output common-mode rejection (typically 68dB), especially when compared to circuits implemented with op amps and discrete precision resistors. In addition, high slew rate (15V/µs) and fast settling time (2.5µs to 0.01%) ensure excellent dynamic response. +18V 1µF VIN The DRV134 has excellent distortion characteristics. As shown in the distortion data provided in the typical performance curves, THD+Noise is below 0.003% throughout the audio frequency range under various output conditions. Both differential and single-ended modes of operation are shown. In addition, the optional 10µF blocking capacitors used to minimize VOCM errors have virtually no effect on performance. Measurements were taken with an Audio Precision System One (with the internal 80kHz noise filter) using the THD test circuit shown in Figure 3. 6 4 7 8 VOD DRV134 Gnd 1 2 5 3 300Ω(1) +VO 300Ω(1) –VO 600Ω 1µF VCM = 10Vp-p –18V OCMR = –20 Log ( VOD VCM ) at f = 1kHz, VOD = (+VO) – (–VO) NOTE: (1) Matched to 0.1%. FIGURE 4. Output Common-Mode Rejection Test Circuit. +18V +18V 1µF VIN 4 6 1µF Test Point or +VO 7 –In DRV134 5 INA137 RL 1 2 3 7 2 8 –VO 1 +In 3 R1 5 6 VOUT 4 R2 1µF 1µF –18V –18V NOTE: Cable loads, where indicated, are Belden 9452 cable. FIGURE 3. Distortion Test Circuit. DRV134, DRV135 SBOS094A www.ti.com 9 SIGNAL BALANCE RATIO Signal balance ratio (SBR) measures the symmetry of the output signals under loaded conditions. To measure SBR an input signal is applied and the outputs are summed as shown in Figure 5. VOUT should be zero since each output ideally is exactly equal and opposite. However, an error signal results from any imbalance in the outputs. This error is quantified by SBR. The impedances of the DRV134’s out put stages are closely matched by laser trimming to minimize SBR errors. In an application, SBR also depends on the balance of the load network. +18V 1µF VIN = 10Vp-p 6 4 +VO 7 8 1 2 5 3 300Ω(1) VOUT –VO 600Ω 1µF –18V SBR = –20 Log ( VOUT VIN ) CABLE The DRV134 is capable of driving large signals into 600Ω loads over long cables. Low impedance shielded audio cables such as the standard Belden 8451 or 9452 (or similar) are recommended, especially in applications where long cable lengths are required. THERMAL PERFORMANCE The DRV134 and DRV135 have robust output drive capability and excellent performance over temperature. In most applications there is no significant difference between the DIP, SOL-16, and SO-8 packages. However, for applications with extreme temperature and load conditions, the SOL-16 (DRV134UA) or DIP (DRV134PA) packages are recommended. Under these conditions, such as loads greater than 600Ω or very long cables, performance may be degraded in the SO-8 (DRV135UA) package. 300Ω(1) DRV134 Gnd For best rejection of line noise and hum differential mode operation is recommended. However, single-ended performance is adequate for many applications. In general singleended performance is comparable to differential mode (see THD+N typical performance curves), but the commonmode and noise rejection inherent in balanced-pair systems is lost. at f = 1kHz NOTE: (1) Matched to 0.1%. FIGURE 5. Signal Balance Ratio Test Circuit. SINGLE-ENDED OPERATION The DRV134 can be operated in single-ended mode without degrading output drive capability. Single-ended operation requires that the unused side of the output pair be grounded (both the VO and Sense pins) to a low impedance return path. Gain remains +6dB. Grounding the negative outputs as shown in Figure 6 results in a noninverted output signal (G = +2) while grounding the positive outputs gives an inverted output signal (G = –2). LAYOUT CONSIDERATIONS A driver/receiver balanced-pair (such as the DRV134 and INA137) rejects the voltage differences between the grounds at each end of the cable, which can be caused by ground currents, supply variations, etc. In addition to proper bypassing, the suggestions below should be followed to achieve optimal OCMR and noise rejection. • The DRV134 input should be driven by a low impedance source such as an op amp or buffer. • As is the case for any single-ended system, the source’s common should be connected as close as possible to the DRV134’s ground. Any ground offset errors in the source will degrade system performance. • Symmetry on the outputs should be maintained. V+ VIN VOUT = 2VIN 6 7 4 8 DRV134 600Ω 1 2 3 5 • Shielded twisted-pair cable is recommended for all applications. Physical balance in signal wiring should be maintained. Capacitive differences due to varying wire lengths may result in unequal noise pickup between the pair and degrade OCMR. Follow industry practices for proper system grounding of the cables. G = +6dB V– FIGURE 6. Typical Single-Ended Application. 10 DRV134, DRV135 www.ti.com SBOS094A PACKAGE OPTION ADDENDUM www.ti.com 7-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) DRV134PA ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type DRV134PA DRV134PAG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type DRV134PA DRV134UA ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV134UA DRV134UA/1K ACTIVE SOIC DW 16 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV134UA DRV134UA/1KE4 ACTIVE SOIC DW 16 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV134UA DRV134UAE4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV134UA DRV135UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV 135UA DRV135UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV 135UA DRV135UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV 135UA DRV135UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR DRV 135UA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com (3) 7-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DRV134UA/1K SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 DRV135UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV134UA/1K SOIC DW 16 1000 367.0 367.0 38.0 DRV135UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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