MP6231/MP6232 3.3V/5V, Dual-Channel 500mA Current-Limited Power Distribution Switches The Future of Analog IC Technology DESCRIPTION FEATURES The MP6231/MP6232 Power Distribution Switch features internal current limiting to prevent damage to host devices due to faulty load conditions. The MP6231/MP6232 analog switch has 85mΩ on-resistance and operates from 2.7V to 5.5V input. It is available with guaranteed current limits, making it ideal for load switching applications. The MP6231/MP6232 has built-in protection for both over current and increased thermal stress. For over current, the device will limit the current by changing to a constant current mode. • • • • • • • • • • • • As the temperature increases as a result of short circuit, then the device will shut off. The device will recover once the device temperature reduces to approx 120°C. 500mA Continuous Current Accurate Current Limit 2.7V to 5.5V Supply Range 140μA Quiescent Current 85mΩ MOSFET Thermal-Shutdown Protection Under-Voltage Lockout 8ms FLAG Deglitch Time No FLAG Glitch During Power Up Reverse Current Blocking Active High & Active Low Options UL File # E322138 APPLICATIONS • • • • • • • The MP6231/MP6232 is available in 8-pin MSOP, SOIC package with exposed pad and 8pin SOIC w/o exposed pad. Smartphone and PDA Portable GPS Device Notebook PC Set-top-box Telecom and Network Systems PC Card Hot Swap USB Power Distribution “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION +5V 1 GND 2 IN 3 4 FLAG1 OUT1 MP6232 EN1 EN2 OUT2 8 To USB Controller 7 6 Output 1 Output 2 FLAG2 5 DUAL-CHANNEL UL Recognized Component MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 1 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES ORDERING INFORMATION Part Number Enable MP6231DN* MP6231DH MP6231DS MP6232DN MP6232DH MP6232DS Switch Maximum Typical ShortContinuous Circuit Current Load Current @ TA=25C 0.5A Free Air Temperature (TA) Top Marking SOIC8E MP6231DN MSOP8E 6231D SOIC8 -40°C to +85°C SOIC8E MP6232DN MSOP8E 6232D SOIC8 Active High Dual Package 750mA Active Low * For Tape & Reel, add suffix –Z (e.g. MP6231DN–Z). For RoHS compliant packaging, add suffix –LF (e.g. MP6231DN–LF–Z) PACKAGE REFERENCE TOP VIEW TOP VIEW TOP VIEW GND 1 8 FLAG1 GND 1 8 FLAG1 OUT1 IN 2 7 OUT1 IN 2 7 OUT1 6 OUT2 EN1* 3 6 OUT2 5 FLAG2 EN1* 3 6 OUT2 EN2* 4 5 FLAG2 EN2* 4 5 FLAG2 GND 1 8 FLAG1 IN 2 7 EN1* 3 EN2* 4 EXPOSED PAD ON BACKSIDE CONNECT TO GND EXPOSED PAD ON BACKSIDE MSOP8E SOIC8 SOIC8E MP6231/MP6232Dual-Channel (* EN is active high for MP6231) ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance IN .................................................-0.3V to +6.0V EN, FLAG, OUT to GND ..............-0.3V to +6.0V (2) Continuous Power Dissipation (TA = +25°C) SOIC8E...................................................... 2.5W MSOP8E .................................................. 2.27W SOIC8 ........................................................ 1.4W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature............... -65°C to +150°C Operating Junct. Temp. ........... -40°C to +125°C SOIC8E .................................. 50 ...... 10... °C/W MSOP8E................................. 55 ...... 12... °C/W SOIC8..................................... 90 ...... 42... °C/W MP6231/MP6232 Rev. 1.2 3/31/2010 (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7， 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES ELECTRICAL CHARACTERISTICS (4) VIN=5V, TA=+25°C, unless otherwise noted. Parameter Condition IN Voltage Range Min Typ Max Units 5.5 V 90 120 μA 140 160 μA 2.7 One Channel Enabled, IOUT=0, One Switch ON Both Channels Enabled, IOUT=0, Both Switches ON Device Disable, VOUT=float, VIN=5.5V Device Disable, VIN=5.5V Supply Current Supply Current Shutdown Current Off Switch Leakage Current Limit 1 1 550 Trip Current Under-voltage Lockout Under-voltage Hysteresis FET On Resistance EN Input Logic High Voltage EN Input Logic Low Voltage FLAG Output Logic Low Voltage FLAG Output High Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis Current Ramp (slew rate≤100A/s) on Output Rising Edge ISINK=5mA VIN=VFLAG=5.5V Turn Off Time, Toff CL=100μF, RL=11Ω FLAG Deglitch Time ENx Input Leakage Reverse Leakage Current 250 85 1100 mA 1.6 A 2.65 0.8 0.4 V mV mΩ V V V 1 μA 0.5 0.5 3 °C °C ms ms ms ms ms 10 ms 15 ms μA μA 130 2 Turn On Time, Ton VOUT Falling Time, Tf 1.95 IOUT=100mA , and -40°C<TA<85°C VIN=5.5V, CL=1μF, RL=11Ω VIN=2.7V, CL=1μF, RL=11Ω VIN=5.5V, CL=1μF, RL=11Ω VIN=2.7V, CL=1μF, RL=11Ω CL=100μF, RL=11Ω VOUT Rising Time, Tr 1.2 μA μA 140 20 0.9 1.7 4 OUTX=5.5V, IN=GND 8 1 0.2 Notes: 4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 3 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES PIN FUNCTIONS MP6231/MP6232 SOIC8 SOIC8E MSOP8E Name Description 1 2 GND IN Ground. Input Voltage. Accepts 2.7V to 5.5V input. 3 EN1 Active Low: (MP6232), Active High: (MP6231) 4 EN2 Active Low: (MP6232), Active High: (MP6231) 5 FLAG2 IN-to-OUT2 Over-current, active-low output flag. Open-Drain. 6 7 OUT2 OUT1 8 FLAG1 IN-to-OUT1 Over-current, active-low output flag. Open-Drain. IN-to-OUT2 Power-Distribution Switch Output. IN-to-OUT1 Power-Distribution Switch Output TYPICAL PERFORMANCE CHARACTERISTICS TA = +25ºC, unless otherwise noted. OUTX RL tf tr CL VO(OUTX) 90% 10% 90% 10% TEST CIRCUIT 50% 50% 50% VI(ENX) 50% VI(ENX) toff ton VO(OUTX) 90% ton VO(OUTX) 10% toff 90% 10% VOLTAGE WAVEFORMS Figure 1—Test Circuit and Voltage Waveforms MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 4 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES TYPICAL PERFORMANCE CHARACTERISTICS VIN=5.5V, CL = 1µF, TA = +25ºC, unless otherwise noted. Supply Current, Output Enabled vs. Input Voltage 4 TURN OFF DELAY (ms) 3 2.5 2 1.5 1 0.5 0 120 1 100 0.8 80 0.6 60 0.4 40 0.2 20 0 0 2.5 3 3.5 4 4.5 5 5.5 6 2.5 3 INPUT VOLTAGE (V) 4 4.5 5 5.5 Static Drain-Source On-State Resistance vs. Input Voltage IO=0.1A, VIN=5V VEN=5V, IOUT=0.5A 110 100 90 80 70 2.5 15 30 45 60 75 90 THRESHOLD TRIP CURRENT (A) 0.8 0.75 0.7 0.65 5 5.5 INPUT VOLTAGE (V) MP6231/MP6232 Rev. 1.2 3/31/2010 4 4.5 5 5.5 6 6 1.5 VEN=5V 5 5.5 6 Vin=2.7V 80 70 Vin=3.3V 60 Vin=4.5V 50 Vin=5.5V 40 Vin=5V 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Current Limit Response Time vs. Peak Current VEN=5V 45 40 1.4 35 1.3 30 1.2 25 1.1 20 15 1 10 0.9 0.8 2.5 4.5 OUTPUT CURRENT (A) Threshold Trip Current vs. Input Voltage 0.85 4.5 3.5 4 90 INPUT VOLTAGE (V) VEN=5V 4 3 3.5 VEN=5V 120 0.9 3.5 3 Input to Output Voltage vs. Load Current 130 Current Limit vs. Input Voltage 3 2.5 INPUT VOLTAGE (V) 140 AMBIENT TEMPERATURE (0C) 0.6 2.5 6 INPUT VOLTAGE (V) Static Drain-Source On-State Resistance Variation vs. Ambient Temperature 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 -45 -30 -15 0 CURRENT LIMIT (A) 3.5 INPUT TO OUTPUT VOLTAGE (mV) TURN ON DELAY (ms) 3.5 VEN=5V 1.2 5 0 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) 6 0 2 4 6 8 10 12 14 PEAK CURRENT (A) www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 5 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES TYPICAL PERFORMANCE CHARACTERISTICS VIN=5.5V, CL = 1µF, TA = +25ºC, unless otherwise noted. Turn On Delay and Rise Time with 0.1uF Load Turn Off Delay and Fall Time with 0.1uF Load VEN=5V, CL=0.1uF VEN=5V, CL=0.1uF VOUT 2V/div VOUT 2V/div EN 5V/div EN 5V/div VOUT 2V/div EN 5V/div 1s/div Short Circuit Current Device Enabled into Short Threshold Trip Current with Ramped Load on Enabled Device VEN=5V, CL=1uF VEN=5V, CL=1uF VOUT 2V/div VOUT 2V/div IOUT 200mA/div EN 5V/div EN 5V/div IOUT 500mA/div 4ms/div Ramped Load on Enabled Device VEN=5V, CL=1uF Flag 5V/div Flag 5V/div IOUT 200mA/div IOUT 500mA/div EN 5V/div 2ms/div MP6231/MP6232 Rev. 1.2 3/31/2010 1ms/div IOUT 1A/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2ms/div 6 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES FUNCTION BLOCK DIAGRAM Figure 2—Functional Block Diagram DETAILED DESCRIPTION Over Current When the load exceeds trip current (minimum threshold current triggering constant-current mode) or a short is present, MP6231/MP6232 switches into to a constant-current mode (current limit value). MP6231/MP6232 will be shutdown only if the overcurrent condition stays long enough to trigger thermal protection. Trigger overcurrent protection for different overload conditions occurring in applications: 1) The output has been shorted or overloaded before the device is enabled or input applied. MP6231/MP6232 detects the short or overload and immediately switches into a constant-current mode. 2) A short or an overload occurs after the device is enabled. After the current-limit circuit has been tripped (reached the trip current threshold), the device switches into constantcurrent mode. However, high current may flow for a short period of time before the current-limit circuit can react. MP6231/MP6232 Rev. 1.2 3/31/2010 3）Output current has been gradually increased beyond the recommended operating current. The load current rises until the trip current threshold is reached or until the thermal limit of the device is exceeded. The MP6231/MP6232 is capable of delivering current up to the trip current threshold without damaging the device. Once the trip threshold has been reached, the device switches into its constant-current mode. Flag Response The FLAG pin is an open drain configuration. This FAULT will report a fail mode after an 8ms deglitch timeout. This is used to ensure that no false fault signals are reported. This internal deglitch circuit eliminates the need for extend components. The FLAG pin is not deglitched during an over temp. or a voltage lockout. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 7 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES Thermal Protection The purpose of thermal protection is to prevent damage in the IC by allowing exceptive current to flow and heating the junction. The die temp. is internally monitored until the thermal limit is reached. Once this temp. is reached, the switch will turn off and allow the chip to cool. The switch has a built-in hysteresis. Under-voltage Lockout (UVLO) This circuit is used to monitor the input voltage to ensure that the MP6231/MP6232 is operating correctly. This UVLO circuit also ensures that there is no operation until the input voltage reaches the minimum spec. Enable The logic pin disables the chip to reduce the supply current. The device will operate once the enable signal reaches the appropriate level. The input is compatible with both COMS and TTL. MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 8 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES APPLICATION INFORMATION Power-Supply Considerations Over 10μF capacitor between IN and GND is recommended. This precaution reduces powersupply transients that may cause ringing on the input and improves the immunity of the device to short-circuit transients. In order to achieve smaller output load transient, placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy. +5V 1 GND 2 IN 3 4 FLAG1 8 7 OUT1 MP6232 EN1 EN2 OUT2 To USB Controller 6 Output 1 Output 2 FLAG2 5 DUAL-CHANNEL Figure 3—Application Circuit MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 9 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES PACKAGE INFORMATION SOIC8E 0.189(4.80) 0.197(5.00) 8 0.124(3.15) 0.136(3.45) 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.213(5.40) NOTE: 0.138(3.51) RECOMMENDED LAND PATTERN MP6231/MP6232 Rev. 1.2 3/31/2010 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 10 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES MSOP8E (EXPOSED PAD) 0.087(2.20) 0.099(2.50) 0.114(2.90) 0.122(3.10) 5 8 0.114(2.90) 0.122(3.10) PIN 1 ID (NOTE 5) 0.187(4.75) 0.199(5.05) 0.062(1.58) 0.074(1.88) Exposed Pad 0.010(0.25) 0.014(0.35) 4 1 0.0256(0.65)BSC BOTTOM VIEW TOP VIEW GAUGE PLANE 0.010(0.25) 0.030(0.75) 0.037(0.95) 0.043(1.10)MAX SEATING PLANE 0.002(0.05) 0.006(0.15) FRONT VIEW NOTE: 0.181(4.60) 0.040(1.00) 0.016(0.40) 0.016(0.40) 0.026(0.65) SIDE VIEW 0.100(2.54) 0.075(1.90) 0o-6o 0.004(0.10) 0.008(0.20) 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) PIN 1 IDENTIFICATION HAS HALF OR FULL CIRCLE OPTION. 6) DRAWING MEETS JEDEC MO-187, VARIATION AA-T. 7) DRAWING IS NOT TO SCALE. 0.0256(0.65)BSC RECOMMENDED LAND PATTERN MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 11 MP6231/MP6232 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES SOIC8 0.189(4.80) 0.197(5.00) 8 0.050(1.27) 0.024(0.61) 5 0.063(1.60) 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" 0.050(1.27) BSC SIDE VIEW FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6231/MP6232 Rev. 1.2 3/31/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 12