FNB51560T1 Motion SPM® 55 Series Features General Description • UL Certified No. E209204 (UL1557) FNB51560T1 is a Motion SPM 55 module providing a fully-featured, high-performance inverter output stage for AC Induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts, inter-lock function, over-current shutdown, thermal monitoring of drive IC, and fault reporting. The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate inputs to the high-voltage, high-current drive signals required to properly drive the module's robust shortcircuit-rated IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. • 600 V - 15 A 3-Phase IGBT Inverter Including Control IC for Gate Drive and Protections • Low-Loss, Short-Circuit Rated IGBTs • Separate Open-Emitter Pins from Low-Side IGBTs for Three-Phase Current Sensing • Active-HIGH interface, works with 3.3 / 5 V Logic, Schmitt-trigger Input • HVIC for Gate Driving, Under-Voltage and Short-Circuit Current Protection • Fault Output for Under-Voltage and Short-Circuit Current Protection • Inter-Lock Function to Prevent Short-Circuit • Shut-Down Input • HVIC Temperature-Sensing Built-In for Temperature Monitoring • Optimized for 15 kHz Switching Frequency • Isolation Rating: 1500 Vrms / min. Applications • Motion Control - Home Appliance / Industrial Motor Related Resources Figure 1. 3D Package Drawing (Click to Activate 3D Content) Package Marking and Ordering Information Device Device Marking Package Packing Type Quantity FNB51560T1 FNB51560T1 SPMFA-B20 RAIL 13 ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 1 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series September 2014 FNB51560T1 Motion SPM® 55 Series Integrated Power Functions • 600 V - 15 A IGBT inverter for three phase DC / AC power conversion (Please refer to Figure 3) Integrated Drive, Protection and System Control Functions • For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting control circuit Under-Voltage Lock-Out (UVLO) protection • For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP) control supply circuit Under-Voltage Lock-Out (UVLO) protection • Fault signaling: corresponding to UVLO (low-side supply) and SC faults • Input interface: High-active interface, works with 3.3 / 5 V logic, Schmitt trigger input Pin Configuration Figure 2. Top View ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 2 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Pin Descriptions Pin Number Pin Name Pin Description 1 P 2 U, VS(U) Output for U Phase 3 V, VS(V) Output for V Phase 4 W, VS(W) Output for W Phase 5 NU Negative DC-Link Input for U Phase 6 NV Negative DC-Link Input for V Phase 7 NW Negative DC-Link Input for W Phase Positive DC-Link Input 8 IN(UL) Signal Input for Low-Side U Phase 9 IN(UH) Signal Input for High- ide U Phase 10 IN(VL) Signal Input for Low-Side V Phase 11 IN(VH) Signal Input for High-Side V Phase 12 IN(WL) Signal Input for Low-Side W Phase 13 IN(WH) Signal Input for High-Side W Phase 14 VDD Common Bias Voltage for IC and IGBTs Driving 15 COM Common Supply Ground Capacitor (Low-Pass Filter) for Short-circuit Current Detection Input 16 CSC 17 VF Fault Output, Shut-Down Input, Temperature Output of Drive IC 18 VB(W) High-Side Bias Voltage for W-Phase IGBT Driving 19 VB(V) High-Side Bias Voltage for V-Phase IGBT Driving 20 VB(U) High-Side Bias Voltage for U-Phase IGBT Driving ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 3 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Internal Equivalent Circuit and Input/Output Pins P V B(W) IN(WH) IN(WL) VB HIN LIN HO VS W,Vs(W) LO Nw V B(V) IN(VH) IN(VL) VB HIN LIN HO VS V,Vs(V) LO V B(U) IN(UH) IN(UL) Nv VB HIN LIN HO VF VF Csc V DD COM Csc VDD COM VS U,Vs(U) LO Nu Figure 3. Internal Block Diagram Note: 1. Inverter high-side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT. 2. Inverter low-side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT. It has gate drive and protection functions. 3. Single drive IC has gate driver for six IGBTs and protection functions. 4. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals. ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 4 www.fairchildsemi.com unless otherwise specified.) Inverter Part Symbol VPN VPN(Surge) VCES Parameter Conditions Supply Voltage Applied between P - NU, NV, NW Supply Voltage (Surge) Applied between P - NU, NV, NW Rating Unit 450 V Collector - Emitter Voltage 500 V 600 V ± IC Each IGBT Collector Current TC = 25°C, TJ ＜ 150°C 15 A ± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ ＜ 150°C, Under 1 ms Pulse Width 30 A PC Collector Dissipation TC = 25°C per Chip 22 W TJ Operating Junction Temperature (Note 5) -40 ~ 150 °C Rating Unit Note: 5. The maximum junction temperature rating of the power chips integrated within the Motion SPM® 55 product is 150°C. Control Part Symbol Parameter Conditions VDD Control Supply Voltage Applied between VDD - COM 20 V VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) 20 V VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VDD +0.3 V VF Fault Supply Voltage Applied between VF - COM -0.3 ~ VDD +0.3 V IF Fault Current Sink Current at VF pin Current Sensing Input Voltage Applied between CSC - COM VSC 5 mA -0.3 ~ VDD +0.3 V Rating Unit 400 V Total System Symbol VPN(PROT) Parameter Self Protection Supply Voltage Limit (Short Circuit Protection Capability) TSTG Storage Temperature VISO Isolation Voltage Connect Pins to Heat Sink Plate Conditions VDD = VBS = 13.5 ~ 16.5 V TJ = 150°C, Non-Repetitive, < 2 μs -40 ~ 125 °C 1500 Vrms Typ. Max. Unit AC 60 Hz, Sinusoidal, 1 Minute Thermal Resistance Symbol Rth(j-c)Q Parameter Junction to Case Thermal Resistance Rth(j-c)F Conditions Min. Inverter IGBT part (per 1 / 6 module) - - 5.6 °C / W Inverter FWD part (per 1 / 6 module) - - 6.9 °C / W Note: 6. For the measurement point of case temperature (TC), please refer to Figure 2. ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 5 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Absolute Maximum Ratings (TJ = 25°C, unless otherwise specified.) Inverter Part Symbol VCE(SAT) VF HS tON Parameter Conditions Min. Typ. Max. Unit Collector - Emitter Saturation VDD = VBS = 15 V Voltage VIN = 5 V IC = 10 A TJ = 25°C - 1.9 2.2 V TJ = 150°C - 2.1 - V FWDi Forward Voltage TJ = 25°C - 2.0 2.45 V TJ = 150°C - 1.9 - V - 660 - ns - 160 - ns - 680 - ns - 60 - ns VIN = 0 V IF = 10 A Switching Times VPN = 400 V, VDD = VBS = 15 V, IC = 15A TJ = 25°C VIN = 0 V ↔ 5 V, Inductive load (Note 7) tC(ON) tOFF tC(OFF) - 40 - ns - 700 - ns - 240 - ns - 770 - ns tC(OFF) - 110 - ns trr - 40 - ns - - 1 mA trr LS VPN = 400 V, VDD = VBS = 15 V, IC = 15A TJ = 25°C VIN = 0 V ↔ 5 V, Inductive load (Note 7) tON tC(ON) tOFF Collector - Emitter Leakage VCE = VCES Current ICES Note: 7. tON and tOFF include the propagation delay of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Figure 4. 100% I C 100% I C t rr V CE IC IC V CE V IN V IN t ON t OFF t C(ON) t C(OFF) 10% I C V IN(ON) 90% I C V IN(OFF) 10% V CE 10% V CE 10% I C (b) turn-off (a) turn-on Figure 4. Switching Time Definition ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 6 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Electrical Characteristics (TJ = 25°C, Symbol Parameter Min. Typ. Max. Unit IQDD Quiescent VDD Supply Current VDD = 15 V, IN(UH,VH,WH,UL,VL,WL) = 0 V VDD - COM - 2.3 3.4 mA IPDD Operating VDD Supply Current VDD = 15 V, fPWM = 20 kHz, duty = VDD - COM 50%, applied to one PWM signal input - 2.7 4.0 mA IQBS Quiescent VBS Supply Current VBS = 15 V, IN(UH, VH, WH) = 0 V VB(U) - VS(U), VB(V) VS(V), VB(W) - VS(W) - 60 100 μA IPBS Operating VBS Supply Current VDD = VBS = 15 V, fPWM = 20 kHz, VB(U) - VS(U), VB(V) duty = 50%, applied to one PWM VS(V), VB(W) - VS(W) signal input for high - side - 430 600 μA VFH Fault Output Voltage VSC = 0 V, VF Circuit: 4.7 kΩ to 5 V Pull-up 4.5 - - V VSC = 1 V, VF Circuit: 4.7 kΩ to 5 V Pull-up VFL VSC(ref) Short-Circuit Trip Level VDD = 15 V (Note 4) UVDDD UVDDR UVBSD Conditions Supply Circuit Under-Voltage Protection UVBSR 11.5 13.0 V 12.0 13.5 V Detection level 9.5 11.0 12.5 V Reset level 10.0 11.5 13.0 V 70 95 120 μA - 4.55 40 100 - μs - - 2.4 V 0.8 - - V - - 2.4 V 0.8 - - V HVIC Temperature Sensing Voltage VDD = VBS = 15 V, THVIC = 25°C, 4.7 kΩ to 5 V Pull-up (Figure. 5) VFSDH Shut-down High Input VIN(ON) ON Threshold Voltage VIN(OFF) OFF Threshold Voltage V 10.5 VFT Shut-down Low Input V 10.0 VDD = VBS = 15 V, THVIC = 25°C Fault-Out Pulse Width 0.5 0.55 Detection level HVIC Temperature Sensing Current tFOD 0.5 Reset level IFT VFSDL 0.45 Applied between VF - COM Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM V Note: 8. Short-circuit protection is functioning for all six IGBTs. Figure. 5. V-T Curve of Temperature Output of IC (5V pull-up with 4.7kohm) ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 7 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Control Part Symbol Parameter Conditions Applied between P - NU, NV, NW Min. Typ. Max. Unit - 300 400 V VPN Supply Voltage VDD Control Supply Voltage Applied between VDD - COM 14.0 15 16.5 V VBS High - Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W) 13.0 15 18.5 V -1 - 1 V / μs dVDD / dt, Control Supply Variation dVBS / dt tdead Blanking Time for Preventing Arm - Short For each input signal 0.5 - - μs fPWM PWM Input Signal - 40°C ＜ TJ ＜ 150°C - - 20 kHz VSEN Voltage for Current Sensing Applied between NU, NV, NW - COM (Including surge voltage) -4 4 V Minimun Input Pulse Width (Note 9) 0.7 - - μs 0.7 - - PWIN(ON) PWIN(OFF) Note: 9. This product might not make response if input pulse width is less than the recommanded value. 5 V L in e (M C U o r C o n tro l p o w e r) R P F = 4 .7 kΩ SPM IN (U H ) , IN (V H ) , IN (W H ) IN (U L ) , IN (V L ) , IN (W L) MCU V F COM Note: 10. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s printed circuit board. The input signal section of the SPM 55 product integrates 5 kΩ (typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. Figure 6. Recommended MCU I/O Interface Circuit ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 8 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Recommended Operating Conditions Parameter Device Flatness Mounting Torque Conditions See Figure 7 Min. Typ. Max. Unit -50 - 100 μm Mounting Screw: - M3 Recommended 0.7 N • m 0.6 0.7 0.8 N•m Note Figure 8 Recommended 7.1 kg • cm 5.9 6.9 7.9 kg • cm - 6.0 - g Weight Figure 7. Flatness Measurement Position Figure 8. Mounting Screws Torque Order Note: 11. Do not make over torque when mounting screws. Much mounting torque may cause package cracks, as well as bolts and Al heat-sink destruction. 12. Avoid one side tightening stress. Figure 10 shows the recommended torque order for mounting screws. Uneven mounting can cause the ceramic substrate of the Motion SPM 55 product to be damaged. The Pre-screwing torque is set to 20 ~ 30 % of maximum torque rating. ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 9 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series Mechanical Characteristics and Ratings FNB51560T1 Motion SPM® 55 Series Time Charts of Protective Function Input Signal Protection Circuit State RESET SET RESET UVDDR a1 Control Supply Voltage a6 UVDDD a3 a2 a7 a4 Output Current a5 Fault Output Signal a1 : Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied. a2 : Normal operation: IGBT ON and carrying current. a3 : Under voltage detection (UVDDD). a4 : IGBT OFF in spite of control input condition. a5 : Fault output operation starts. a6 : Under voltage reset (UVDDR). a7 : Normal operation: IGBT ON and carrying current. Figure 9. Under-Voltage Protection (Low-Side) Input Signal Protection Circuit State RESET SET RESET UVBSR Control Supply Voltage b5 b1 UVBSD b3 b6 b2 b4 Output Current High-level (no fault output) Fault Output Signal b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2 : Normal operation: IGBT ON and carrying current. b3 : Under voltage detection (UVBSD). b4 : IGBT OFF in spite of control input condition, but there is no fault output signal. b5 : Under voltage reset (UVBSR) b6 : Normal operation: IGBT ON and carrying current Figure 10. Under-Voltage Protection (High-Side) ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 10 www.fairchildsemi.com c6 Protection Circuit state SET Internal IGBT Gate-Emitter Voltage FNB51560T1 Motion SPM® 55 Series Lower arms control input c7 RESET c4 c3 c2 SC c1 c8 Output Current SC Reference Voltage Sensing Voltage of the shunt resistance Fault Output Signal c5 CR circuit time constant delay (with the external shunt resistance and CR connection) c1 : Normal operation: IGBT ON and carrying current. c2 : Short circuit current detection (SC trigger). c3 : Hard IGBT gate interrupt. c4 : IGBT turns OFF. c5 : Input “L” : IGBT OFF state. c6 : Input “H”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON. c7 : IGBT OFF state Figure 11. Short-Circuit Protection Hin Lin d3 d4 d5 Ho d1 Hin : High-side Input Signal Lin : Low-side Input Signal Ho : High-side IGBT Gate Voltage Lo : Low-side IGBT Gate Voltage /Fo : Fault Output d2 Lo /Fo d1 : High Side First - Input - First - Output Mode d2 : Low Side Noise Mode : No Lo d3 : High Side Noise Mode : No Ho d4 : Low Side First - Input - First - Output Mode d5 : In - Phase Mode : No Ho Figure 12. Inter-Lock Function ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 11 www.fairchildsemi.com RS (9) IN(UH) Gating UH OUT(UH) IN(UH) (19) VB(V) CBS (11) IN(VH) Gating VH IN(VH) V (3) M VB(W) CBSC RS (13) IN(WH) Gating WH IN(WH) (14) VDD 15V line CPS OUT(VH) VS(V) (18) VB(W) M C U U (2) VS(U) VB(V) CBSC RS CBS P (1) VB(U) CBSC CPS CPS CSP15 CSPC15 CDCS OUT(WH) VDC VDD VS(W) (15) COM W (4) COM 5V line OUT(UL) RPF NU (5) CSPC05 CSP05 RS (17) VF Fault CBPF CPF RS (8) IN(UL) RS (10) IN(VL) RS (12) IN(WL) Gating UL Gating VL RSU VF Gating WL CSC RF Input Signal for Short-Circuit Protection NV (6) RSV IN(VL) IN(WL) OUT(WL) (16) CSC CPS CPS CPS OUT(VL) IN(UL) CSC NW (7) RSW U-Phase Current V-Phase Current W-Phase Current Temp. Monitoring Note: 1) To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 ~ 3 cm) 2) By virtue of integrating an application specific type of HVIC inside the SPM® 55 product, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible. 3) VF is open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 5 mA. Please refer to Figure 14. 4) CSP15 of around seven times larger than bootstrap capacitor CBS is recommended. 5) Input signal is active-HIGH type. There is a 5 kΩ resistor inside the IC to pull down each input signal line to GND. RC coupling circuits is recommanded for the prevention of input signal oscillation. RSCPS time constant should be selected in the range 50 ~ 150 ns. (Recommended RS = 100 Ω, CPS = 1 nF) 6) To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible. 7) In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5 ~ 2 μs. 8) The connection between control GND line and power GND line which includes the NU, NV, NW must be connected to only one point. Please do not connect the control GND to the power GND by the broad pattern. Also, the wiring distance between control GND and power GND should be as short as possible. 9) Each capacitor should be mounted as close to the pins of the Motion SPM 55 product as possible. 10) To prevent surge destruction, the wiring between the smoothing capacitor and the P and GND pins should be as short as possible. The use of a high frequency non-inductive capacitor of around 0.1 ~ 0.22 μF between the P and GND pins is recommended. 11) Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays. 12) The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals. (Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 Ω) 13) Please choose the electrolytic capacitor with good temperature characteristic in CBS. Also, choose 0.1 ~ 0.2 μF R-category ceramic capacitors with good temperature and frequency characteristics in CBSC. 14) For the detailed information, please refer to the application notes. Figure 13. Typical Application Circuit ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 12 www.fairchildsemi.com FNB51560T1 Motion SPM® 55 Series (20) VB(U) CBS FNB51560T1 Motion SPM® 55 Series Detailed Package Outline Drawings (FNB51560T1, Short Lead) ©2014 Fairchild Semiconductor Corporation FNB51560T1 Rev. C0 13 www.fairchildsemi.com ©2014 Fairchild Semiconductor Corporation www.fairchildsemi.com