PRELIMINARY Integrated Circuit Systems, Inc. ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS844251I-15 is an Ethernet Clock Generator and a member of the HiPerClocksTM HiPerClockS™ family of high performance devices from ICS. The ICS844251I-15 uses an 18pF parallel resonant crystal over the range of 23.2MHz 30MHz. For Ethernet applications, a 25MHz crystal is used. The device has excellent <1ps phase jitter performance, over the 1.875MHz - 20MHz integration range. The ICS844251I-15 is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. • One Differential LVDS output ICS • Crystal oscillator interface, 18pF parallel resonant crystal (23.2MHz - 30MHz) • Output frequency ranges: 116MHz - 150MHz and 580MHz - 750MHz • VCO range: 580MHz - 750MHz • RMS phase jitter @ 125MHz, using a 25MHz crystal (1.875MHz - 20MHz): 0.46ps (typical) • 3.3V or 2.5V operating supply • -40°C to 85°C ambient operating temperature • Available in both standard and lead-free RoHS-compliant packages COMMON CONFIGURATION TABLE Inputs Crystal Frequency (MHz) 25 N 1 Multiplication Value M/N 25 Output Frequency (MHz) 625 25 1 25 666.67 25 5 5 125 25 5 5 133.33 FREQ_SEL 1 M 25 26.667 1 25 0 26.667 0 BLOCK DIAGRAM FREQ_SEL Pulldown XTAL_IN OSC XTAL_OUT PIN ASSIGNMENT Phase Detector VCO 580MHz - 750MHz FREQ_SEL N 0 ÷1 1 ÷5 Q nQ VDDA GND XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VDD Q nQ FREQ_SEL ICS844251I-15 8-Lead TSSOP 4.4mm x 3.0mm x 0.925mm package body G Package Top View M = ÷25 (fixed) The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 844251BGI-15 www.icst.com/products/hiperclocks.html 1 REV. A NOVEMBER 23, 2005 PRELIMINARY ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR Integrated Circuit Systems, Inc. TABLE 1. PIN DESCRIPTIONS Number Name Type Description 1 VDDA Power 2 Power 5 GND XTAL_OUT, XTAL_IN FREQ_SEL 6, 7 nQ, Q Output Differential clock outputs. LVDS interface levels. 8 VDD Power Power supply pin. 3, 4 Input Input Analog supply pin. Power supply ground. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance 4 pF RPULLDOWN Input Pulldown Resistor 51 kΩ 844251BGI-15 Test Conditions Minimum www.icst.com/products/hiperclocks.html 2 Typical Maximum Units REV. A NOVEMBER 23, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, IO (LVDS) Continuous Current Surge Current 10mA 15mA Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter Minimum Typical Maximum Units VDD Power Supply Voltage Test Conditions 3.135 3.3 3.465 V VDDA Analog Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current 100 mA IDDA Analog Supply Current 8 mA TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter Minimum Typical Maximum Units VDD Power Supply Voltage Test Conditions 2.375 2.5 2.625 V 2.375 2.5 2.625 VDDA Analog Supply Voltage IDD Power Supply Current 95 mA IDDA Analog Supply Current 8 mA V TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter VIH Input High Voltage VIL Input Low Voltage IIH Input High Current VDD = VIN = 3.465V or 2.625V IIL Input Low Current VDD = 3.465V or 2.625V, VIN = 0V 844251BGI-15 Test Conditions Minimum Typical Maximum Units VDD = 3.3V 2 VDD + 0.3 V VDD = 2.5V 1.7 VDD + 0.3 V VDD = 3.3V -0.3 0.8 V VDD = 2.5V -0.3 www.icst.com/products/hiperclocks.html 3 -5 0.7 V 150 µA µA REV. A NOVEMBER 23, 2005 PRELIMINARY ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR Integrated Circuit Systems, Inc. TABLE 3D. LVDS DC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VOD Differential Output Voltage 400 mV Δ VOD VOD Magnitude Change TBD mV VOS Offset Voltage Δ VOS VOS Magnitude Change 1.4 V TBD mV TABLE 3E. LVDS DC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter VOD Differential Output Voltage Test Conditions Minimum Typical 400 Maximum Units mV Δ VOD VOD Magnitude Change TBD mV VOS Offset Voltage 1.15 V Δ VOS VOS Magnitude Change TBD mV TABLE 4. CRYSTAL CHARACTERISTICS Parameter Test Conditions Minimum Mode of Oscillation Typical Maximum Units 30 MHz Fundamental Frequency 23.2 Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pF Drive Level 1 mW TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency t jit(Ø) RMS Phase Jitter ( Random); NOTE 1 t R / tF Output Rise/Fall Time Test Conditions Minimum Maximum Units f_SEL = 0 11 6 150 MHz f_SEL = 1 125MHz @ Integration Range: 1.875MHz - 20MHz 625MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% 580 750 MHz odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section. Typical 0.46 ps 0.35 ps 300 ps 50 % TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency tjit(Ø) RMS Phase Jitter ( Random); NOTE 1 t R / tF Output Rise/Fall Time Test Conditions Minimum Maximum Units f_SEL = 0 11 6 150 MHz f_SEL = 1 125MHz @ Integration Range: 1.875MHz - 20MHz 625MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% 580 750 MHz odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section. 844251BGI-15 Typical www.icst.com/products/hiperclocks.html 4 0.46 ps 0.35 ps 300 ps 50 % REV. A NOVEMBER 23, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR TYPICAL PHASE NOISE AT 125MHZ @ 3.3V 0 ➤ -10 Ethernet Filter -20 -40 125MHz -50 RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.46ps (typical) -60 -70 -80 -90 Raw Phase Noise Data -100 -110 ➤ NOISE POWER dBc Hz -30 -120 -130 -140 -150 ➤ -160 -170 -180 -190 100 1k 10k Phase Noise Result by adding Ethernet Filter to raw data 100k 1M 10M 100M OFFSET FREQUENCY (HZ) TYPICAL PHASE NOISE AT 625MHZ @ 3.3V ➤ 0 -10 Ethernet Filter -20 -40 625MHz -50 RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.35ps (typical) -60 -70 -80 Raw Phase Noise Data -90 -100 ➤ NOISE POWER dBc Hz -30 -110 -120 -130 -140 -150 -160 ➤ -170 -180 Phase Noise Result by adding Ethernet Filter to raw data -190 100 1k 10k 100k 1M 10M 100M OFFSET FREQUENCY (HZ) 844251BGI-15 www.icst.com/products/hiperclocks.html 5 REV. A NOVEMBER 23, 2005 PRELIMINARY ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR Integrated Circuit Systems, Inc. PARAMETER MEASUREMENT INFORMATION SCOPE Qx 3.3V±5% POWER SUPPLY Qx 2.5V±5% POWER SUPPLY LVDS + Float GND - + Float GND - SCOPE LVDS nQx nQx LVDS 3.3V OUTPUT LOAD AC TEST CIRCUIT LVDS 2.5V OUTPUT LOAD AC TEST CIRCUIT nQ 80% 80% Q VSW I N G Clock Outputs t PW 20% 20% t tF tR odc = PERIOD t PW x 100% t PERIOD OUTPUT RISE/FALL TIME OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD Phase Noise Plot Noise Power VDD V DD out LVDS ➤ DC Input Phase Noise Mask ➤ out Offset Frequency f2 ➤ f1 VOS/Δ VOS RMS Jitter = Area Under the Masked Phase Noise Plot OFFSET VOLTAGE SETUP RMS PHASE JITTER VDD V DD ➤ out ➤ LVDS 100 VOD/Δ VOD out ➤ DC Input DIFFERENTIAL OUTPUT VOLTAGE SETUP 844251BGI-15 www.icst.com/products/hiperclocks.html 6 REV. A NOVEMBER 23, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS844251I-15 provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10Ω resistor along with a 10μF and a .01μF bypass capacitor should be connected to each VDDA pin. The 10Ω resistor can also be replaced by a ferrite bead. 3.3V or 2.5V VDD .01μF 10 Ω VDDA .01μF 10μF FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE The ICS844251I-15 has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 25MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. XTAL_IN C1 X1 Crystal XTAL_OUT C2 Figure 2. CRYSTAL INPUt INTERFACE 844251BGI-15 www.icst.com/products/hiperclocks.html 7 REV. A NOVEMBER 23, 2005 PRELIMINARY ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR Integrated Circuit Systems, Inc. 3.3V, 2.5V LVDS DRIVER TERMINATION A general LVDS interface is shown in Figure 3. In a 100Ω differential transmission line environment, LVDS drivers require a matched load termination of 100Ω across near the receiver input. 2.5V or 3.3V VDD LVDS_Driv er + R1 100 - 100 Ohm Differential Transmission Line FIGURE 3. TYPICAL LVDS DRIVER TERMINATION 844251BGI-15 www.icst.com/products/hiperclocks.html 8 REV. A NOVEMBER 23, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR RELIABILITY INFORMATION TABLE 6. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TRANSISTOR COUNT The transistor count for ICS844251I-15 is: 2398 844251BGI-15 www.icst.com/products/hiperclocks.html 9 REV. A NOVEMBER 23, 2005 PRELIMINARY ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX FOR 8 LEAD TSSOP TABLE 7. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum N Maximum 8 A -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 E E1 3.10 6.40 BASIC 4.30 e 4.50 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 844251BGI-15 www.icst.com/products/hiperclocks.html 10 REV. A NOVEMBER 23, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS844251I-15 FEMTOCLOCKS™ CRYSTAL-TO-LVDS CLOCK GENERATOR TABLE 8. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS844251BGI-15 4BI15 8 Lead TSSOP tube -40°C to 85°C ICS844251BGI-15T 4BI15 8 Lead TSSOP 2500 tape & reel -40°C to 85°C ICS844251BGI-15LF TB D 8 Lead "Lead-Free" TSSOP tube -40°C to 85°C ICS844251BGI-15LFT TBD 8 Lead "Lead-Free" TSSOP 2500 tape & reel -40°C to 85°C NOTE: Par ts thar are ordered with an "LF" suffix to the par t number are the Pb-Free configuraiton and are RoHS compliant. The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 844251BGI-15 www.icst.com/products/hiperclocks.html 11 REV. A NOVEMBER 23, 2005