LP5951 www.ti.com SNVS345E – JUNE 2006 – REVISED JANUARY 2011 LP5951 Micropower, 150mA Low-Dropout CMOS Voltage Regulator Check for Samples: LP5951 FEATURES 1 • • • • • • • • • 2 • • Excellent Line Transient Response: ±2mV typ. Excellent PSRR: -60dB at 1kHz typ. Low Quiescent Current of 29µA typ. 1.8 to 5.5V Input Voltage Range Small SC70-5 and SOT-23-5 Packages Fast Turn-on Time of 30µs typ. Typ. < 1nA Quiescent Current in Shutdown Guaranteed 150mA Output Current Output Voltage Range: 1.3V to 3.7V • • Logic Controlled Enable 0.4V/0.9V Good Load Transient Response of 50mVpp typ. Thermal-overload and Short-circuit Protection -40°C to +125°C Junction Temperature Range APPLICATIONS • General Purpose DESCRIPTION The LP5951 regulator is designed to meet the requirements of portable, battery-powered systems providing a regulated output voltage and low quiescent current. When switched to shutdown mode via a logic signal at the Enable pin, the power consumption is reduced to virtually zero. The LP5951 is designed to be stable with small 1µF ceramic capacitors. The LP5951 also features internal protection against short-circuit currents and over-temperature conditions. Performance is specified for a -40°C to 125°C temperature range. The device is available in SOT-23-5 and SC70-5 package. The device is available in fixed output voltages in the range of 1.3V to 3.7V. For availability, please contact your local TI sales office. Typical Application Circuit LP5951 1 VIN VIN 1 PF VOUT 5 1 PF Enable Control, active high 3 NC 4 Load VEN GND 2 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2011, Texas Instruments Incorporated LP5951 SNVS345E – JUNE 2006 – REVISED JANUARY 2011 www.ti.com Connection Diagram Vout 5 Vout 5 NC 4 1 Vin 2 GND 1 Vin 3 EN Figure 1. 5-Lead SOT-23 Package – Top View See Package Number DBV NC 4 2 GND 3 EN Figure 2. 5-Lead SC70 Package – Top View See Package Number DCK PIN DESCRIPTIONS Pin Number Pin Name Description 1 VIN Input Voltage. Input range: 1.8V to 5.5V 2 GND Ground 3 EN Enable pin logic input: Low = shutdown, High = normal operation. This pin should not be left floating. 4 NC No internal connection 5 VOUT Regulated output voltage These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) VIN pin: Voltage to GND -0.3V to 6.5V EN pin: Voltage to GND -0.3V to (VIN+0.3V) with 6.5V max Continuous Power Dissipation (3) Internally Limited Junction Temperature (TJ-MAX ) 150°C Storage Temperature Range -65°C to + 150°C Package Peak Reflow Temperature (10-20 sec.) 240°C Package Peak Reflow Temperature (Pb-free, 10-20 sec.) 260°C ESD Rating (4) Human Body Model: 2.0kV Machine Model 200V (1) (2) (3) (4) 2 Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pin. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 160°C (typ.) and disengages at TJ = 140°C (typ.). The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. (MIL-STD-883 3015.7) Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 LP5951 www.ti.com SNVS345E – JUNE 2006 – REVISED JANUARY 2011 Operating Ratings (1) (2) Input Voltage Range (VIN) 1.8V to 5.5V VEN Input Voltage 0 to (VIN + 0.3V) Junction Temperature (TJ) Range -40°C to + 125°C Ambient Temperature (TA) Range (1) (2) (3) See (3) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pin. In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Thermal Properties Junction-to-Ambient Thermal Resistance (θJA) (1) SOT-23-5 Package 220°C/W SC70-5 Package 415°C/W (1) Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special attention must be paid to thermal dissipation issues in board design. Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 3 LP5951 SNVS345E – JUNE 2006 – REVISED JANUARY 2011 Electrical Characteristics (1) www.ti.com (2) Typical values and limits appearing in standard typeface are for TA = 25°C. Limits appearing in boldface type apply over the full operating temperature range: -40°C ≤ TJ ≤ +125°C. Unless otherwise noted, VIN = VOUT(NOM) + 1V, CIN = 1µF, COUT = 1µF, VEN = 0.9V. Symbol VIN ΔVOUT VDO Parameter Condition Typ Limit Units Min Max Input Voltage VIN ≥ VOUT(NOM) + VDO 1.8 5.5 V Output Voltage Tolerance IOUT = 1mA -30°C ≤ TJ ≤ +125°C -2.0 -3.5 2.0 3.5 % % Line Regulation Error VIN = VOUT(NOM) + 1V to 5.5V IOUT = 1mA Load Regulation Error IOUT = 1mA to 150mA Output Voltage Dropout IOUT = 150mA VOUT ≥ 2.5V VOUT < 2.5V (3) 0.1 %/V -0.01 %/mA 200 250 350 mV mV 29 33 0.005 55 70 1 µA µA µA IQ Quiescent Current VEN = 0.9V, ILOAD = 0 VEN = 0.9V, ILOAD = 150mA VEN = 0V ISC Output Current (short circuit) VIN = VOUT(NOM) + 1V 400 PSRR Power Supply Rejection Ratio Sine modulated VIN f = 100Hz f = 1kHz f = 10kHz 60 60 50 dB dB dB EN Output Noise BW = 10Hz - 100kHz 125 µVRMS TSD Thermal Shutdown 160 °C Temperature Hysteresis 20 °C (1) (2) 150 mA All voltages are with respect to the potential at the GND pin. Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Dropout voltage is defined as the input to output voltage differential at which the output voltage falls to 100mV below the nominal output voltage. This specification does not apply for output voltages below 1.8V. (3) Enable Control Characteristics Symbol Parameter Conditions IEN Maximum Input Current at 0V ≤ VEN ≤ VIN, VIN = 5.5V VEN Input VIL Low Input Threshold (shutdown) VIN = 1.8..5.5V VIH High Input Threshold (enable) VIN = 1.8..5.5V Typical Limit Units Min Max -1 1 µA 0.4 V 0.9 V Transient Characteristics Symbol Parameter Conditions Typical Limit Min Units Max ΔVOUT Dynamic Line Transient VIN = VOUT(NOM) + 1V to VOUT(NOM) + 1V + 0.6V in 30µs, no load ±2 mV ΔVOUT Dynamic Load Transient IOUT = 0mA to 150mA in 10µs IOUT = 150mA to 0mA in 10µs IOUT = 1mA to 150mA in 1µs IOUT = 150mA to 1mA in 1µs -30 20 -50 40 mV mV mV mV ΔVOUT Overshoot on Startup Nominal conditions 10 mV TON Turn on time IOUT = 1mA 30 µs 4 Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 LP5951 www.ti.com SNVS345E – JUNE 2006 – REVISED JANUARY 2011 Output Capacitor, Recommended Specification Symbol Parameter Conditions Value Limit Min COUT Output Capacitance Capacitance (2) IOUT = 150mA, VIN = 5.0V 1.0 ESR (1) (2) (1) Units Max 0.7 47 µF 0.003 0.300 Ω Min and Max limits are guaranteed by design The capacitor tolerance should be 30% or better over temperature. The full operating conditions for the application should be considered when selecting a suitable capacitor to ensure that the minimum value of capacitance is always met. Recommended capacitor type is X7R. However, dependent on application, X5R, Y5V, and Z5U can also be used. The shown minimum limit represents real minimum capacitance, including all tolerances and must be maintained over temperature and dc bias voltage (See capacitor section in Applications Hints) Output Current Derating Maximum Load Current vs VIN - VOUT, TA = 85°C, VOUT = 1.5V Block Diagram VIN Bias Generator EN LDO Core and Reference VOUT Enable Controller Over Current and Thermal Protection GND Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 5 LP5951 SNVS345E – JUNE 2006 – REVISED JANUARY 2011 www.ti.com Typical Performance Characteristics Unless otherwise specified, CIN = 1µF ceramic, COUT = 1µF ceramic, VIN = VOUT(NOM) + 1V, TA = 25°C, Enable pin is tied to VIN. 0 ÂVOUT 150 0 TIME (50 µs/DIV) Figure 3. Figure 4. Line Transient Response Line Transient Response LP5951-3.3 VIN CIN, COUT = 1.0 µF IL = 150 mA (1V/DIV) 2.9 CIN = 1.0 µF COUT = 1.5 µF 4.9 4.3 IL = 150 mA ÂVOUT 2.3 TIME (100 µs/DIV) TIME (100 µs/DIV) Figure 5. Figure 6. Enable Start-up Time Enable Start-up Time IL = 150 mA VEN (500 mV/DIV) (1V/DIV) (500 mV/DIV) (500 mV/DIV) IL = 150 mA LP5951-3.3 VOUT VEN LP5951-1.3 VOUT CIN = 1.0 µF COUT = 1.5 µF (2 mV/DIV) VIN LP5951-3.3 TIME (50 µs/DIV) (2 mV/DIV) (500 mV/DIV) LOAD CURRENT (mA) 150 LP5951-1.3 ÂVOUT CIN, COUT = 1.0 µF (20 mV/DIV) LP5951-1.3 Load Transient Response (20 mV/DIV) ÂVOUT LOAD CURRENT (mA) Load Transient Response TIME (10 µs/DIV) TIME (10 µs/DIV) Figure 7. 6 Figure 8. Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 LP5951 www.ti.com SNVS345E – JUNE 2006 – REVISED JANUARY 2011 Typical Performance Characteristics (continued) Unless otherwise specified, CIN = 1µF ceramic, COUT = 1µF ceramic, VIN = VOUT(NOM) + 1V, TA = 25°C, Enable pin is tied to VIN. 1.0 Output Voltage Change vs Temperature Ground Current vs VIN 40.0 LP5951-1.3 IL = 1 mA IL = 1 mA LP5951-1.3 38.0 0.8 TA = 125oC 34.0 32.0 0.4 IGND (PA) VOUT CHANGE (%) 36.0 0.6 0.2 30.0 TA = 25oC 28.0 26.0 0.0 24.0 22.0 -0.2 TA = -40oC 20.0 -0.4 -40 -20 0 20 40 60 18.0 1.5 80 100 120 2.0 TEMPERATURE (oC) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V) Figure 9. Figure 10. Power Supply Rejection Ratio 0 LP5951-3.3 RIPPLE REJECTION (dB) VIN = 3.8V, IL = 1 mA -20 -40 VIN = 5.5V, IL = 1 mA -60 -80 10 VIN = 5.5V, VIN = 3.8V, IL = 0 mA IL = 0 mA 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 11. Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 7 LP5951 SNVS345E – JUNE 2006 – REVISED JANUARY 2011 www.ti.com APPLICATION HINTS POWER DISSIPATION AND DEVICE OPERATION The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air. As stated (see below (1)) in the electrical specification section, the allowable power dissipation for the device in a given package can be calculated using the equation: PD = (TJ(MAX) - TA) / θJA (1) With a θJA = 220°C/W, the device in the SOT-23-5 package returns a value of 454 mW with a maximum junction temperature of 125°C at TA of 25°C. The actual power dissipation across the device can be estimated by the following equation: PD ≈ (VIN - VOUT) * IOUT (2) This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. These two equations should be used to determine the optimum operating conditions for the device in the application. EXTERNAL CAPACITORS As is common with most regulators, the LP5951 requires external capacitors to ensure stable operation. The LP5951 is specifically designed for portable applications requiring minimum board space and the smallest size components. These capacitors must be correctly selected for good performance. INPUT CAPACITOR An input capacitor is required for stability. It is recommended that a 1.0µF capacitor be connected between the LP5951 input pin and ground (this capacitance value may be increased without limit). This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain ≥0.7µF over the entire operating temperature range. OUTPUT CAPACITOR The LP5951 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric types X7R, Z5U, or Y5V) in the 1.0µF range (up to 47µF) and with ESR between 3 mΩ to 500 mΩ is suitable in the LP5951 application circuit. This capacitor must be located a distance of not more than 1cm from the VOUT pin and returned to a clean analogue ground. It is also possible to use tantalum or film capacitors at the device output, VOUT, but these are not as attractive for reasons of size and cost (see the section CAPACITOR CHARACTERISTICS). (1) 8 In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 LP5951 www.ti.com SNVS345E – JUNE 2006 – REVISED JANUARY 2011 CAPACITOR CHARACTERISTICS The LP5951 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 1µF to 4.7µF, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1µF ceramic capacitor is in the range of 3mΩ to 40mΩ, which easily meets the ESR requirement for stability for the LP5951. For both input and output capacitors, careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly, depending on the operating conditions and capacitor type. CAP VALUE (% of Nom. 1 PF) In particular, the output capacitor selection should take account of all the capacitor parameters, to ensure that the specification is met within the application. The capacitance can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size, with smaller sizes giving poorer performance figures in general. As an example, Figure 12 shows a typical graph comparing different capacitor case sizes in a Capacitance vs. DC Bias plot. As shown in the graph, increasing the DC Bias condition can result in the capacitance value falling below the minimum value given in the recommended capacitor specifications table (0.7µF in this case). Note that the graph shows the capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommended that the capacitor manufacturers’ specifications for the nominal value capacitor are consulted for all conditions, as some capacitor sizes (e.g. 0402) may not be suitable in the actual application. 0603, 10V, X5R 100% 80% 60% 0402, 6.3V, X5R 40% 20% 0 1.0 2.0 3.0 4.0 5.0 DC BIAS (V) Figure 12. Graph Showing A Typical Variation In Capacitance vs DC Bias The ceramic capacitor’s capacitance can vary with temperature. The capacitor type X7R, which operates over a temperature range of -55°C to +125°C, will only vary the capacitance to within ±15%. The capacitor type X5R has a similar tolerance over a reduced temperature range of -55°C to +85°C. Many large value ceramic capacitors, larger than 1µF are manufactured with Z5U or Y5V temperature characteristics. Their capacitance can drop by more than 50% as the temperature varies from 25°C to 85°C. Therefore X7R is recommended over Z5U and Y5V in applications where the ambient temperature will change significantly above or below 25°C. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1µF to 4.7µF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25°C down to -40°C, so some guard band must be allowed. Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 9 LP5951 SNVS345E – JUNE 2006 – REVISED JANUARY 2011 www.ti.com NO-LOAD STABILITY The LP5951 will remain stable and in regulation with no external load. This is an important consideration in some circuits, for example CMOS RAM keep-alive applications. ENABLE OPERATION The LP5951 may be switched ON or OFF by a logic input at the Enable pin, VEN. A logic high at this pin will turn the device on. When the enable pin is low, the regulator output is off and the device typically consumes 5nA. If the application does not require the Enable switching feature, the VEN pin should be tied to VIN to keep the regulator output permanently on. To ensure proper operation, the signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under Enable Control Characteristics, VIL and VIH. FAST TURN OFF AND ON The controlled switch-off feature of the device provides a fast turn off by discharging the output capacitor via an internal FET device. This discharge is current limited by the RDSon of this switch. Fast turn-on is guaranteed by an optimized architecture allowing a very fast ramp of the output voltage to reach the target voltage. SHORT-CIRCUIT PROTECTION The LP5951 is short circuit protected and in the event of a peak over-current condition, the output current through the PMOS will be limited. If the over-current condition exists for a longer time, the average power dissipation will increase depending on the input to output voltage difference until the thermal shutdown circuitry will turn off the PMOS. Please refer to the Thermal Properties section for power dissipation calculations. THERMAL-OVERLOAD PROTECTION Thermal-Overload Protection limits the total power dissipation in the LP5951. When the junction temperature exceeds TJ = 160°C typ., the shutdown logic is triggered and the PMOS is turned off, allowing the device to cool down. After the junction temperature dropped by 20°C (temperature hysteresis), the PMOS is activated again. This results in a pulsed output voltage during continuous thermal-overload conditions. The Thermal-Overload Protection is designed to protect the LP5951 in the event of a fault condition. For normal, continuous operation, do not exceed the absolute maximum junction temperature rating of TJ = +150°C (see Absolute Maximum Ratings). REVERSE CURRENT PATH The internal PFET pass device in LP5951 has an inherent parasitic body diode. During normal operation, the input voltage is higher than the output voltage and the parasitic diode is reverse biased. However, if the output is pulled above the input in an application, then current flows from the output to the input as the parasitic diode gets forward biased. The output can be pulled above the input as long as the current in the parasitic diode is limited to 50mA. For currents above this limit an external Schottky diode must be connected from VOUT to VIN (cathode on VIN, anode on VOUT). EVALUATION BOARDS For availability of evaluation boards, see the LP5951 product folder. For information regarding evaluation boards, see the TI AN-1486 Application Report (SNVA169). 10 Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 LP5951 www.ti.com SNVS345E – JUNE 2006 – REVISED JANUARY 2011 SUGGESTED CAPACITORS AND THEIR SUPPLIERS Capacitance / µF Model Vendor Type Case Size / Inch (mm) 1.0 C1608X5R1A105K TDK Ceramic, X5R 0603 (1608) 1.0 C1005X5R1A105K TDK Ceramic, X5R 0402 (1005) Submit Documentation Feedback Copyright © 2006–2011, Texas Instruments Incorporated Product Folder Links: LP5951 11 PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LP5951MF-1.3 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKRB LP5951MF-1.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKRB LP5951MF-1.5 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKAB LP5951MF-1.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKAB LP5951MF-1.8 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKBB LP5951MF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKBB LP5951MF-2.0 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKCB LP5951MF-2.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKCB LP5951MF-2.5 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKEB LP5951MF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKEB LP5951MF-2.8 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKFB LP5951MF-2.8/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKFB LP5951MF-3.0 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKGB LP5951MF-3.0/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKGB LP5951MF-3.3 ACTIVE SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 LKHB LP5951MF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKHB LP5951MFX-1.3 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKRB LP5951MFX-1.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKRB LP5951MFX-1.5 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKAB Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 9-Mar-2013 Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LP5951MFX-1.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKAB LP5951MFX-1.8 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKBB LP5951MFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKBB LP5951MFX-2.0 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKCB LP5951MFX-2.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKCB LP5951MFX-2.5 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKEB LP5951MFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKEB LP5951MFX-2.8 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKFB LP5951MFX-2.8/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKFB LP5951MFX-3.0 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKGB LP5951MFX-3.0/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKGB LP5951MFX-3.3 ACTIVE SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 125 LKHB LP5951MFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LKHB LP5951MG-1.3 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI -40 to 125 L23 LP5951MG-1.3/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L23 LP5951MG-1.5 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI -40 to 125 L2B LP5951MG-1.5/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L2B LP5951MG-1.8 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI L3B LP5951MG-1.8/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L3B Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 9-Mar-2013 Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LP5951MG-2.0 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI L4B LP5951MG-2.0/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L4B LP5951MG-2.5 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI L5B LP5951MG-2.5/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L5B LP5951MG-2.8 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI L6B LP5951MG-2.8/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L6B LP5951MG-3.0 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI L7B LP5951MG-3.0/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L7B LP5951MG-3.3 ACTIVE SC70 DCK 5 1000 TBD Call TI Call TI LAB LP5951MG-3.3/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LAB LP5951MG-3.7/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L44 LP5951MGX-1.3 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI -40 to 125 L23 LP5951MGX-1.3/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L23 LP5951MGX-1.5 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI -40 to 125 L2B LP5951MGX-1.5/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L2B LP5951MGX-1.8 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI L3B LP5951MGX-1.8/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L3B LP5951MGX-2.0 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI L4B LP5951MGX-2.0/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L4B Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 9-Mar-2013 Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) LP5951MGX-2.5 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI L5B LP5951MGX-2.5/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L5B LP5951MGX-2.8 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI L6B LP5951MGX-2.8/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L6B LP5951MGX-3.0 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI L7B LP5951MGX-3.0/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L7B LP5951MGX-3.3 ACTIVE SC70 DCK 5 3000 TBD Call TI Call TI LAB LP5951MGX-3.3/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM LAB LP5951MGX-3.7/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM L44 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Addendum-Page 4 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LP5951MF-1.3 SOT-23 DBV 5 1000 178.0 8.4 LP5951MF-1.3/NOPB SOT-23 DBV 5 1000 178.0 LP5951MF-1.5 SOT-23 DBV 5 1000 178.0 LP5951MF-1.5/NOPB SOT-23 DBV 5 1000 LP5951MF-1.8 SOT-23 DBV 5 LP5951MF-1.8/NOPB SOT-23 DBV LP5951MF-2.0 SOT-23 DBV LP5951MF-2.0/NOPB SOT-23 W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.5 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.8 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-2.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.0 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.0/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.3 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MF-3.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.3 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.3/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP5951MFX-1.5 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.8 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-1.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.0 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.0/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.5 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.8 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-2.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-3.0 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-3.0/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-3.3 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MFX-3.3/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LP5951MG-1.3 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-1.3/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-1.5 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-1.5/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-1.8 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-1.8/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.0 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.0/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.5 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.5/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.8 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-2.8/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.0 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.0/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.3 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.3/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MG-3.7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.3 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.3/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.5 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.5/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.8 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-1.8/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.0 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.0/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.5 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.5/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.8 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-2.8/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP5951MGX-3.0 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-3.0/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-3.3 SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-3.3/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LP5951MGX-3.7/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP5951MF-1.3 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-1.3/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-1.5 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-1.5/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-1.8 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-1.8/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-2.0 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-2.0/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-2.5 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-2.5/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-2.8 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-2.8/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 Pack Materials-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP5951MF-3.0 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-3.0/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-3.3 SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MF-3.3/NOPB SOT-23 DBV 5 1000 203.0 190.0 41.0 LP5951MFX-1.3 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-1.3/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-1.5 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-1.5/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-1.8 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-1.8/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-2.0 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-2.0/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-2.5 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-2.5/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-2.8 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-2.8/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-3.0 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-3.0/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-3.3 SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MFX-3.3/NOPB SOT-23 DBV 5 3000 206.0 191.0 90.0 LP5951MG-1.3 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-1.3/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-1.5 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-1.5/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-1.8 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-1.8/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-2.0 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-2.0/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-2.5 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-2.5/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-2.8 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-2.8/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-3.0 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-3.0/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-3.3 SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-3.3/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MG-3.7/NOPB SC70 DCK 5 1000 203.0 190.0 41.0 LP5951MGX-1.3 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-1.3/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-1.5 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-1.5/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-1.8 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-1.8/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-2.0 SC70 DCK 5 3000 206.0 191.0 90.0 Pack Materials-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 17-Nov-2012 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP5951MGX-2.0/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-2.5 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-2.5/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-2.8 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-2.8/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-3.0 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-3.0/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-3.3 SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-3.3/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 LP5951MGX-3.7/NOPB SC70 DCK 5 3000 206.0 191.0 90.0 Pack Materials-Page 5 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, 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