APL3204A/B Li+ Charger Protection IC Features General Description • Input Over-Voltage Protection • Programmable Input Over-Current Protection The APL3204A/B provide complete Li+ charger protections against over-voltage, over-current, and battery over- • Battery Over-Voltage Protection • • Over-Temperature Protection High Immunity of False Triggering • tored parameters are over the threshold, the IC removes the power from the charging system by turning off an in- High Accuracy Protection Thresholds • Fault Status Indication ternal switch. All protections also have deglitch time against false triggering due to voltage spikes or current • Enable Input • Available in TDFN4x3-12 Package • Lead Free and Green Devices Available (RoHS Compliant) voltage. The IC is designed to monitor input voltage, input current, and battery voltage. When any of the moni- transients. The APL3204A/B also provide over-temperature protection, a FAULT output pin to indicate the fault conditions, and the EN pin to allow the system to disable the IC. Applications Simplified Application Circuit 5V Adapter or USB Charger Input IN • Smart Phones and PDAs • Digital Still Cameras • Potable Devices OUT APL3204A/B EN FAULT Pin Configuration Charger Output and System ILIM BAT GND Li+ Battery IN 1 12 NC IN 2 11 OUT GND 3 10 OUT EP FAULT 4 9 ILIM NC 5 8 BAT NC 6 7 EN TDFN4X3-12 (Top View) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 1 www.anpec.com.tw APL3204A/B Ordering and Marking Information Package Code QB : TDFN4x3-12 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material L : Lead Free Device G : Halogen and Lead Free Device APL3204A APL3204B Assembly Material Handling Code Temperature Range Package Code APL3204A QB: L04A XXXXX XXXXX - Date Code APL3204B QB: L04B XXXXX XXXXX - Date Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol (Note 1) Parameter Rating Unit VIN IN Input Voltage (IN Pin to GND) -0.3 to 30 V VOUT, VBAT OUT, BAT Pins to GND Voltage -0.3 to 7 V ILIM, FAULT, EN, Pins to GND Voltage -0.3 to 7 V VILIM, VFAULT , VEN, IOUT TJ OUT Output Current 2 Maximum Junction Temperature TSTG Storage Temperature Range TSDR Maximum Lead Soldering Temperature,10 Seconds A 150 o -65 to 150 o 260 o C C C Note 1 : Stresses beyond the absolute maximum rating may damage the device and exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol θJA Parameter Typical Value Unit 80 °C/W Junction to Ambient Thermal Resistance in Free Air TDFN4x3-12 Recommended Operating Conditions Symbol Parameter Range Unit 4.5 to 5.5 V OUT Output Current 0 to 1.5 A TJ Junction Temperature -40 to 125 °C TA Ambient Temperature -40 to 85 °C VIN IN Input Voltage IOUT Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 2 www.anpec.com.tw APL3204A/B Electrical Characteristics Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85°C, unless otherwise specified. Typical values are at TA=25°C. Symbol Parameter Test Conditions APL3204A/B Unit Min. Typ. Max. 2.5 - 2.8 V mV POWER-ON-RESET (POR) AND SUPPLY CURRENT VPOR IN POR Threshold VIN rising IN POR Hysteresis ICC TB(IN) IN Supply Current Input Power-On Blanking Time - 230 - EN = Low - 250 350 EN = High - 100 150 VIN rising to VOUT rising - 8 - ms µA INTERNAL POWER SWITCH AND OUT DISCHARGE RESISTANCE Power Switch On Resistance IOUT = 0.5A - 250 450 mΩ OUT Discharge Resistance VOUT = 3V - 500 - Ω APL3204A, VIN rising 5.67 5.85 6.00 APL3204B, VIN rising 6.60 6.80 7.00 Input OVP Recovery Hysteresis - 200 - Input OVP Propagation Delay - - 1 µs Input OVP Recovery Time - 8 - ms INPUT OVER-VOLTAGE PROTECTION (OVP) VOVP TON(OVP) Input OVP Threshold V mV OVER-CURRENT PROTECTION (OCP) IOCP OCP Threshold RILIM = 25kΩ 930 1000 1070 mA OCP Threshold Accuracy IOCP = 300mA to 1500mA -10 - +10 % TB(OCP) OCP Blanking Time - 176 - µs TON(OCP) OCP Recovery Time - 64 - ms 4.30 4.35 4.4 V Battery OVP Hysteresis - 270 - mV BAT Pin Leakage Current - - 20 nA - 176 - µs EN Input Logic High 1.4 - - V EN Input Logic Low - - 0.4 V EN Internal Pull-Low Resistor - 500 - kΩ BATTERY OVER-VOLTAGE PROTECTION VBOVP IBAT TB(BOVP) Battery OVP Threshold VBAT rising VBAT = 4.4V Battery OVP Blanking Time EN LOGIC LEVELS FAULT LOGIC LEVELS AND DELAY TIME FAULT Output Low Voltage Sink 5mA current - - 0.4 V FAULT Pin Leakage Current VFAULT = 5V - - 1 µA Over-Temperature Threshold - 140 - °C Over-Temperature Hysteresis - 20 - °C OVER-TEMPERATURE PROTECTION (OTP) TOTP Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 3 www.anpec.com.tw APL3204A/B Typical Operating Characteristics Input OVP Threshold vs. Junction Temperature Input OVP Threshold vs. Junction Temperature 7.00 6.00 Input OVP Threshold , VOVP (V) Input OVP Threshold , VOVP (V) APL3204A 5.95 5.90 5.85 VIN Increasing 5.80 5.75 5.70 VIN Decreasing 5.65 5.60 APL3204B 6.95 6.90 6.85 VIN Increasing 6.80 6.75 6.70 6.65 VIN Decreasing 6.60 6.55 6.50 5.55 -50 -25 0 25 50 75 Junction Temperature 100 -50 125 25 50 75 100 125 OCP Threshold vs. Junction Temperature 4.40 1200 4.35 1150 OCP Threshold, IOCP (mA) VBAT Increasing 4.30 4.25 4.20 4.15 4.10 VBAT Decreasing 4.05 1100 1050 1000 950 900 850 4.00 -50 -25 0 25 50 75 100 800 125 -50 -25 Junction Temperature (oC) 0 25 50 75 Junction Temperature IN Supply Current vs. Junction Temperature 100 125 (oC) POR Threshold vs. Junction Temperature 150 2.80 POR Threshold, VPOR (V) IN Supply Current, ICC (µΑ) 0 Junction Temperature (oC ) Battery OVP Threshold vs. Junction Temperature Battery OVP Threshold, VBOVP (V) -25 ( oC ) 125 100 EN = high 75 2.70 VIN Increasing 2.60 2.50 2.40 VIN Decreasing 2.30 50 2.20 -50 -25 0 25 50 75 Junction Temperature Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 100 125 -50 (oC) -25 0 25 50 75 Junction Temperature 4 100 125 (oC) www.anpec.com.tw APL3204A/B Typical Operating Characteristics (Cont.) Power Switch On Resistance vs. Junction Temperature Power Switch On Resistance, RDS,ON (mΩ) Power Switch On Resistance, RDS,ON (Ω) Power Switch On Resistance vs. Input Voltage 0.35 0.30 0.25 0.20 0.15 0.10 3.0 3.5 4.0 4.5 5.0 5.5 6.0 350 300 250 200 150 -50 6.5 -25 0 25 50 75 100 125 o Junction Temperature ( C) Input Voltage, VIN (V) Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 400 5 www.anpec.com.tw APL3204A/B Operating Waveforms Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Normal Power On OVP at Power On VIN = 0 to 12V VIN = 0 to 5V VIN VIN VOUT 1 1 VOUT 2 2 IOUT VFAULT 3 3 COUT =1µF, CIN =1µF, ROUT = 10Ω CH1: VIN, 10V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 2ms/Div COUT =1µF, CIN =1µF, ROUT = 10Ω CH1: VIN, 5V/Div, DC CH2: VOUT, 2V/Div, DC CH3: IOUT, 0.5A/Div, DC TIME: 2ms/Div Input Over-Voltage Pretection Input Over-Voltage Pretection APL3204A APL3204B VIN VIN 1 1 VOUT VOUT 3 3 2 VFAULT 2 VIN = 5V to 12V COUT = 1µF, CIN=1µF, ROUT=50Ω CH1: VIN, 5V/Div, AC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME:20µs/Div Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 VFAULT COUT = 1µF, CIN=1µF, ROUT=50Ω CH1: VIN, 5V/Div, AC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 20µs/Div 6 www.anpec.com.tw APL3204A/B Operating Waveforms (Cont.) Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Battery Over-Voltage Pretection Recovery from Input OVP APL3204B VBAT VIN 1 1 VOUT VOUT 2 2 VFAULT VFAULT 3 3 VIN = 12V to 5V COUT = 1µF, CIN=1µF, ROUT=50Ω CH1: VIN, 5V/Div, AC CH2: VOUT, 5V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 2ms/Div VBAT = 3.6V to 4.4V to 3.6V, ROUT=33.3Ω COUT =1µF, CIN =1µF CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 5ms/Div Recovery from Battery OVP Battery Over-Voltage Pretection VBAT VBAT 1 VOUT 1 VOUT 2 2 VFAULT VFAULT 3 3 VBAT = 4.4V to 3.6V, ROUT=33.3Ω COUT =1µF, CIN =1µF CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 50µs/Div VBAT = 3.6V to 4.4V, R OUT=33.3Ω COUT =1µF, CIN =1µF CH1: VBAT, 2V/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 50µs/Div Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 7 www.anpec.com.tw APL3204A/B Operating Waveforms (Cont.) Refer to the typical application circuit. The test condition is VIN=5V, TA= 25oC unless otherwise specified. Over-Current Pretection Over-Current Pretection VIN IOUT 1 1 2 VOUT VOUT 2 IOUT 3 VFAULT 3 VFAULT 4 COUT =1µF, CIN =1µF, ROUT = 2.5Ω CH1: VIN, 5V/Div, DC CH2: VOUT, 5V/Div, DC CH3: IOUT, 0.5A/Div, DC CH4: VFAULT, 5V/Div, DC TIME: 200ms/Div COUT =1µF, CIN =1µF, IOUT = 0.5A to 1.2A CH1: IOUT, 0.5A/Div, DC CH2: VOUT, 2V/Div, DC CH3: VFAULT, 5V/Div, DC TIME: 50µs/Div Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 8 www.anpec.com.tw APL3204A/B Pin Description PIN FUNCTION NO. NAME 1,2 IN 3 GND 5,6,12 NC 4 FAULT 7 EN Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device. 8 BAT Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor. 9 ILIM Over-current Protection Setting Pin. Connect a resistor to GND to set the over-current threshold. 10,11 OUT Output Voltage Pin. The output voltage follows the input voltage when no fault is detected. - EP Power Supply Input. Ground. No Connection. Fault Indication Pin. This pin goes low when input OVP, OCP, or battery OVP is detected. Exposed Thermal Pad. Must be electrically connected to the GND pin. Block Diagram OUT IN POR ILIM Charge Pump 0.5V Gate Driver and Control Logic 1.2V 1V BAT FAULT OTP EN Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 GND 9 www.anpec.com.tw APL3204A/B Typical Application Circuit 5V Adapter/ USB 1, 2 IN OUT 10, 11 1µF Charger 1µF APL3204A/B FAULT 50K 4 VIO MCU 50K 7 GPIO EN 25K 9 50K 8 ILIM BAT GND 100K 3 Li+ Battery Figure 1. The Typical Protection Circuit for Charger Systems. Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 10 www.anpec.com.tw APL3204A/B Function Description Power-Up The APL3204A/B have a built-in power-on-reset circuit to keep the output shuting off until internal circuitry is oper- the internal power FET is turned off. When the BP voltage returns below the battery OVP threshold minus the ating properly. The POR circuit has hysteresis and a deglitch feature so that it will typically ignore undershoot hysteresis, the FET is turned on again. The APL3204A/B have a built-in counter. When the total count of battery transients on the input. When input voltage exceeds the POR threshold and after 8ms blanking time, the output OVP fault reaches 16, the FET is turned off permanently, requiring either a VIN POR or EN re-enable again to restart. voltage starts a soft-start to reduce the inrush current. Input Over-Voltage Protection (OVP) Over-Temperature Protection The input voltage is monitored by the internal OVP circuit. When the junction temperature exceeds 140οC, the inter- When the input voltage rises above the input OVP threshold, the internal FET will be turned off within 1µs to nal thermal sense circuit turns off the power FET and allows the device to cool down. When the device’s junc- protect connected system on OUT pin. When the input voltage returns below the input OVP threshold minus the tion temperature cools by 20οC, the internal thermal sense circuit will enable the device, resulting in a pulsed output hysteresis, the FET is turned on again after 8ms recovery time. The input OVP circuit has a 200mV hysteresis and during continuous thermal protection. Thermal protection is designed to protect the IC in the event of over tem- a recovery time of TON(OVP) to provide noise immunity against transient conditions. perature conditions. For normal operation, the junction temperature cannot exceed TJ=+125 οC. Over-Current Protection (OCP) FAULT Output The output current is monitored by the internal OCP circuit. The APL3204A/B provide an open-drain output to indi- When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If cate that a fault has occurred. When any of input OVP, OCP, battery OVP, is detected, the FAULT goes low to the OCP condition continues for a blanking time of TB(OCP), the internal power FET is turned off. After the recovery indicate that a fault has occurred. Since the FAULT pin is an open-drain output, connecting a resistor to a pull high time of TON(OCP), the FET will be turned on again and the output current is monitored again. The APL3204A/B have voltage is necessary. a built-in counter. When the total count of OCP fault reaches 16, the FET is turned off permanently, requiring Enable/Shutdown Pull the EN pin voltage above 1.4V to disable the device either a VIN POR or EN re-enable again to restart. The OCP threshold is programmed by a resistor RILIM con- and pull EN pin voltage below 0.4V to enable the device. The EN pin has an internal pull-down resistor and can be nected from ILIM pin to GND. The OCP threshold is calculated by the following equation: IOCP = left floating. When the IC is latched off due to the total count of OCP or battery OVP reaches 16, disable and re- KILIM RILIM enable the device with the EN pin can clear the counter. where KILIM=25000AΩ Battery Over-Voltage-Protection The APL3204A/B monitor the BAT pin voltage for battery over-voltage protection. The battery OVP threshold is internally set to 4.35V. When the BAT pin voltage exceeds the battery OVP threshold for a blanking time of TB(BOVP), Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 11 www.anpec.com.tw APL3204A/B Function Description (Cont.) VOVP VPOR VIN VOUT VFAULT TB(IN) TON(OVP) Figure2. OVP Timing Chart VOUT OCP Threshold Count 13 times IOUT VFAULT TB(OCP) TON(OCP) TB(OCP) TB(OCP) Total count 16 times IC is latched off Figure 3 OCP Timing Chart Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 12 www.anpec.com.tw APL3204A/B Function Description (Cont.) VBAT VBOVP VBOVP VBOVP Count 13 times VOUT VFAULT TB(BOVP) TB(BOVP) TB(BOVP) Total count 16 times IC is latched off Figure 4. Battery OVP Timing Chart Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 13 www.anpec.com.tw APL3204A/B Application Information RBAT Selection RUP FAULT VIO Connect the BAT pin to the positive terminal of battery RFAULT through a resistor RBAT for battery OVP function. The RBAT limits the current flowing from BAT to battery in case of GPIO BAT pin is shorted to VIN pin under a failure mode. The recommended value of RBAT is 100kΩ. In the worse case EN of an IC failure, the current flowing from the BAT pin to the battery is: BAT REN MCU GPIO RBAT Li+ Battery (30V-3V)/ 100kΩ =270µA where the 30V is the maximum IN voltage and the 3V is the minimum battery voltage. The current is so small and can be absorbed by the charger system. Figure 5. RUP, RFAULT, REN and RBAT The disadvantage with the large RBAT is that the error of the battery OVP threshold will be increased. The additional error is the voltage drop across the RBAT because Capacitor Selection The input capacitor is for decoupling and prevents the of the BAT bias current. When RBAT is 100kΩ, the worsecase additional error is 100kΩx20nA=2mV, which is acceptable in most applications. input voltage from overshooting to dangerous levels. In the AC adapter hot plug-in applications or load current REN Selection step-down transient, the input voltage has a transient spike due to the parasitic inductance of the input cable. A For the same reason as the BAT pin case, the EN pin 25V, X5R, dielectric ceramic capacitor with a value be- should be connected to the MCU GPIO pin through a resistor. The value of the REN is dependent on the IO tween 1µF and 4.7µF placed close to the IN pin is recommended. voltage of the MCU. The output capacitor is for output voltage decoupling, and also can be as the input capacitor of the charging circuit. Since the IO voltage is divided by REN and EN internal pull low resistor for EN voltage. It has to be ensured that the At least, a 1µF, 10V, X5R capacitor is recommended. EN voltage is above the EN logic high voltage when the GPIO output of the MCU is high. Layout Consideration In some failure modes, a high voltage may be applied to FAULT Output Since the FAULT pin is an open-drain output, connecting a resistor RUP to a pull high voltage is necessary. It is also the device. Make sure the clearance constraint of the PCB layout must satisfy the design rule for high voltage. The exposed pad of the TDFN4x3-12 performs the func- recommended that connect the FAULT to the MCU GPIO through a resistor RFAULT. The RFAULT prevents damage to tion of channeling heat away. It is recommended that connect the exposed pad to a large copper ground plane the MCU under a failure mode. The recommended value of the resistors should be between 10kΩ to 100kΩ. on the backside of the circuit board through several thermal vias to improve heat dissipation. The input and output capacitors should be placed close to the IC. RILIM also should be placed close to the IC. The high current traces like input trace and output trace must be wide and short. Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 14 www.anpec.com.tw APL3204A/B Package Information TDFN4x3-12 E b D A E2 A1 Pin 1 Corner e D2 A3 L S Y M B O L TDFN4x3-12 MILLIMETERS INCHES MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 0.30 0.007 3.70 0.118 A3 b 0.20 REF 0.18 D D2 4.00 BSC 3.00 E E2 0.008 REF 0.157 BSC 3.00 BSC 1.40 e 0.30 K 0.20 0.146 0.118 BSC 0.055 1.80 0.50 BSC L 0.012 0.071 0.020 BSC 0.012 0.50 0.020 0.008 Note : Follow JEDEC MO-229 WGED-4. Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 15 www.anpec.com.tw APL3204A/B Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H 330.0±2.00 50 MIN. TDFN3x4-12 T1 C d D W E1 12.4+2.00 13.0+0.50 -0.00 -0.20 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 P0 P1 P2 D0 D1 T A0 4.0±0.20 8.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 3.7±0.20 B0 F 5.5±0.05 K0 4.7±0.20 1.30±0.20 (mm) Devices Per Unit Package Type Unit Quantity TDFN4x3-12 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 16 www.anpec.com.tw APL3204A/B Reflow Condition (IR/Convection or VPR Reflow) tp TP Critical Zone TL to TP Ramp-up Temperature TL tL Tsmax Tsmin Ramp-down ts Preheat 25 t 25°C to Peak Time Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C, 5 sec 1000 Hrs Bias @125°C 168 Hrs, 100%RH, 121°C -65°C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA Classification Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Time 25°C to Peak Temperature Sn-Pb Eutectic Assembly Pb-Free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 217°C 60-150 seconds See table 1 See table 2 10-30 seconds 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 17 www.anpec.com.tw APL3204A/B Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures Volume mm3 ≥350 225 +0/-5°C 225 +0/-5°C 3 Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 240 +0/-5°C 225 +0/-5°C Table 2. Pb-free Process – Package Classification Reflow Temperatures 3 3 3 Volume mm Volume mm Volume mm <350 350-2000 >2000 <1.6 mm 260 +0°C* 260 +0°C* 260 +0°C* 1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C* ≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C* * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL level. Package Thickness Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A,1 - Jun, 2008 18 www.anpec.com.tw