ON MC74VHCT157ADR2G Quad 2-channel multiplexer Datasheet

MC74VHCT157A
Quad 2-Channel Multiplexer
The MC74VHCT157A is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common select
(S) and enable (E) inputs. When E is held High, selection of data is
inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V because it
has full 5.0 V CMOS level output swings.
The VHCT157A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage−input/output voltage mismatch, battery backup, hot
insertion, etc.
The inputs tolerate voltages up to 7.0 V, allowing the interface of
5.0 V systems to 3.0 V systems.
http://onsemi.com
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
VHCT157AG
AWLYWW
1
16
VHCT
157A
ALYWG
G
TSSOP−16
DT SUFFIX
CASE 948F
1
1
Features
•
•
•
•
•
•
•
•
•
•
•
•
High Speed: tPD = 4.1 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Chip Complexity: 82 FETs or 20 Equivalent Gates
These Devices are Pb−Free and are RoHS Compliant
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
E
H
L
L
S
X
L
H
Outputs
Y0 − Y3
L
A0 −A3
B0 −B3
A0 − A3, B0 − B3 = the levels of
the respective Data−Word Inputs.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 4
1
Publication Order Number:
MC74VHCT157A/D
MC74VHCT157A
S
1
16
VCC
A0
2
15
E
B0
3
14
A3
Y0
4
13
B3
A1
5
12
Y3
B1
6
11
A2
Y1
7
10
B2
GND
8
9
Y2
Figure 1. Pin Assignment
2
A0
B0
A1
B1
NIBBLE
INPUTS
5
7
6
Y1
DATA
OUTPUTS
11
A3
B3
S
Y0
A2
B2
E
4
3
9 Y2
10
14
12 Y3
13
15
1
Figure 2. Expanded Logic Diagram
E
S
A0
B0
A1
B1
A2
B2
A3
B3
15
1
2
3
5
6
11
10
14
13
EN
G1
1
1
MUX
4
7
9
12
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications
of any voltage higher than maximum rated
voltages to this high−impedance circuit. For
proper operation, Vin and Vout should be
constrained to the range GND v (Vin or Vout)
v VCC.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either
GND or VCC). Unused outputs must be left
open.
Y0
Y1
Y2
Y3
Figure 3. IEC Logic Symbol
http://onsemi.com
2
MC74VHCT157A
MAXIMUM RATINGS (Note 1)
Parameter
Symbol
Value
Unit
VCC
Positive DC Supply Voltage
−0.5 to +7.0
V
VIN
Digital Input Voltage
−0.5 to +7.0
V
VOUT
DC Output Voltage
−0.5 to +7.0
−0.5 to VCC +0.5
V
IIK
Input Diode Current
−20
mA
Output in 3−State
High or Low State
IOK
Output Diode Current
$20
mA
IOUT
DC Output Current, per Pin
$25
mA
ICC
DC Supply Current, VCC and GND Pins
$75
mA
PD
Power Dissipation in Still Air
200
180
mW
TSTG
Storage Temperature Range
VESD
ESD Withstand Voltage
ILATCHUP
qJA
Latchup Performance
SOIC
TSSOP
−65 to +150
°C
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
>2000
>200
>2000
V
Above VCC and Below GND at 125°C (Note 5)
$300
mA
143
164
°C/W
Thermal Resistance, Junction−to−Ambient
SOIC
TSSOP
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
2. Tested to EIA/JESD22−A114−A
3. Tested to EIA/JESD22−A115−A
4. Tested to JESD22−C101−A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
VCC
DC Supply Voltage
VIN
DC Input Voltage
VOUT
DC Output Voltage
Output in 3−State
High or Low State
TA
Operating Temperature Range, all Package Types
tr, tf
Input Rise or Fall Time
VCC = 5.0 V + 0.5 V
Min
Max
Unit
4.5
5.5
V
0
5.5
V
0
VCC
V
−55
125
°C
0
20
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80 ° C
117.8
TJ = 90 ° C
1,032,200
TJ = 100 ° C
80
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 110° C
Time, Years
TJ = 120° C
Time, Hours
TJ = 130 ° C
Junction
Temperature °C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO
0.1% BOND FAILURES
1
1
10
100
1000
TIME, YEARS
Figure 4. Failure Rate vs. Time Junction Temperature
http://onsemi.com
3
MC74VHCT157A
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC
Symbol
Parameter
Condition
(V)
Min
2
VIH
Minimum High−Level Input
Voltage
4.5 to
5.5
VIL
Maximum Low−Level Input
Voltage
4.5 to
5.5
VOH
Maximum High−Level Output
Voltage
VOL
Maximum Low−Level Output
Voltage
TA ≤ 85°C
TA = 25°C
Typ
Max
−55°C ≤ TA ≤
125°C
Min
Max
Min
2
0.8
2
0.8
Max
Unit
V
0.8
0.8
V
V
VIN = VIH or VIL
IOH = −50 mA
4.5
4.4
VIN = VIH or VIL
IOH = −8 mA
4.5
3.94
VIN = VIH or VIL
IOL = 50 mA
4.5
4.5
4.4
4.4
3.8
3.66
V
VIN = VIH or VIL
IOH = 8 mA
0.0
0.1
0.1
0.1
4.5
0.36
0.44
0.52
IIN
Input Leakage Current
VIN = 5.5 V or GND
0 to 5.5
±0.1
±1.0
±1.0
mA
ICC
Maximum Quiescent Supply
Current
VIN = VCC or GND
5.5
4.0
40.0
40.0
mA
ICCT
Additional Quiescent Supply
Current (per Pin)
Any one input:
VIN = 3.4 V
All other inputs:
VIN = VCC or GND
5.5
1.35
1.5
1.5
mA
IOPD
Output Leakage Current
VOUT = 5.5 V
0
0.5
5
5
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
TA = 25°C
Symbol
Parameter
tPLH,
tPHL
Maximum Propagation Delay;
A to B to Y
tPLH,
tPHL
tPLH,
tPHL
CIN
Maximum Propagation Delay;
S to Y
Maximum Propagation Delay;
E to Y
−55°C ≤ TA ≤
125°C
Typ
Max
Min
Max
Min
Max
Unit
VCC = 3.3 ± 0.3 V
CL = 15pF
CL = 50pF
5.6
8.0
7.0
10.0
1.0
1.0
7.7
11.0
1.0
1.0
7.7
11.0
ns
VCC = 5.0 ± 0.5 V
CL = 15pF
CL = 50pF
4.1
5.6
6.4
8.4
1.0
1.0
7.5
9.5
1.0
1.0
7.5
9.5
VCC = 3.3 ± 0.3 V
CL = 15pF
CL = 50pF
6.1
8.5
7.5
10.5
1.0
1.0
8.2
11.5
1.0
1.0
8.2
11.5
VCC = 5.0 ± 0.5 V
CL = 15pF
CL = 50pF
5.3
6.8
8.1
10.1
1.0
1.0
9.5
11.5
1.0
1.0
9.5
11.5
VCC = 3.3 ± 0.3 V
CL = 15pF
CL = 50pF
6.1
8.5
7.5
10.5
1.0
1.0
8.2
11.5
1.0
1.0
8.2
11.5
VCC = 5.0 ± 0.5 V
CL = 15pF
CL = 50pF
5.6
7.1
8.6
10.6
1.0
1.0
10.0
12.0
1.0
1.0
10.0
12.0
4
10
Test Conditions
Min
TA = ≤ 85°C
Maximum Input Capacitance
10
10
ns
ns
pF
Typical @ 25°C, VCC = 5.0 V
CPD
20
Power Dissipation Capacitance (Note 6)
pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0 V)
TA = 25°C
Symbol
Typ
Characteristic
Max
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.3
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
− 0.3
− 0.8
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.8
V
http://onsemi.com
4
MC74VHCT157A
VCC
50%
A, B or S
tPLH
Y
VCC
50%
A, B or S
GND
tPHL
tPLH
50% VCC
50% VCC
Y
Figure 5. Switching Waveform
GND
tPHL
Figure 6. Inverting Switching
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
CL*
INPUT
*Includes all probe and jig capacitance
Figure 7. Test Circuit
Figure 8. Input Equivalent Circuit
ORDERING INFORMATION
Package
Shipping†
MC74VHCT157ADG
SOIC−16
(Pb−Free)
48 Units / Rail
MC74VHCT157ADR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
MC74VHCT157ADTG
TSSOP−16
(Pb−Free)
96 Units / Rail
M74VHCT157ADTR2G
TSSOP−16
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
5
MC74VHCT157A
PACKAGE DIMENSIONS
SOIC−16
CASE 751B−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
−A−
16
9
1
8
−B−
P
8 PL
0.25 (0.010)
M
B
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
S
SOLDERING FOOTPRINT
8X
6.40
16X
1
1.12
16
16X
0.58
1.27
PITCH
8
9
DIMENSIONS: MILLIMETERS
http://onsemi.com
6
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
MC74VHCT157A
PACKAGE DIMENSIONS
TSSOP−16
CASE 948F
ISSUE B
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
S
V
S
S
K
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
N
0.25 (0.010)
8
1
M
0.15 (0.006) T U
S
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
H
D
DETAIL E
G
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.007
0.011
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
7
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC74VHCT157A/D