Anpec APL5506-13OC 500ma regulator reset ic Datasheet

APL5505/6/7
500mA Regulator + Reset IC
Features
General Description
•
•
The APL5505/6/7 is micropower, low noise , low dropout regulators with a reset function (regulator input
(APL5505) or specific voltage(APL5506/7) monitoring),
and internal delay circuit, set to detect 3.9V or 4.2V.
Operate from 3V to 6V input voltage and deliver up to
500mA. Typical output noise is just 180uVRMS with an
external 0.01uF bypass capacitor connected in BP
pin and the typical dropout voltage is only 300mV at
500mA loading. Design with an internal P-channel
MOSFET pass transistor, the APL5505/6/7 maintains
a low supply current, independent of the load current
and dropout voltage. Other features include reverse
current protection, thermal-shutdown protection, current limit protection to ensure specified output current
and controlled short-circuit current. The APL5505/6/
7 regulators come in miniature SOP-8, TSSOP-8 and
MSOP-8 packages.
•
•
•
Low Quiescent Current : 120uA (No load)
Low Dropout Voltage : 300mV (VOUT=3.3V@
500mA)
Fixed Output Voltage : 1.3V,1.4V,1.5V,1.6V,
1.7V,1.8V,1.9V, 2.0V,2.1V,2.2V,2.3V,2.4V,
2.5V,2.6V,2.7V, 2.8V,2.9V,3.0V,3.1V,3.2V,
3.3V,3.4V.
Stable with 4.7uF Output Capacitor
Stable with Aluminum , Tantalum or Ceramic
Capacitors .
•
•
Reverse Current Protection
No Protection Diodes Needed
•
Built in Thermal Protection
•
•
•
•
•
•
Built in Current Limit Protection
Controlled Short Circuit Current : 50mA
Fast transient Response
Short Setting Time
SOP-8,TSSOP-8 and MSOP-8 Packages.
Adjustment-free Reset Detection Voltage :
3.9V or 4.2V typ.
Easy to Set Delay Time from Voltage
Detection to Reset Release.
Reset and Reset output
•
•
Pin Configuration
SOP-8 Top View
RESET
1
8
Cd
V D ET
1
8
Cd
RESET
2
7
G ND RESET
2
7
G ND
CONT
3
6
B ypass C O N T
3
6
B ypass
V IN
4
5
V OUT
V IN
4
5
V OUT
Applications
•
SOP-8 Top View
APL5505
CD-ROM drive.
APL5506
SOP-8 Top View
V D ET
1
8
Cd
RESET
2
7
G ND
CONT
3
6
B ypass
V IN
4
5
V OUT
APL5507
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
1
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APL5505/6/7
Ordering and Marking Information
P ackage C ode
K : S O P -8
O : T S S O P -8
X : M S O P -8
Tem p. R ange
C : 0 to 7 0 °C
I : -4 0 to 8 5 °C
H a n d lin g C o d e
TR : Tape & R eel
V o lta g e C o d e :
1 3 : 1 .3 V ~ 3 4 : 3 .4 V
D e te c tio n V o lta g e :
A : 3 .9 V
B : 4 .2 V
L e a d F re e C o d e
L : L e a d F re e D e v ic e
B la n k : O rig in a l D e v ic e
A P L 5 5 0 5 /6 /7 L e a d F re e C o d e
H a n d lin g C o d e
Tem p. R ange
P ackage C ode
V o lta g e C o d e
D e te c tio n V o lta g e
A P L 5 5 0 5 /6 /7 X
XXXXX13
A P L 5 5 0 5 /6 /7 :
X
- D e te c tio n V o lta g e
X X X X X - D a te C o d e , 1 3 - 1 .3 V
Pin Description
3
4
5
6
7
PIN
Name
RESET(5505)
VDET(5506/7)
RESET(5507)
RESET(5506)
CONT
VIN
VOUT
Bypass
GND
8
Cd
No.
1
2
I/O
Description
O
I
Input voltage detection output pin , high = VIN<VS , low = VIN>VS
Input pin of voltage detection.
Input voltage detection output pin , high = VIN<VS , low = VIN>VS
Input voltage detection output pin , low = VIN<VS , high = VIN>VS
Output voltage on/off-control pin, low = off , high = on.
Voltage supply input pin.
Regulator output pin.
Bypass signal pin, connect a bypass capacitor to reduce output noise.
GND pin
Delay time capacitor pin, RESET pin output delay time can be set by
the capacitance connected to the Cd pin. tPLH = 160000*C, tPLH :
transmission delay time (s), C:capacitor value (F)
O
I
O
O
Absolute Maximum Ratings
Symbol
VIN, VOUT
CONT
Vdet
RTH,JA
Parameter
Input Voltage or Out Voltage
Shutdown Control Pin
RESET pin supply voltage
Thermal Resistance – Junction to Ambient
PD
Power Dissipation
TJ
Operating Junction Temperature
Control Section
Power Transistor
TSTG
TL
Storage Temperature Range
Lead Temperature (Soldering, 10 second)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
2
Rating
6
Unit
V
6
V
6
V
210
Internally Limited
°C/W
W
0 to 125
°C
0 to 150
-65 to +150
°C
260
°C
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APL5505/6/7
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=4.7uF,COUT=4.7uF,
CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
APL5505/6/7
Symbol
Parameter
Test Conditions
Unit
Min. Typ. Max.
VIN
Input Voltage
2.7
6
V
VOUT Output Voltage
VOUT+1.0V< VCC<6.0V, 0mA< IOUT < IMAX VOUT -2% VOUT VOUT +2%
V
VIN=5V
ILIMIT Circuit Current Limit
700
mA
ISHORT
IOUT
Short Current
Load Current
VOUT=0V
50
mA
500
REGLINE Line Regulation
REGLOAD Load Regulation
VOUT+0.5V< VCC<6.0V, 0mA< IOUT < IMAX
VIN =5V, 0mA< IOUT < IMAX
mA
1
1
6
6
mV
mV
300
450
mV
(Note)
Dropout Voltage
(VOUT(Nominal)=3.0V IOUT =500mA
Version)
F≤1kHz, 1Vpp at VIN = VOUT+1.0V
PSRR Ripple Rejection
VDROP
IQ
TC
55
dB
Quiescent Current
No load
120
µA
Shutdown Supply
Current
CONT = low
IOUT=0, VCC =6.0V
80
µA
180
µV
400
µs
150
°C
10
°C
50
ppm/°C
Noise
OTS
45
Shutdown Recovery
Delay
Over Temperature
Sh
OvertdTemperature
Sh
td Voltage
H t
Output
Temperature
Coefficient
100Hz<f<80kHz, typical load,
CBP=0.01µF
CBP=0.01µF,COUT=1µF, no load
CONT=L!H
Hysteresis
i
4.7
µF
ESR
0.02
0.1
1
Ohm
Shutdown Input
VOUT+1.0V< VIN <6.0V
1.6
V
Threshold
Shutdown input Bias
VCONT =VIN
ICONT
0.01
100
nA
current
Reverse Protection
11
50
mV
Threshold
Note: Dropout voltage definition : VIN-VOUT when VOUT is 2% below the value of VOUT for VIN = VOUT + 0.5V
COUT
Output Capacitor
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
3
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APL5505/6/7
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=4.7uF,COUT=4.7uF,
CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
Parameter
Test Conditions
APL5505/6/7
Min.
Typ. Max.
Unit
RESET/RESET
VS
Detection Voltage
V IN = H!L (APL5505A)
V DET=H!L (APL5506A/5507A)
V IN = H!L (APL5505B)
V DET=H!L(APL5506B/5507B)
3.90
V
4.2
Vs Temperature
Coefficient
T J = -20~+80°C
Hysteresis Voltage
V IN = V DET = H!L
V OL
Low-level Output
Voltage
V IN = V DET = 3.9V, RL = 4.7k
30
IOH
Output Leakage
Current
V IN = V DET = 5V
0.1
IOL1
Output Current1
V IN = V DET =3.9V, RL = 0
5
mA
IOL2
Output Current2
V IN = V DET = 3.9V, RL = 0
3
mA
tPLH
“H” Transmission Delay
Cd = 0uF
Time
40
tPLH1
Reset Delay Time
16
tPHL
“L” Transmission Delay
Cd = 0uF
Time
10
90
us
V OPL
Threshold Operating
Voltage
0.9
1.1
V
△VS/△T
△VS
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
100
100
V IN = V DET = 3.7V!5V, Cd = 0.1uF
V OL = 0.4V
4
ppm/°C
200
mV
60
mV
uA
90
us
ms
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APL5505/6/7
Application Circuit
V IN
4.7uF
4.7K Ω
V OUT
V DET
(5506/7) A P L5505/6/7
R E S E T(5505/6)
CONT
GND
C OUT
4.7uF
BP
Cd
(5505/7)
RESET
0.01uF
0.1uF
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
5
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APL5505/6/7
Typical Characteristics
Current Limit vs. Input Voltage
Ground Pin Current vs. Load Current
25 0
Ground Pin Current (uA)
750
Current Limit (mA)
700
650
600
550
20 0
15 0
10 0
50
0
500
4
4 .5
5
5 .5
6
0
10 0
30 0
40 0
50 0
Load Current (mA)
Input Voltage (V)
Input Voltage vs. Output Voltage
Ground Pin Current vs. Input Voltage
140
3.5
120
3
Output Voltage (V)
Ground Pin Current (uA)
20 0
100
80
60
40
20
2.5
2
1.5
1
0.5
0
0
0
1
2
3
4
5
6
0
2
3
4
5
6
Input Voltage (V)
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
1
6
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APL5505/6/7
Typical Characteristics
Reverse Leakage Current vs. Output Voltage
Dropout Voltage vs. Load Current
90
Reverse Leakage Current (uA)
Dropout Voltage (mV)
250
200
150
100
50
VIN=1V
80
70
60
50
40
30
20
10
0
0
0
100
200
300
400
0
500
1
Load Current (mA)
3
4
5
6
Output Voltage (V)
PSRR vs. Frequency
Output Noise
+0
1m
-10
800u
-20
600u
VOUT (50uV/div)
PSRR (dB)
2
VIN=4.3V
IOUT =50mA
COUT=1uF
CBP=0.01uF
-30
-40
-50
-60
VIN=4.3V f=10HZ-80KHZ
IOUT =50mA COUT=1uF
CBP=0.01uF
400u
200u
0
-200u
-400u
-600u
-70
-800u
-80
20 50
100
200
500
1k
2k
5k
10k
-1m
0
20k 50k 100k 200k
Frequency (HZ)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
20m
40m
60m
80m
100m
Time (s)
7
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APL5505/6/7
Typical Characteristics
Shutdown Recovery Delay
RESET and RESET Delay Time
3.3V
0V
Output Voltage (V)
Output Voltage (V)
5V
VIN
5V
Cd=0.1uF
CBT=0.01uF
RESET
0V
5V
CBP=0.01uF
VOUT
0V
4V
CONT
RESET
0V
0V
0
4m
8m
12m
0s
16m
Time (s)
0.1m
0.2m
0.3m
0.4m
Time (s)
Load-Transient Response
Line-Transient Response
5V
Output Voltage (V)
Output Voltage (V)
VIN
3.3V
VOUT
2.3V
VIN=5V
COUT=10uF
4V
COUT=10uF
IOUT=50mA
3.3V
0.5A
IOUT=10-500mA
0A
VOUT
3.2V
IOUT
0s
0.1m
0.2m
0.3m
0.4m
0.5m
0s
Time (s)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
0.1m
0.2m
0.3m
0.4m
0.5m
Time (s)
8
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APL5505/6/7
Typical Characteristics
Region of Stable ESR vs. Load Current
10
Region of Stable ESR
VOUT=3.3V
1
0.1
Stable
Region
0.01
Unstable
Region
0.001
0
100
200
300
400
500
Load Current (mA)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
9
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APL5505/6/7
Packaging Information
E
e1
0.015X45
SOP-8 pin ( Reference JEDEC Registration MS-012)
H
e2
D
A1
1
L
0.004max.
Dim
A
Mi ll im et er s
Inche s
A
Min .
1. 35
Max .
1. 75
Min.
0. 053
Max .
0. 069
A1
D
E
0. 10
4. 80
3. 80
0. 25
5. 00
4. 00
0. 004
0. 189
0. 150
0. 010
0. 197
0. 157
H
L
e1
e2
5. 80
0. 40
0. 33
6. 20
1. 27
0. 51
0. 228
0. 016
0. 013
0. 244
0. 050
0. 020
φ 1
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
1. 27B S C
0. 50B S C
8°
8°
10
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APL5505/6/7
Packaging Information
TSSOP
e
8 7
2x E/2
E1
( 2)
E
GAUGE
PLANE
S
1 2
e/2
0.25
D
L
A2
A
b
Dim
A
A1
A2
b
D
e
E
E1
L
L1
R
R1
S
φ1
φ2
φ3
1
(L1)
( 3)
A1
Millimeters
Min.
Inches
Max.
1.2
0.15
1.05
0.30
3.1
0.00
0.80
0.19
2.9
Min.
0.000
0.031
0.007
0.114
0.65 BSC
6.40 BSC
4.30
0.45
0.026 BSC
0.252 BSC
4.50
0.75
0.169
0.018
8°
0.004
0.004
0.008
0°
1.0 REF
0.09
0.09
0.2
0°
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
Max.
0.047
0.006
0.041
0.012
0.122
0.177
0.030
0.039REF
12° REF
12° REF
8°
12° REF
12° REF
11
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APL5505/6/7
Packaging Information
MSOP
e1
E
E1
e1
L1
A1
Dim
A1
A2
A3
e
e1
E
E1
L1
L2
A3
A2
L2
Millimeters
Min.
0.06
Inches
Max.
0.15
Min.
0.002
0.4
0.01
0.86 TYP
0.25
0.34 TYP
0.65 TYP
2.90
4.8
2.90
0.0126
0.0256TYP
3.1
5.0
3.1
0.114
0.189
0.169
0.25 REF
0.0375 REF
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
Max.
0.006
0.124
0.197
0.177
0.039REF
0.953 REF
12
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APL5505/6/7
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
T L to T P
Temperature
Ram p-up
TL
tL
Tsm ax
Tsm in
Ram p-down
ts
Preheat
25
t 25 °C to Peak
Tim e
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Large Body
Small Body
Average ramp-up rate
3°C/second max.
(TL to TP)
Preheat
- Temperature Min (Tsmin)
100°C
- Temperature Mix (Tsmax)
150°C
- Time (min to max)(ts)
60-120 seconds
Tsmax to TL
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
183°C
- Time (tL)
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
Time within 5°C of actual Peak
10-30 seconds
10-30 seconds
Temperature(tp)
Ramp-down Rate
6°C/second max.
6 minutes max.
Time 25°C to Peak Temperature
Pb-Free Assembly
Large Body
Small Body
3°C/second max.
150°C
200°C
60-180 seconds
3°C/second max
217°C
60-150 seconds
245 +0/-5°C
250 +0/-5°C
10-30 seconds
20-40 seconds
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
13
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APL5505/6/7
R e lia b ilit y te s t p r o g r a m
Te s t ite m
S O L D E R A B IL IT Y
H O LT
PCT
TST
ESD
L a tc h -U p
M e th o d
M IL -S T D -8 8 3 D -2 0 0 3
M IL -S T D -8 8 3 D -1 0 0 5 .7
J E S D -2 2 - B , A 1 0 2
M IL -S T D -8 8 3 D -1 0 11 .9
M IL -S T D -8 8 3 D -3 0 1 5 .7
JESD 78
D e s c rip tio n
2 45 °C , 5 S E C
1 0 0 0 H rs B ia s @ 1 2 5 ° C
1 6 8 H rs , 1 0 0 % R H , 1 2 1 ° C
-6 5 °C ~ 1 5 0 °C , 2 0 0 C y c le s
V H B M > 2 K V, V M M > 2 0 0 V
1 0 m s , I tr > 1 0 0 m A
Carrier Tape
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
14
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APL5505/6/7
Reel Dimensions
Application
SOP- 8
A
B
330 ± 1
F
5.5± 1
Application
TSSOP-8
J
T1
T2
W
P
E
62 +1.5
C
12.75+
0.15
2 ± 0.5
12.4 ± 0.2
2 ± 0.2
12± 0. 3
8± 0.1
1.75±0.1
D
D1
Po
P1
Ao
Bo
Ko
t
2.0 ± 0.1
6.4 ± 0.1
5.2± 0. 1
1.55 +0.1 1.55+ 0.25 4.0 ± 0.1
A
B
330 ± 1
2.1± 0.1 0.3±0.013
J
T1
T2
W
P
E
62 +1.5
C
12.75+
0.15
2 + 0.5
12.4 ± 0.2
2 ± 0.2
12± 0. 3
8± 0.1
1.75±0.1
F
D
D1
Po
P1
Ao
Bo
Ko
t
5.5 ± 0. 1
1.5 + 0.1
1.5 + 0.1
4.0 ± 0.1
2.0 ± 0.1
7.0 ± 0.1
3.6 ± 0.3
1.6 ± 0.1 0.3±0.013
(mm)
Cover Tape Dimensions
Application
SOP- 8
TSSOP- 8
Carrier Width
12
12
Cover Tape Width
9.3
9.3
Devices Per Reel
2500
2500
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2002
15
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