INTEGRATED CIRCUITS 74F166 8-bit bidirectional universal shift register Product specification IC15 Data Handbook 1991 Feb 14 Philips Semiconductors Product specification 8-bit bidirectional universal shift register For expansion of the register in parallel to serial converters, the Q7 output is connected to the Ds input of the succeeding stage. The clock input is gated OR structure which allows one input to be used as an active–low clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary and can be reversed for layout convenience. The low–to–high transition of CE input should only take place while the CP is high for predictable operation. A low on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all bit positions to a low state. FEATURES • High impedance NPN base inputs for reduced loading • • • • • • 74F166 (20µA in high and low states) Synchronous parallel to serial applications Synchronous serial data input for easy expansion Clock enable for ”do nothing” mode Asynchronous master reset Expandable to 16 bits in 8–bit increments Industrial temperature range available (–40°C to +85°C) DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. When PE is high, data is entered into internal bit position Q0 from serial data input (Ds), and the remaining bits are shifted one place to the right (Q0 → Q1 → Q2, etc.) with each positive going clock transition. TYPE TYPICAL fmax TYPICAL SUPPLY CURRENT( TOTAL) 175MHz 50mA 74F166 ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE INDUSTRIAL RANGE VCC = 5V ±10%, VCC = 5V ±10%, PKG DWG # Tamb = 0°C to +70°C Tamb = –40°C to +85°C 16–pin plastic DIP N74F166N I74F166N SOT38-4 16–pin plastic SO N74F166D I74F166D SOT109-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS D0 – D7 DESCRIPTION 74F (U.L.) HIGH/ LOW LOAD VALUE HIGH/ LOW Parallel data inputs 1.0/0.033 20µA/20µA Ds Serial data input (shift right) 2.0/0.066 40µA/40µA CP Clock input (active rising edge) 1.0/0.033 20µA/20µA CE Clock enable input (active low) 1.0/0.033 20µA/20µA PE Parallel enable input (active low) 1.0/0.033 20µA/20µA MR Master reset input (active low) 2.0/0.066 40µA/40µA 50/33 1.0mA/20mA Q7 Data output Note to input and output loading and fan out table 1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state. Feb. 14, 1991 2 853–0349 01718 Philips Semiconductors Product specification 8-bit bidirectional universal shift register PIN CONFIGURATION 74F166 IEC/IEEE SYMBOL Ds 1 16 V CC D0 2 15 PE D1 3 14 D7 D2 4 13 Q7 D3 5 12 D6 CE 6 11 D5 CP 7 10 D4 9 15 6 GND 8 9 7 1 SRG 8 R M1 [SHIFT] M2 [LOAD] 1 C3/1 2 1, 3D 2, 3D 3 2,3D 4 5 MR 10 SP000283 11 12 LOGIC SYMBOL 14 13 1 2 3 4 5 SF00285 10 11 12 14 Ds D0 D1 D2 D3 D4 D5 D6 D7 6 CE 7 CP 9 MR 15 PE Q7 13 VCC = Pin 16 GND = Pin 8 SF00284 FUNCTION TABLE INPUTS Qn REGISTER OUTPUT PE CE CP DS D0 –D7 Q0 Q1 – Q6 Q7 l l ↑ X l–l L L–L L l l ↑ X h–h H H–H H h l ↑ l X–X L q0 – q5 q6 h l ↑ h X–X H q0 – q5 q6 OPERATING MODE Parallel load Serial shift X h X X X–X qn q1 – q6 q7 Hold (do nothing) Notes to function table 1. H = High–voltage level 2. h = High voltage level one setup time before the low–to–high clock transition 3. L = Low–voltage level 4. l = Low voltage level one setup time before the low–to–high clock transition 5. qn = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the low–to–high clock transition 6. X = Don’t care 7. ↑ = Low–to–high clock transition Feb. 14, 1991 3 Philips Semiconductors Product specification 8-bit bidirectional universal shift register 74F166 LOGIC DIAGRAM MR DS PE D0 9 1 R CP S 15 Q 2 R CP S D1 Q 3 R CP S D2 Q 4 R CP S D3 Q 5 R CP S D4 Q 10 R CP S D5 Q 11 R CP S D6 Q 12 R CP S VCC = Pin 16 GND = Pin 8 Feb. 14, 1991 D7 CP CE Q 14 7 13 6 Q7 SF00286 4 Philips Semiconductors Product specification 8-bit bidirectional universal shift register 74F166 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in high output state –0.5 to VCC V IOUT Current applied to output in low output state 40 mA Tamb Operating free air temperature range 0 to +70 °C –40 to +85 °C Tstg Storage temperature range –65 to +150 °C Commercial range Industrial range RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT MIN NOM MAX VCC Supply voltage 4.5 5.0 5.5 VIN High–level input voltage 2.0 VIL Low–level input voltage 0.8 V IIk Input clamp current –18 mA IOH High–level output current –1 mA IOL Low–level output current 20 mA Tamb Operating free air temperature range Feb. 14, 1991 V V Commercial range 0 +70 °C Industrial range –40 +85 °C 5 Philips Semiconductors Product specification 8-bit bidirectional universal shift register 74F166 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) PARAMETER SYMBOL TEST LIMITS CONDITIONS1 VOH VOL High–level output voltage VCC = MIN, VIL = MAX, VIH = MIN IOH = MAX VCC = MIN, VIL = MAX, Low–level output voltage MIN IOL = MAX VIH = MIN VIK II Input clamp voltage Input current at maximum input voltage IIH High–level input others CE, CP3 ±10%VCC 2.5 ±5%VCC 2.7 TYP2 V 3.4 current IIL 0.30 0.50 V ±5%VCC 0.30 0.50 V -0.73 -1.2 100 V µA 20 µA 40 µA VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V VCC = MAX, VI = 2.7V Industrial others 40 µA only MR, Ds 80 µA -20 µA -40 µA -150 mA 70 mA Low–level input current others VCC = MAX, VI = 0.5V MR, Ds IOS ICC Short–circuit output V ±10%VCC others MR, Ds UNIT MAX current4 VCC = MAX -60 VCC = MAX, PE = CE = Dn = GND, MR = Ds = 4.5V, CP = ↑ Supply current (total) 50 Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. When testing CP, CE must remain in high state, whereas CP must remain in high state when testing CE. 4. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. AC ELECTRICAL CHARACTERISTICS LIMITS Tamb = +25°C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500Ω MIN TYP MAX Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN MAX VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN UNIT MAX fmax Maximum clock frequency Waveform 1 135 175 tPLH tPHL Propagation delay CP to Q7 Waveform 1 5.0 4.0 7.5 6.0 10.0 8.0 5.0 3.5 12.0 9.0 5.0 3.5 13.0 9.0 ns tPHL Propagation delay MR to Q7 Waveform 2 4.0 6.5 8.5 4.0 9.5 4.0 9.5 ns Feb. 14, 1991 6 110 Tamb = –40°C to +85°C 100 ns Philips Semiconductors Product specification 8-bit bidirectional universal shift register 74F166 AC SETUP REQUIREMENTS LIMITS Tamb = +25°C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500Ω MIN tsu (H) tsu(L) Setup time, high or low Dn, Ds to CP, CE th (H) th (L) TYP MAX Tamb = 0°C to +70°C Tamb = –40°C to +85°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MAX MIN UNIT MAX Waveform 3 3.0 2.5 4.0 3.0 4.0 3.0 ns Hold time, high or low Dn, Ds to CP Waveform 3 0.0 0.0 1.0 0.0 1.0 0.0 ns th (H) th (L) Hold time, high or low Dn, Ds to CE Waveform 3 1.5 0.0 2.0 0.0 2.0 0.0 ns tsu(L) Setup time, low CE to CP Waveform 3 5.0 6.0 6.0 ns th (H) Hold time, high CE to CP Waveform 3 0.0 0.0 0.0 ns tsu (H) tsu(L) Setup time, high or low PE to CP, CE Waveform 3 3.0 3.0 4.0 4.0 4.0 6.0 ns th (H) th (L) Hold time, high or low PE to CP Waveform 3 0.0 0.0 0.0 0.0 0.0 0.0 ns tw (H) tw (L) CP pulse width, high or low Waveform 1 3.0 4.5 3.5 5.0 3.5 6.0 ns tw (L) MR pulse width, low Waveform 2 4.0 4.0 4.0 ns Waveform 2 4.0 4.5 4.5 ns trec Recovery time, MR to CP AC WAVEFORMS MR 1/fMAX VM VM tw(L) CP VM VM tW(H) VM CP tW(L) Q7 Q7 VM VM VM SF00288 SF00288 Waveform 2. Master reset pulse width, master reset to output delay and master reset to clock recovery time SF00287 Waveform 1. Propagation delay for clock input to output, clock pulse width, and maximum clock frequency Feb. 14, 1991 VM tPHL tPLH tPHL trec 7 Philips Semiconductors Product specification 8-bit bidirectional universal shift register VM CE tsu(L) PE VM th = 0 VM VM VM th = 0 stable VM tsu th = 0 Ds VM tsu(L) VM tsu(L) Dn VM VM 74F166 VM th = 0 tsu(H) th = 0 VM tsu(H) th = 0 stable VM tsu CP, CE VM th = 0 VM VM VM SF00289 Waveform 3. Setup and hold times Notes to AC waveforms 1. For all waveforms, VM = 1.5V. 2. The shaded areas indicate when the input is permitted to change for predictable output performance. TEST CIRCUIT AND WAVEFORMS VCC VIN tw 90% NEGATIVE PULSE VM D.U.T. RT CL RL AMP (V) VM 10% VOUT PULSE GENERATOR 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V AMP (V) 90% 90% POSITIVE PULSE DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. VM VM 10% Test Circuit for Totem-Pole Outputs 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00006 Feb. 14, 1991 8 Philips Semiconductors Product specification 8-bit bidirectional universal shift register DIP16: plastic dual in-line package; 16 leads (300 mil) 1991 Feb 14 9 74F166 SOT38-4 Philips Semiconductors Product specification 8-bit bidirectional universal shift register SO16: plastic small outline package; 16 leads; body width 3.9 mm 1991 Feb 14 10 74F166 SOT109-1 Philips Semiconductors Product specification 8-bit bidirectional universal shift register NOTES 1991 Feb 14 11 74F166 Philips Semiconductors Product specification 8-bit bidirectional universal shift register 74F166 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. 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