IRF IRF7905PBF Improved body diode reverse recovery Datasheet

PD - 97065B
IRF7905PbF
HEXFET® Power MOSFET
Applications
l Dual SO-8 MOSFET for POL
Converters in Notebook Computers, Servers,
Graphics Cards, Game Consoles
and Set-Top Box
30V
ID
RDS(on) max
Q1 21.8m:@VGS = 10V
Q2 17.1m:@VGS = 10V
6
'
*
'
6
'
*
'
Benefits
l Very Low RDS(on) at 4.5V VGS
l Low Gate Charge
l Fully Characterized Avalanche Voltage
and Current
l 20V VGS Max. Gate Rating
l Improved Body Diode Reverse Recovery
l 100% Tested for RG
l Lead-Free
VDSS
7.8A
8.9A
SO-8
Absolute Maximum Ratings
Parameter
VDS
VGS
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
PD @TA = 70°C
Power Dissipation
Power Dissipation
TJ
TSTG
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
c
Q1 Max.
Q2 Max.
Units
V
30
± 20
7.8
6.2
62
2.0
1.3
8.9
7.1
71
2.0
1.3
0.016
A
W
0.016
W/°C
°C
Q1 Max.
Q2 Max.
42
62.5
42
62.5
Units
°C/W
-55 to + 150
Thermal Resistance
RθJL
RθJA
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Parameter
Junction-to-Drain Lead
g
Junction-to-Ambient fg
1
07/09/08
IRF7905PbF
Static @ TJ = 25°C (unless otherwise specified)
BVDSS
∆ΒVDSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
Q1&Q2
Q1
Q2
Q1
Q2
VGS(th)
∆VGS(th)/∆TJ
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
IDSS
Drain-to-Source Leakage Current
IGSS
gfs
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Qg
Total Gate Charge
Qgs1
Pre-Vth Gate-to-Source Charge
Qgs2
Post-Vth Gate-to-Source Charge
Qgd
Gate-to-Drain Charge
Qgodr
Gate Charge Overdrive
Q sw
Switch Charge (Qgs2 + Qgd)
Q oss
Output Charge
RG
Gate Resistance
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Q1&Q2
Q1
Q2
Q1&Q2
Q1&Q2
Q1&Q2
Q1&Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Min.
30
–––
–––
–––
–––
–––
–––
1.35
–––
–––
–––
–––
–––
–––
15
18
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.024
0.024
17.4
23.4
13.7
17.1
1.8
-5.0
-5.0
–––
–––
–––
–––
–––
–––
4.6
6.9
0.9
1.5
0.6
0.8
1.7
2.5
1.4
2.1
2.3
3.3
2.9
4.5
3.1
3.1
5.2
6.2
8.3
9.3
6.9
8.1
3.4
3.4
600
910
130
190
78
95
Max.
–––
–––
–––
21.8
29.3
17.1
21.3
2.25
–––
–––
1.0
150
100
-100
–––
–––
6.9
10
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.9
4.9
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Conditions
Units
VGS = 0V, ID = 250µA
V
V/°C Reference to 25°C, ID = 1mA
mΩ
V
mV/°C
µA
nA
S
nC
VGS = 10V, ID = 7.8A
VGS = 4.5V, ID = 6.2A
VGS = 10V, ID = 8.9A
VGS = 4.5V, ID = 7.1A
VDS = VGS, ID = 25µA
e
e
e
e
VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VDS = 15V, ID = 6.2A
VDS = 15V, ID = 7.1A
Q1
VDS = 15V
VGS = 4.5V, ID = 6.2A
Q2
VDS = 15V
VGS = 4.5V, ID = 7.1A
nC
VDS = 16V, VGS = 0V
Ω
Q1
VDD = 15V, VGS = 4.5V
ID = 6.2A
ns
Q2
VDD = 15V, VGS = 4.5V
ID = 7.1A
Clamped Inductive Load
pF
VGS = 0V
VDS = 15V
ƒ = 1.0MHz
Avalanche Characteristics
EAS
IAR
Parameter
Single Pulse Avalanche Energy
Avalanche Current
c
Typ.
–––
–––
d
Q1 Max.
12
6.2
Q2 Max.
18
7.1
Units
mJ
A
Diode Characteristics
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
trr
Reverse Recovery Time
Q rr
Reverse Recovery Charge
IS
ISM
2
c
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Min.
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
–––
–––
10
13
2.5
4.0
Max.
2.8
2.8
62
71
1.0
1.0
15
20
3.8
6.0
Units
Conditions
A
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
TJ = 25°C, IS = 6.1A, VGS = 0V
V
TJ = 25°C, IS = 7.1A, VGS = 0V
Q1 TJ = 25°C, IF = 6.2A,
ns
VDD = 15V, di/dt = 100A/µs
nC Q2 TJ = 25°C, IF = 7.1A,
VDD = 15V, di/dt = 100A/µs
e
e
e
e
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IRF7905PbF
Typical Characteristics
Q1 - Control FET
Q2 - Synchronous FET
100
100
10
BOTTOM
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
0.1
10
BOTTOM
1
0.1
2.3V
≤ 60µs PULSE WIDTH
Tj = 25°C
≤ 60µs PULSE WIDTH
Tj = 25°C
2.3V
0.01
0.01
0.1
1
10
0.1
100
Fig 1. Typical Output Characteristics
10
100
Fig 2. Typical Output Characteristics
100
100
10
BOTTOM
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
TOP
ID, Drain-to-Source Current (A)
TOP
ID, Drain-to-Source Current (A)
1
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
1
2.3V
10
BOTTOM
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
2.3V
1
≤ 60µs PULSE WIDTH
Tj = 150°C
≤ 60µs PULSE WIDTH
Tj = 150°C
0.1
0.1
0.1
1
10
0.1
100
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Fig 4. Typical Output Characteristics
100.0
10.0
ID, Drain-to-Source Current(Α)
100.0
ID, Drain-to-Source Current(Α)
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V
TJ = 150°C
1.0
TJ = 25°C
VDS = 15V
≤ 60µs PULSE WIDTH
0.1
10.0
TJ = 150°C
1.0
TJ = 25°C
VDS = 15V
≤ 60µs PULSE WIDTH
0.1
1.0
2.0
3.0
4.0
5.0
6.0
1.0
2.0
3.0
4.0
5.0
VGS, Gate-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
Fig 6. Typical Transfer Characteristics
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3
IRF7905PbF
Typical Characteristics
Q1 - Control FET
10000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
C, Capacitance (pF)
10000
Q2 - Synchronous FET
1000
Ciss
Coss
100
Crss
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
1000
Ciss
Coss
100
Crss
10
10
1
10
1
100
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Capacitance vs. Drain-to-Source Voltage
12
ID= 6.3A
VDS= 25V
VDS= 16V
VDS= 7.6V
10
VGS, Gate-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
12
8
6
4
2
0
ID= 7.1A
8
6
4
2
0
0
2
4
6
8
10
0
4
QG Total Gate Charge (nC)
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
1msec
10
1
100µsec
10msec
100msec
TA = 25°C
Tj = 150°C
Single Pulse
0.01
0.01
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 11. Maximum Safe Operating Area
4
12
16
Fig 10. Typical Gate Charge vs. Gate-to-Source
Voltage
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
1000
8
QG, Total Gate Charge (nC)
Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage
0.1
VDS= 25V
VDS= 16V
VDS= 7.6V
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
1msec
10
1
0.1
100µsec
10msec
100msec
TA = 25°C
Tj = 150°C
Single Pulse
0.01
0.01
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 12. Maximum Safe Operating Area
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IRF7905PbF
Typical Characteristics
Q1 - Control FET
Q2 - Synchronous FET
2.0
ID = 7.8A
VGS = 10V
RDS(on), Drain-to-Source On Resistance
(Normalized)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
1.5
1.0
0.5
VGS = 10V
1.5
1.0
0.5
-60 -40 -20
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 13. Normalized On-Resistance vs. Temperature
-60 -40 -20
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 14. Normalized On-Resistance vs. Temperature
100
ISD , Reverse Drain Current (A)
100.0
ISD, Reverse Drain Current (A)
ID = 8.9A
TJ = 150°C
10.0
1.0
TJ = 25°C
TJ = 150°C
10
1
TJ = 25°C
VGS = 0V
VGS = 0V
0.1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
0.2
1.4
50
ID = 7.8A
40
TJ = 125°C
TJ = 25°C
10
2
4
6
8
10
VGS, Gate-to-Source Voltage (V)
Fig 17. Typical On-Resistance vs.Gate Voltage
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0.8
1.0
1.2
1.4
Fig 16. Typical Source-Drain Diode Forward Voltage
( Ω)
RDS (on), Drain-to -Source On Resistance m
( Ω)
RDS (on), Drain-to -Source On Resistance m
Fig 15. Typical Source-Drain Diode Forward Voltage
20
0.6
VSD, Source-to-Drain Voltage (V)
VSD, Source-to-Drain Voltage (V)
30
0.4
50
ID = 8.9A
40
30
TJ = 125°C
20
TJ = 25°C
10
2
4
6
8
10
VGS, Gate-to-Source Voltage (V)
Fig 18. Typical On-Resistance vs.Gate Voltage
5
IRF7905PbF
Typical Characteristics
Q1 - Control FET
Q2 - Synchronous FET
10
8
6
ID, Drain Current (A)
ID, Drain Current (A)
8
4
2
6
4
2
0
0
25
50
75
100
125
150
25
50
TJ, Ambient Temperature (°C)
150
2.4
VGS(th), Gate threshold Voltage (V)
VGS(th, Gate threshold Voltage (V)
125
Fig 20. Maximum Drain Current vs. Ambient Temp.
2.2
2.0
ID = 250µA
1.8
1.6
1.4
1.2
2.2
2.0
ID = 250µA
1.8
1.6
1.4
1.2
1.0
-75
-50
-25
0
25
50
75
100
125
150
-75
-50
-25
TJ , Temperature ( °C )
25
50
75
100
125
150
Fig 22. Threshold Voltage vs. Temperature
EAS, Single Pulse Avalanche Energy (mJ)
50
I D
TOP
3.0A
3.5A
BOTTOM 6.2A
40
0
TJ , Temperature ( °C )
Fig 21. Threshold Voltage vs. Temperature
EAS, Single Pulse Avalanche Energy (mJ)
100
TJ, Ambient Temperature (°C)
Fig 19. Maximum Drain Current vs. Ambient Temp.
30
20
10
80
I D
3.2A
3.7A
BOTTOM 7.1A
TOP
60
40
20
0
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 23. Maximum Avalanche Energy vs. Drain Current
6
75
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 24. Maximum Avalanche Energy vs. Drain Current
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IRF7905PbF
100
Thermal Response ( ZthJA )
D = 0.50
0.20
10
0.10
0.05
0.02
0.01
1
τJ
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
τ3
τ4
τa
τ2
τ1
τ2
τ3
τ4
Ci= τi/Ri
Ci i/Ri
0.1
Ri (°C/W) τι (sec)
2.195355 0.000149
8.470326 0.019287
36.46787 0.63002
15.37789
15.12
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Ta
SINGLE PULSE
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 25. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q1)
100
Thermal Response ( ZthJA )
D = 0.50
0.20
10
0.10
0.05
0.02
0.01
1
τJ
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
τ3
τ4
τa
τ2
τ1
τ2
τ3
τ4
Ci= τi/Ri
Ci i/Ri
0.1
Ri (°C/W) τι (sec)
2.073115 0.000216
9.069028 0.028592
36.96639 0.75582
14.40736
21
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Ta
SINGLE PULSE
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1, Rectangular Pulse Duration (sec)
Fig 26. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q2)
L
S2
1
8
D2
G2
2
7
D2
S1
3
6
D1
G1
4
5
D1
Co
Vo
Cin
GND
Vin
Fig 27. Layout Diagram
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7
IRF7905PbF
Driver Gate Drive
D.U.T
ƒ
-
‚
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 28. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
D.U.T
RG
VGS
20V
DRIVER
L
VDS
tp
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 29a. Unclamped Inductive Test Circuit
Fig 29b. Unclamped Inductive Waveforms
VDS
15V
90%
DRIVER
L
VDS
10%
D.U.T
RG
+
V
- DD
IAS
20V
A
VGS
td(on)
0.01Ω
tp
Fig 30a. Switching Time Test Circuit
Current Regulator
Same Type as D.U.T.
tr
td(off)
Fig 30b. Switching Time Waveforms
Id
Vds
Vgs
50KΩ
12V
tf
.2µF
.3µF
D.U.T.
+VDS
Vgs(th)
VGS
-3mA
IG
ID
Current Sampling Resistors
Fig 31a. Gate Charge Test Circuit
8
Qgs1 Qgs2
Qgd
Qgodr
Fig 31b. Gate Charge Waveform
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IRF7905PbF
SO-8 Package Outline(Mosfet & Fetky)
Dimensions are shown in milimeters (inches)
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SO-8 Part Marking Information
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Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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9
IRF7905PbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, Q1: L = 0.62mH
RG = 25Ω, IAS = 6.2A; Q2: L = 0.72mH
RG = 25Ω, IAS = 7.1A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ When mounted on 1 inch square copper board.
Rθ is measured at TJ approximately 90°C.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2008
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www.irf.com
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