AND8028/D Precision Sub-One Volt 1.7 Ampere Output LDO Jason Hansen ON Semiconductor http://onsemi.com APPLICATION NOTE INTRODUCTION Figure 1 for the circuit schematic. Since a PNP transistor is implemented, the signal from the precision reference needs to be inverted. A small signal NPN, Q2, is used for this purpose. There is a voltage differential issue with driving the base of a NPN, 0.6 to 0.7 volt turn on, from the NCP100 cathode, 0.9 volts minimum. To level shift the voltages, a diode will be placed between the cathode and the gate. A resistor, R5, from gate to ground is used for two purposes: pull the gate to ground for turn off and provide a bias current through the diode to set a minimum voltage drop. If the minimum voltage drop is not set properly, the NPN will have a small base current that will be amplified by the NPN and the PNP providing a voltage runaway condition at the output voltage during light or no load. In addition to Q2 to invert the control signal from the NCP100, R6 is used to pull up the gate to the input voltage to turn off the MBT35200MT1. R4 is an over current protection resistor. R4 is determined by subtracting the minimum input voltage from the maximum Vbe of Q1 and maximum Vsat of Q2, then dividing by the base current of Q1. C3, a 1 microfarad capacitor, is necessary to support the NCP100 for normal operation. Its purpose is to stabilize the operation of the precision reference. It has a negligible effect on the response time of the system. R1 and R2 are the resistor divider feedback network. C4 is used for fast transient response of the system. R3 provides the DC bias for the NCP100. The value of R3 is limited by the response of the system at low line and low load. If the value of R3 is too large, oscillations occur on the output. If R3 is too small, the output voltage will run away at high line and low load. The following Application Note is a description of a 0.9 volt 1.7 ampere output LDO with an explanation of each circuit element. The dropout voltage is 230 millivolts for 1.7 amperes or 34 millivolts for light loads. Depending upon system design, the minimum input voltage can be less than 1.4 volts. SYSTEM DESIGN For an accurate output voltage, a precision voltage reference must be used for the feedback network. A device should not be used if the output voltage is within a 20% margin from the reference voltage. Since the output voltage is below 1.0 volts, the traditional TL431 and TLV431 programmable precision references cannot be used. Instead the NCP100 is selected with its 0.7 volt reference. With a low reference level, 0.9 volts is attainable with a greater than 20% margin. In selecting the pass transistor, one must decide between a NPN and a PNP. Since this design is from a single supply, the NPN drop out voltage minimum is the greater of the saturation voltage from collector to emitter or the base to emitter on voltage. For the PNP the minimum voltage drop from input to output is the saturation voltage of emitter to collector. To maximize the output current and minimize the voltage drop, the MBT35200MT1 PNP is selected for this design. This PNP has a 2.0 ampere collector current, maximum emitter to collector saturation voltage of 0.31 volts, typical DC current gain of 200, and maximum emitter to base voltage of 0.875 volts. With the voltage reference and the pass element selected, the remaining components in the circuit are placed. Refer to Semiconductor Components Industries, LLC, 2000 August, 2000 – Rev. 0 1 Publication Order Number: AND8028/D AND8028/D Q1 MBT35200MT1 Vout Vin C4 1n R1 1.5 k C2 100 R6 1k R4 10 R3 18 C1 100 Q2 MBT3904 NCP100 U1 C3 1 R2 4.3 k R5 300 D1 MRA4003T3 Figure 1. Circuit Schematic for 0.9 Volt 1.7 Ampere LDO RESULTS Utilizing the circuit in Figure 1, layout in Figure 3 and values in Table 1, the output voltage varies 40 millivolts between 1.5 volts to 3.0 volts and 0 amperes to 1.7 amperes for an output voltage centered at 0.945 volts, which equates to a +/– 2.5 % variation for load and line. The voltage droop due to load transient is small as seen in Figure 2. If R1 is varied to change the output voltage to 1.8 volts, the minimum drop out voltage is 34 millivolts under light load conditions and 230 millivolts for 1.7 amperes. The minimum input voltage to operate of the circuit in Figure 1 is 1.42 volts for 1.7 amperes and 1.37 volts for 0.5 amperes. As discussed previously, the operating range of this circuit can vary depending upon R3. Vout: 200 mV/div Iout: 0.5 A/div Time Scale: 100 us/div Figure 2. Load Transient for 1.8 Volts In and Load from 0.5 Amperes to 1.5 Amperes http://onsemi.com 2 AND8028/D Out GND In C2 + C1 + C3 U1 R2 R1 Q1 R3 C4 R6 D1 R4 Q2 R5 Figure 3. Layout of NCP100/MBT35200 LDO (4x) Table 1. Part Description for LDO Circuit Reference Part Description C1 100 u AVX Tantalum SMT C2 100 u AVX Tantalum SMT C3 1u 0805 Ceramic Chip Cap C4 1n 0805 Ceramic Chip Cap D1 MRA4003T3 ON Semiconductor SMA Diode JP1 Connector 3 Pin Connector Q1 MBT35200 ON Semiconductor TSOP–6 PNP Q2 MBT3904 ON Semiconductor SOT–23 NPN R1 1.5 k 1206 Chip Resistor R2 4.3 k 0805 Chip Resistor R3 18 0805 Chip Resistor R4 10 0805 Chip Resistor R5 300 0805 Chip Resistor R6 1k 0805 Chip Resistor U1 NCP100 ON Semiconductor Precision Reference http://onsemi.com 3 AND8028/D ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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