LTC4365 UV, OV and Reverse Supply Protection Controller FEATURES DESCRIPTION n The LTC®4365 protects applications where power supply input voltages may be too high, too low or even negative. It does this by controlling the gate voltages of a pair of external N-channel MOSFETs to ensure that the output stays within a safe operating range. n n n n n n n n n n Wide Operating Voltage Range: 2.5V to 34V Overvoltage Protection to 60V Reverse Supply Protection to –40V Blocks 50Hz and 60Hz AC Power No Input Capacitor or TVS Required for Most Applications Adjustable Undervoltage and Overvoltage Protection Range Charge Pump Enhances External N-Channel MOSFET Low Operating Current: 125μA Low Shutdown Current: 10μA Fault Status Output Compact 8-Lead, 3mm × 2mm DFN and TSOT-23 (ThinSOT™) Packages APPLICATIONS n n n n Portable Instrumentation Industrial Automation Laptops Automotive The LTC4365 can withstand voltages between –40V and 60V and has an operating range of 2.5V to 34V, while consuming only 125μA in normal operation. Two comparator inputs allow configuration of the overvoltage (OV) and undervoltage (UV) set points using an external resistive divider. A shutdown pin provides external control for enabling and disabling the MOSFETs as well as placing the device in a low current shutdown state. A fault output provides status of the gate pin pulling low. A fault is indicated when the part is in shutdown or the input voltage is outside the UV and OV set points. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT, No RSENSE and Hot Swap are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 12V Automotive Application Load Protected from Reverse and Overvoltage at VIN Si4946 VIN 12V VOUT 3A GATE VIN UV = 3.5V OV = 18V VIN VALID WINDOW VOUT GND LTC4365 510k 30V VOUT VOUT SHDN 1820k 10V/DIV FAULT UV –30V VIN 243k 1s/DIV OV 59k 4365 TA01b OV = 18V UV = 3.5V GND 4365 TA01a 4365f 1 LTC4365 ABSOLUTE MAXIMUM RATINGS Supply Voltage (Note 1) VIN .......................................................... –40V to 60V Input Voltages (Note 3) UV, SHDN .............................................. –0.3V to 60V OV ............................................................ –0.3V to 6V VOUT....................................................... –0.3V to 40V Output Voltages (Note 4) FAULT..................................................... –0.3V to 60V GATE ....................................................... –40V to 45V Operating Ambient Temperature Range LTC4365C ................................................ 0°C to 70°C LTC4365I .............................................–40°C to 85°C LTC4365H .......................................... –40°C to 125°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec) for TSOT Only ................................................... 300°C PIN CONFIGURATION TOP VIEW GND 1 OV 2 UV 3 VIN 4 9 GND 8 SHDN 7 FAULT 6 VOUT 5 GATE TOP VIEW VIN UV OV GND 1 2 3 4 8 7 6 5 GATE VOUT FAULT SHDN TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150°C, θJA = 195°C/W DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN TJMAX = 150°C, θJA = 76°C/W EXPOSED PAD (PIN 9) PCB GROUND CONNECTION OPTIONAL ORDER INFORMATION Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4365CDDB#TRMPBF LTC4365CDDB#TRPBF LFKS 8-Lead (3mm × 2mm) Plastic DFN 0°C to 70°C LTC4365IDDB#TRMPBF LTC4365IDDB#TRPBF LFKS 8-Lead (3mm × 2mm) Plastic DFN –40°C to 85°C LTC4365HDDB#TRMPBF LTC4365HDDB#TRPBF LFKS 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LTC4365CTS8#TRMPBF LTC4365CTS8#TRPBF LTFKT 8-Lead Plastic TSOT-23 0°C to 70°C LTC4365ITS8#TRMPBF LTC4365ITS8#TRPBF LTFKT 8-Lead Plastic TSOT-23 –40°C to 85°C LTC4365HTS8#TRMPBF LTC4365HTS8#TRPBF LTFKT 8-Lead Plastic TSOT-23 –40°C to 125°C TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 4365f 2 LTC4365 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 34V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN VIN Input Voltage Range Operating Range Protection Range l l IVIN Input Supply Current SHDN = 0V, VIN = VOUT, –40°C to 85°C SHDN = 0V, VIN = VOUT, –40°C to 125°C SHDN = 2.5V l l l IVIN(R) Reverse Input Supply Current VIN = –40V, VOUT = 0V l VIN(UVLO) Input Supply Undervoltage Lockout VIN Rising l IVOUT VOUT Input Current SHDN = 0V, VIN = VOUT SHDN = 2.5V, VIN = VOUT VIN = –40V, VOUT = 0V l l l ΔVGATE N-Channel Gate Drive (GATE-VOUT ) VIN = VOUT = 5.0V, IGATE = –1μA VIN = VOUT = 12V to 34V, IGATE = –1μA l l IGATE(UP) N-Channel Gate Pull Up Current GATE = VIN = VOUT = 12V IGATE(FAST) N-Channel Gate Fast Pull Down Current IGATE(SLOW) N-Channel Gate Gentle Pull Down Current TYP MAX UNITS VIN, VOUT 2.5 –40 34 60 V V 10 10 25 50 100 150 μA μA μA –1.2 –1.8 mA 2.2 2.4 V 6 100 20 30 250 50 μA μA μA 3 7.4 3.6 8.4 4.2 9.8 V V l –12 –20 –30 μA Fast Shutdown, GATE = 20V, VIN = VOUT = 12V l 31 50 72 mA Gentle Shutdown, GATE = 20V, VIN = VOUT = 12V l 50 90 150 μA tGATE(FAST) N-Channel Gate Fast Turn Off Delay CGATE = 2.2nF, UV or OV Fault l 2 4 μs tGATE(SLOW) N-Channel Gentle Turn Off Delay CGATE = 2.2nF, SHDN Falling, VIN = VOUT = 12V l 150 250 350 μs GATE Recovery Delay Time VIN = 12V, Power Good to ∆VGATE > 0V l 26 36 49 ms UV Input Threshold Voltage UV Falling → ΔVGATE = 0V l 492.5 500 507.5 mV VOV OV Input Threshold Voltage OV Rising → ΔVGATE = 0V l 492.5 500 507.5 mV VUVHYST UV Input Hysteresis l 20 25 32 mV VOVHYST OV Input Hysteresis l 20 25 32 mV ILEAK UV, OV Leakage Current V = 0.5V, VIN = 34V l ±10 nA tFAULT UV, OV Fault Propagation Delay Overdrive = 50mV VIN = VOUT = 12V l 2 μs VSHDN SHDN Input Threshold SHDN Falling to ΔVGATE = 0V l ISHDN SHDN Input Current SHDN = 0.75V, VIN = 34V l tSTART Delay Coming Out of Shutdown Mode SHDN Rising to ΔVGATE > 0V, VIN = VOUT = 12V l tSHDN(F) SHDN to FAULT Asserted VIN = VOUT = 12V l tLOWPWR Delay from Turn Off to Low Power Operation VIN = VOUT = 12V l VOL FAULT Output Voltage Low IFAULT = 500μA IFAULT FAULT Leakage Current FAULT = 5V, VIN = 34V 1.8 GATE tRECOVERY UV, OV VUV 1 SHDN 0.4 1.2 V ±10 nA 800 1200 μs 1.5 3 μs 36 55 ms l 0.15 0.4 V l ±20 400 26 0.75 FAULT Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. nA Note 3. These pins can be tied to voltages below –0.3V through a resistor that limits the current below 1mA. Note 4. The GATE pin is referenced to VOUT and does not exceed 44V for the entire operating range. 4365f 3 LTC4365 TYPICAL PERFORMANCE CHARACTERISTICS VIN Operating Current vs Temperature VIN Shutdown Current vs VIN VIN Current vs VIN (–40 to 60V) 30 100 400 VIN = VOUT SHDN = 0V SHDN = 2.5V VOUT = VIN SHDN = UV = 0V 25 80 0 125°C VIN = 34V 25°C IVIN (μA) VIN = 12V 40 IVIN (μA) IVIN (μA) 20 60 70°C 15 25°C –45°C –400 –800 125°C 10 –45°C 20 VIN = 2.5V 0 –50 0 –25 –1200 5 75 25 0 50 TEMPERATURE (°C) 100 5 0 125 10 20 15 VIN (V) 30 25 –1600 –50 200 25 SHDN = 0V VIN = VOUT SHDN = 2.5V VIN = VOUT 160 VOUT = 0V 20 15 –45°C VOUT = 34V IVOUT (μA) IVOUT (μA) VOUT = 34V 10 VOUT = 12V 15 25°C 10 125°C 5 40 75 VOUT Current vs Reverse VIN 20 80 50 4365 G03 VOUT Shutdown Current vs Temperature VOUT = 12V 25 0 4365 G02 VOUT Operating Current vs Temperature 120 –25 VIN (V) 4365 G01 IVOUT (μA) 35 25°C 5 VOUT = 2.5V VOUT = 2.5V 0 –50 –25 0 75 25 50 TEMPERATURE (C°) 100 0 –50 125 –25 0 25 75 50 TEMPERATURE (C°) 100 GATE Drive vs VIN 8 VIN = VOUT = 12V IGATE = –1μA VIN = VOUT = 12V 20 IGATE(UP) (μA) ΔVGATE (V) 6 4 4 VIN = VOUT = 2.5V 2 T = 25°C IGATE = –1μA 0 0 5 10 15 20 VIN (V) 25 30 35 4365 G07 –50 125°C VOUT = VIN 2 –40 25 VIN = VOUT = 34V 6 –30 –20 VIN (V) GATE Current vs GATE Drive GATE Drive vs Temperature 10 8 –10 4365 G06 10 VOUT = 0V ΔVGATE (V) 0 4365 G05 4365 G04 12 0 125 0 –50 –25 75 25 0 50 TEMPERATURE (°C) 15 25°C 10 –45°C 5 100 0 125 4365 G08 0 2 4 6 ΔVGATE (V) 8 10 4365 G09 4365f 4 LTC4365 TYPICAL PERFORMANCE CHARACTERISTICS OV Threshold vs Temperature UV Threshold vs Temperature 507.5 UV/OV Leakage vs Temperature 507.5 VIN = VOUT = 12V 1.00 VIN = VOUT = 12V 505.0 505.0 502.5 502.5 VUV/OV = 0.5V VIN = 12V 500.0 ILEAK (nA) VOV (mV) VUV (mV) 0.75 500.0 497.5 497.5 495.0 495.0 492.5 –50 492.5 –50 0.50 0.25 UV OV 75 0 50 25 TEMPERATURE (°C) 100 125 –25 75 0 50 25 TEMPERATURE (°C) 4365 G10 –25 75 25 125 TEMPERATURE (°C) Recovery Delay Time vs VIN 50 VIN = VOUT = 12V T = 25°C 175 4365 G12 Recovery Delay Time vs Temperature 50 –45°C 16 40 tRECOVERY (ms) tFAULT (μs) 125 4365 G11 UV/OV Propagation Delay vs Overdrive 20 100 12 8 125°C 40 VIN = 34V VIN = 12V tRECOVERY (ms) –25 0 –75 30 20 25°C 30 20 VIN = 2.5V 4 10 0 1 0 –50 1000 10 100 OVERDRIVE (mV) 10 –25 75 25 0 50 TEMPERATURE (°C) 4365 G13 VOUT GND 5V/DIV 100μF, 12Ω LOAD ON VOUT 60V SI9945 DUAL NCH MOSFET VIN = 12V 10 20 15 VIN (V) 25 35 30 4365 G15 Turn-Off Timing GATE GATE 100μF, 12Ω LOAD ON VOUT 60V SI9945 DUAL NCH MOSFET 5V/DIV VOUT VOUT GND GATE 5 0 Turn-On Timing VIN 20V/DIV 0 125 4365 G14 AC Blocking 1V/DIV 100 GND GND 10μF, 1k LOAD ON VOUT 60V DUAL NCH MOSFET 2.5ms/DIV 4365 G16 3V/DIV SHDN GND 250μs/DIV 4365 G17 3V/DIV SHDN GND 250μs/DIV 4365 G18 4365f 5 LTC4365 PIN FUNCTIONS Exposed Pad: Connect to device ground. FAULT: Fault Indication Output. This high voltage open drain output is pulled low if UV is below its monitor threshold, if OV is above its monitor threshold, if SHDN is low, or if VIN has not risen above VIN(UVLO). GATE: Gate Drive Output for External N-channel MOSFETs. An internal charge pump provides 20μA of pull-up current and up to 9.8V of enhancement to the gate of an external N-channel MOSFET. When turned off, GATE is pulled just below the lower of VIN or VOUT. When VIN goes negative, GATE is automatically connected to VIN. GND: Device Ground. OV: Overvoltage Comparator Input. Connect this pin to an external resistive divider to set the desired VIN overvoltage fault threshold. Input to an accurate, fast (1μs) comparator with a 0.5V rising threshold and 25mV of hysteresis. When OV rises above its threshold, a 50mA current sink pulls down on the GATE output. When OV falls back below 0.475V, and after a 36ms recovery delay waiting period, the GATE charge pump is enabled. The low leakage current of the OV input allows the use of large valued resistors for the external resistive divider. Connect to GND if unused. pull down on the GATE output with a 90μA current sink and places the LTC4365 in low current mode (10μA). If unused, connect to VIN. If VIN goes below ground, or if VIN rings to 60V, use a current limiting resistor of at least 100k. UV: Undervoltage Comparator Input. Connect this pin to an external resistive divider to set the desired VIN undervoltage fault threshold. Input to an accurate, fast (1μs) comparator with a 0.5V falling threshold and 25mV of hysteresis. When UV falls below its threshold, a 50mA current sink pulls down on the GATE output. When UV rises back above 0.525V, and after a 36ms recovery delay waiting period, the GATE charge pump is enabled. The low leakage current of the UV input allows the use of large valued resistors for the external resistive divider. If unused, connect to VIN. While connected to VIN, if VIN goes below ground, or if VIN rings to 60V, use a current limiting resistor of at least 100k. VIN: Power Supply Input. Maximum protection range: –40V to 60V. Operating range: 2.5V to 34V. VOUT: Output Voltage Sense Input. This pin senses the voltage at the output side of the external N-channel MOSFET. The GATE charge pump voltage is referenced to VOUT. It is used as the charge pump input when VOUT is greater than approximately 6.5V. SHDN: Shutdown Control Input. SHDN high enables the GATE charge pump which in turn enhances the gate of an external N-channel MOSFET. A low on SHDN generates a 4365f 6 LTC4365 BLOCK DIAGRAM REVERSE PROTECTION VIN –40V TO 60V GATE – + CLOSES SWITCH WHEN VIN IS NEGATIVE 5V INTERNAL SUPPLY LDO 6.5V INTERNAL SUPPLY VOUT ENABLE 2.2V UVLO UV SHDN DELAY TIMERS + + IGATE FAULT OFF TURN OFF SHDN LOGIC – OV GATE CHARGE PUMP f = 400kHz 50mA 25mV HYSTERESIS 90μA FAULT GATE PULLDOWN – 0.5V GND 4365 BD 4365f 7 LTC4365 OPERATION Many of today’s electronic systems get their power from external sources such as a wall wart adapter, batteries and custom power supplies. These power sources are often unreliable, wired incorrectly, out of spec, or just plain wrong. This can lead to supply voltages that are too high, too low, or even negative. If these power sources are applied directly to the electronic systems, the systems could be subject to damage. The LTC4365 is an input voltage fault protection N-channel MOSFET controller. The part isolates an input supply from its load to protect the load from unexpected supply voltage conditions, while providing a low loss path for qualified power. To protect electronic systems from improperly connected power supplies, system designers will often add discrete diodes, transistors and high voltage comparators. The high voltage comparators enable system power only if the input supply falls within a desired voltage window. A Schottky diode or P-channel MOSFET typically added in series with the supply protects against reverse supply connections. The LTC4365 provides accurate overvoltage and undervoltage comparators to ensure that power is applied to the system only if the input supply meets the user selectable voltage window. Reverse supply protection circuits automatically isolate the load from negative input voltages. During normal operation, a high voltage charge pump enhances the gate of external N-channel power MOSFETs. Power consumption is 10μA during shutdown and 125μA while operating. The LTC4365 integrates all these functions in tiny TSOT-23 and 3mm × 2mm DFN packages. APPLICATIONS INFORMATION The LTC4365 is an N-channel MOSFET controller that protects a load from faulty supply connections. A basic application circuit using the LTC4365 is shown in Figure 1. The circuit provides a low loss connection from VIN to VOUT as long as the voltage at VIN is between 3.5V and SI4946 60V DUAL VIN 12V NOMINAL VOUT 3.5V TO 18V M1 M2 + COUT 100μF 18V. Voltages at VIN outside of the 3.5V to 18V range are prevented from getting to the load and can be as high as 60V and as low as –40V. The circuit of Figure 1 protects against negative voltages at VIN as shown. No other external components are needed. During normal operation, the LTC4365 provides up to 9.8V of gate enhancement to the external back-to-back N-channel MOSFETs. This turns on the MOSFET, thus connecting the load at VOUT to the supply at VIN. GATE Drive GATE VIN R5 100k R3 1820k VOUT The LTC4365 turns on the external N-channel MOSFETs by driving the GATE pin above VOUT. The voltage difference between the GATE and VOUT pins (gate drive) is a function of VIN and VOUT. LTC4365 SHDN FAULT UV R2 243k OV R1 59k OV = 18V UV = 3.5V GND 4365 F01 Figure 1. LTC4365 Protects Load from –40V to 60V VIN Faults 4365f 8 LTC4365 APPLICATIONS INFORMATION Figure 2 highlights the dependence of the gate drive on VIN and VOUT. When system power is first turned on (SHDN low to high, VOUT = 0V), gate drive is at a maximum for all values of VIN. This helps prevent start-up problems into heavy loads by ensuring that there is enough gate drive to support the load. As VOUT ramps up from 0V, the absolute value of the GATE voltage remains fixed until VOUT is greater than the lower of (VIN –1V) or 6V. Once VOUT crosses this threshold, gate drive begins to increase up to a maximum of 9.8V (for VIN ≥ 12V). The curves of Figure 2 were taken with a GATE load of –1μA. If there were no load on GATE, the gate drive for each VIN would be slightly higher. Note that when VIN is at the lower end of the operating range, the external N-channel MOSFET must be selected with a corresponding lower threshold voltage. The LTC4365 provides two accurate comparators to monitor for overvoltage (OV) and undervoltage (UV) conditions at VIN. If the input supply rises above the user adjustable OV threshold, the gate of the external MOSFET is quickly turned off, thus disconnecting the load from the input. Similarly, if the input supply falls below the user adjustable UV threshold, the gate of the external MOSFET also is quickly turned off. Figure 3 shows a UV/OV application for an input supply of 12V. 12V UV UVTH = 3.5V R1 59k 8 0.5V – + 25mV OV COMPARATOR OV OVTH = 18V VIN = 30V UV COMPARATOR R3 1820k T = 25°C IGATE = –1μA 10 LTC4365 VIN R2 243k 12 ΔVGATE (V) Overvoltage and Undervoltage Protection DISCHARGE GATE WITH 50mA SINK + 25mV 0.5V – 6 4365 F03 VIN = 12V 4 VIN = 5V 2 Figure 3. UV, OV Comparators Monitor 12V Supply VIN = 3.3V VIN = 2.5V 0 0 3 6 9 VOUT (V) 12 15 4365 F02 Figure 2. Gate Drive (GATE – VOUT) vs VOUT Table 1 lists some external MOSFETs compatible with different VIN supply voltages. Table 1. Dual MOSFETs for Various Supply Ranges VIN MOSFET V TH(MAX) VGS(MAX) VDS(MAX) 2.5V SiB914 0.8V 5V 8V 3.3V Si5920 1.0V 5V 8V 5V Si7940 1.5V 8V 12V ≤30V Si4230 3.0V 20V 30V ≤60V Si9945 3.0V 20V 60V The external resistive divider allows the user to select an input supply range that is compatible with the load at VOUT. Furthermore, the UV and OV inputs have very low leakage currents (typically < 1nA at 100°C), allowing for large values in the external resistive divider. In the application of Figure 3, the load is connected to the supply only if VIN lies between 3.5V and 18V. In the event that VIN goes above 18V or below 3.5V, the gate of the external N-channel MOSFET is immediately discharged with a 50mA current sink, thus isolating the load from the supply. 4365f 9 LTC4365 APPLICATIONS INFORMATION Figure 4 shows the timing associated with the UV pin. Once a UV fault propagates through the UV comparator (tFAULT), the FAULT output is asserted low and a 50mA current sink discharges the GATE pin. As VOUT falls, the GATE pin tracks VOUT. UV VUV tFAULT FAULT tGATE(FAST) tRECOVERY EXTERNAL N-CHANNEL MOSFET TURNS OFF GATE 4365 F04 Figure 4. UV Timing (OV < (VOV – VOVHYST), SHDN > 1.2V) Figure 5 shows the timing associated with the OV pin. Once an OV fault propagates through the OV comparator (tFAULT), the FAULT output is asserted low and a 50mA current sink discharges the GATE pin. As VOUT falls, the GATE pin tracks VOUT. OV VOV R1+R2 = R3 = 2 • I UV VOS(UV) I UV ( • UV TH – 0.5V ) 3. Select the desired VIN OV trip threshold, OV TH. Find the values of R1 and R2: VOS(UV) tFAULT I UV R1= FAULT tGATE(FAST) VOS(UV) 2. Select the desired VIN UV trip threshold, UV TH. Find the value of R3: VOV – VOVHYST tFAULT GATE The following 3-step procedure helps select the resistor values for the resistive divider of Figure 3. This procedure minimizes UV and OV offset errors caused by leakage currents at the respective pins. 1. Choose maximum tolerable offset at the UV pin, VOS(UV). Divide by the worst case leakage current at the UV pin, IUV (10nA). Set the sum of R1 + R2 equal to VOS(UV) divided by 10nA. Note that due to the presence of R3, the actual offset at UV will be slightly lower: VUV + VUVHYST tFAULT Procedure for Selecting UV/OV External Resistor Values +R3 2 • OV TH tRECOVERY EXTERNAL N-CHANNEL MOSFET TURNS OFF 4365 F05 Figure 5. OV Timing (UV > (VUV + VUVHYST), SHDN > 1.2V) When both the UV and OV faults are removed, the external MOSFET is not immediately turned on. The input supply must remain within the user selected power good window for at least 36ms (tRECOVERY ) before the load is again connected to the supply. This recovery timeout period filters noise (including line noise) at the input supply and prevents chattering of power at the load. R2 = VOS(UV) I UV – R1 The example of Figure 3 uses standard 1% resistor values. The following parameters were selected: VOS(UV) = 3mV IUV = 10nA UV TH = 3.5V OV TH = 18V 4365f 10 LTC4365 APPLICATIONS INFORMATION The resistor values can then be solved: 1. R1+ R2 = 2. R3 = 2 • detected, an internal switch connects the gates of the external back-to-back N-channel MOSFETs to the negative input supply. 3mV = 300k 10nA As shown in Figure 6, external back-to-back N-channel MOSFETs are required for reverse supply protection. When VIN goes negative, the reverse VIN comparator closes the internal switch, which in turn connects the gates of the external MOSFETs to the negative VIN voltage. The body diode (D1) of M1 turns on, but the body diode (D2) of M2 remains in reverse blocking mode. This means that the common source connection of M1 and M2 remains about a diode drop higher than VIN. Since the gate voltage of M2 is shorted to VIN, M2 will be turned off and no current can flow from VIN to the load at VOUT. Note that the voltage rating of M2 must withstand the reverse voltage excursion at VIN. 3mV • (3.5V – 0.5V) =1.8M 10nA The closest 1% value: R3 = 1.82M: 3. R1 = 300k +1.82M = 58.9k 2 • 18V The closest 1% value: R1 = 59k: R2 = 300k – 59k = 241k The closest 1% value: R2 = 243k Therefore: OV = 17.93V, UV = 3.51V. Reverse VIN Protection The LTC4365’s rugged and hot-swappable VIN input helps protect the more sensitive circuits at the output load. If the input supply is plugged in backwards, or a negative supply is inadvertently connected, the LTC4365 prevents this negative voltage from passing to the output load. The LTC4365 employs a novel, high speed reverse supply voltage monitor. When the negative VIN voltage is D1 Figure 7 illustrates the waveforms that result when VIN is hot plugged to –20V. VIN, GATE and VOUT start out at ground just before the connection is made. Due to the parasitic inductance of the VIN and GATE connections, the voltage at the VIN and GATE pins ring significantly below –20V. Therefore, a 40V N-channel MOSFET was selected to survive the overshoot. The speed of the LTC4365 reverse protection circuits is evident by how closely the GATE pin follows VIN during the negative transients. The two waveforms are almost indistinguishable on the scale shown. D2 GND VIN = –40V TO LOAD + M1 VIN M2 GATE VOUT COUT VOUT 5V/DIV VIN –20V GATE LTC4365 REVERSE VIN COMPARATOR + GND – 500ns/DIV CLOSES SWITCH WHEN VIN IS NEGATIVE 4365 F07 Figure 7. Hot Swapping VIN to –20V 4365 F06 Figure 6. Reverse VIN Protection Circuits 4365f 11 LTC4365 APPLICATIONS INFORMATION The trace at VOUT, on the other hand, does not respond to the negative voltage at VIN, demonstrating the desired reverse supply protection. The waveforms of Figure 7 were captured using a 40V dual N-channel MOSFET, a 10μF ceramic output capacitor and no load current on VOUT. Recovery Timer The LTC4365 has a recovery delay timer that filters noise at VIN and helps prevent chatter at VOUT. After either an OV or UV fault has occurred, the input supply must return to the desired operating voltage window for at least 36ms in order to turn the external MOSFET back on as illustrated in Figures 4 and 5. to track VOUT, thus keeping the external MOSFETs off as VOUT decays. Note that when VOUT < 4.5V, the GATE pin is pulled to within 400mV of ground. Gentle gate turn off reduces load current slew rates and mitigates voltage spikes due to parasitic inductances. To further decrease GATE pin slew rate, place a capacitor across the gate and source terminals of the external MOSFETs. The waveforms of Figure 9 were captured using the Si4230 dual N-channel MOSFETs, and a 2A load with 100μF output capacitor. VIN = 12V T = 25°C GATE Going out of and then back into fault in less than 36ms will keep the MOSFET off continuously. Similarly, coming out of shutdown (SHDN low to high) triggers an 800μs start-up delay timer (see Figure 10). VOUT 5V/DIV SHDN GND The recovery timer is also active while the LTC4365 is powering up. The 36ms timer starts once VIN rises above VIN(UVLO) and VIN lies within the user selectable UV/OV power good window. See Figure 8. 4365 F9 100μs/DIV Figure 9. Gentle Shutdown: GATE Tracks VOUT as VOUT Decays VIN(UVLO) VIN FAULT Status tRECOVERY GATE MOSFET OFF MOSFET ON The FAULT high voltage open drain output is driven low if SHDN is asserted low, if VIN is outside the desired UV/OV voltage window, or if VIN has not risen above VIN(UVLO). Figures 4, 5 and 10 show the FAULT output timing. 4365 F08 SHDN Figure 8. Recovery Timing During Power-On (OV = GND, UV = SHDN = VIN) Gentle Shutdown The SHDN input turns off the external MOSFETs in a gentle, controlled manner. When SHDN is asserted low, a 90μA current sink slowly begins to turn off the external MOSFETs. Once the voltage at the GATE pin falls below the voltage at the VOUT pin, the current sink is throttled back and a feedback loop takes over. This loop forces the GATE voltage tGATE(SLOW) tSTART GATE ΔVGATE GATE = VOUT VOUT tSHDN(F) FAULT 4365 F10 Figure 10. Gentle Shutdown Timing 4365f 12 LTC4365 APPLICATIONS INFORMATION Select Between Two Input Supplies Limiting Inrush Current During Turn-On With the part in shutdown, the VIN and VOUT pins can be driven by separate power supplies. The LTC4365 then automatically drives the GATE pin just below the lower of the two supplies, thus turning off the external back-to-back MOSFETs. The application of Figure 11 uses two LTC4365s to select between two power supplies. Care should be taken to ensure that only one of the two LTC4365s is enabled at any given time. The LTC4365 turns on the external N-channel MOSFET with a 20μA current source. The maximum slew rate at the GATE pin can be reduced by adding a capacitor on the GATE pin: V1 M1 M2 Since the MOSFET acts like a source follower, the slew rate at VOUT equals the slew rate at GATE. VOUT LTC4365 OUT SHDN SEL OUT 0 V1 1 V2 M1 M2 GATE IINRUSH = COUT • 20µA CGATE For example, a 1A inrush current to a 330μF output capacitance requires a GATE capacitance of: V2 VIN 20µA CGATE Therefore, inrush current is given by: GATE VIN Slew Rate = VOUT CGATE = 20µA • COUT IINRUSH CGATE = 20µA • 330µF = 6.6nF 1A LTC4365 SHDN SEL 4365 F11 Figure 11. Selecting One of Two Supplies Single MOSFET Application When reverse VIN protection is not needed, only a single external N-channel MOSFET is necessary. The application circuit of Figure 12 connects the load to VIN when VIN is less than 30V, and uses the minimal set of external components. SI7120DN 60V VIN 24V The 6.8nF CGATE capacitor in the application circuit of Figure 13 limits the inrush current to approximately 1A. RGATE makes sure that CGATE does not affect the fast GATE turn off characteristics during UV/OV faults, or during reverse VIN connection. R4A and R4B help prevent high frequency oscillations with the external N-channel MOSFET and related board parasitics. VOUT + GATE VIN COUT 100μF VIN M1 M2 R4A 10Ω VOUT + R4B 10Ω VOUT COUT 330μF LTC4365 SHDN VIN FAULT UV GATE RGATE 5.1k VOUT CGATE 6.8nF LTC4365 R2 2370k OV R1 40.2k OV = 30V GND 4365 F13 4365 F12 Figure 13. Limiting Inrush Current with CGATE Figure 12. Small Footprint Single MOSFET Application Protects Against 60V 4365f 13 LTC4365 APPLICATIONS INFORMATION Transients During OV Fault MOSFET Selection The circuit of Figure 14 was used to display transients during an overvoltage condition. The nominal input supply is 24V and it has an overvoltage threshold of 30V. The parasitic inductance is that of a 1 foot wire (roughly 300nH). Figure 15 shows the waveforms during an overvoltage condition at VIN. These transients depend on the parasitic inductance and resistance of the wire along with the capacitance at the VIN node. D1 is an optional power clamp (TVS, Tranzorb) recommended for applications where the DC input voltage can exceed 24V and with large VIN parasitic inductance. No clamp was used to capture the waveforms of Figure 15. In order to maintain reverse supply protection, D1 must be a bi-directional clamp rated for at least 225W peak pulse power dissipation. To protect against a negative voltage at VIN, the external N-channel MOSFETs must be configured in a back-toback arrangement. Dual N-channel packages are thus the best choice. The MOSFET is selected based on its power handling capability, drain and gate breakdown voltages, and threshold voltage. VIN 24V 12 INCH WIRE LENGTH + SI9945 60V CIN 1000μF M1 + M2 GATE VIN R3 100k VOUT COUT 100μF VOUT LTC4365 SHDN D1 OPTIONAL Due to the high impedance nature of the charge pump that drives the GATE pin, the total leakage on the GATE pin must be kept low. The gate drive curves of Figure 2 were measured with a 1μA load on the GATE pin. Therefore, the leakage on the GATE pin must be no greater than 1μA in order to match the curves of Figure 2. Higher leakage currents will result in lower gate drive. The dual N-channel MOSFETs shown in Table 1 all have a maximum GATE leakage current of 100nA. Additionally, Table 1 lists representative MOSFETs that would work at different values of VIN. FAULT UV Layout Considerations R2 2370k OV R1 40.2k 9Ω The drain to source breakdown voltage must be higher than the maximum voltage expected between VIN and VOUT. Note that if an application generates high energy transients during normal operation or during Hot Swap™, the external MOSFET must be able to withstand this transient voltage. The trace length between the VIN pin and the drain of the external MOSFET should be minimized, as well as the trace length between the GATE pin of the LTC4365 and the gates of the external MOSFETs. OV = 30V GND 4365 F14 Figure 14. OV Fault with Large VIN Inductance GATE VOUT VOUT GATE 20V/DIV GND VIN 20V/DIV GND IIN 2A/DIV Place the bypass capacitors at VOUT as close as possible to the external MOSFET. Use high frequency ceramic capacitors in addition to bulk capacitors to mitigate Hot Swap ringing. Place the high frequency capacitors closest to the MOSFET. Note that bulk capacitors mitigate ringing by virtue of their ESR. Ceramic capacitors have low ESR and can thus ring near their resonant frequency. 0A 250ns/DIV 4365 F15 Figure 15. Transients During OV Fault When No Tranzorb (TVS) Is Used 4365f 14 LTC4365 PACKAGE DESCRIPTION TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.52 MAX 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 – 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 1.95 BSC 0.09 – 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 TS8 TSOT-23 0802 DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 ±0.05 (2 SIDES) 3.00 ±0.10 (2 SIDES) R = 0.115 TYP 5 R = 0.05 TYP 0.40 ± 0.10 8 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ±0.05 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 2.00 ±0.10 (2 SIDES) 0.56 ± 0.05 (2 SIDES) 0.75 ±0.05 0 – 0.05 4 0.25 ± 0.05 1 PIN 1 R = 0.20 OR 0.25 × 45° CHAMFER (DDB8) DFN 0905 REV B 0.50 BSC 2.15 ±0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 4365f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC4365 TYPICAL APPLICATION LTC4365 Protects Step Down Regulator from –30V to 30V VIN Faults CMDSH-3 SI4230 30V DUAL N-CHANNEL VIN 12V NOMINAL VOUT 0.18μF 3.5V TO 18V INPUT RANGE BOOST VIN 4.7μF CERAMIC VOUT PROTECTED FROM –30V TO 30V FB GND VC VOUT UPS120 4.7μF CERAMIC 2.2nF LTC4365 510k OUTPUT 3.3V 2.5A LT1765-3.3 SHDN SYNC GATE VIN 1.5μH VSW SHDN 1820k FAULT UV 243k OV OV = 18V UV = 3.5V GND 59k 4365 TA02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC4356 Surge Stopper Overvoltage/Overcurrent Protection Regulator Wide Operating Range: 4V to 80V, Reverse Protection to –60V, Adjustable Output Clamp Voltage LTC1696 Overvoltage Protection Controller ThinSOT Package, 2.7V to 28V LTC1735 High Efficiency Synchronous Step-Down Switching Regulator Output Fault Protection, 16-Pin SSOP LTC1778 No RSENSE ™ Wide Input Range Synchronous Step-Down Controller Up to 97% Efficiency, 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ (0.9)(VIN), IOUT Up to 20A LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies LTC3727/LTC3727-1 2-Phase, Dual, Synchronous Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 14V LTC3827/LTC3827-1 Low IQ, Dual, Synchronous Controller LTC3835/LTC3835-1 Low IQ, Synchronous Step-Down Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 80μA Quiescent Current Single Channel LTC3827/LTC3827-1 4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, 120μA Quiescent Current LT3845 Low IQ, Synchronous Step-Down Controller LT3850 Dual, 550kHz, 2-Phase Synchronous Step-Down Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm QFN-28, SSOP-28 Packages Controller LT4256 Positive 48V Hot Swap Controller with Open-Circuit Detect Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V Supply LTC4260 Positive High Voltage Hot Swap Controller with ADC and I2C Wide Operating Range 8.5V to 80V LTC4352 Ideal MOSFET ORing Diode External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V LTC4354 Negative Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 1μs Turn-Off, 80V Operation LTC4355 Positive Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 0.5μs Turn-Off, 80V Operation 4365f 16 Linear Technology Corporation LT 0910 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010