SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 D D D ’ALS174 and ’AS174 Contain Six Flip-Flops With Single-Rail Outputs ’ALS175 and ’AS175B Contain Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct-Clear Inputs SN54ALS174 . . . J OR W PACKAGE SN54AS174 . . . J PACKAGE SN74ALS174, SN74AS174 . . . D , N, OR NS PACKAGE (TOP VIEW) CLR 1Q 1D 2D 2Q 3D 3Q GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 D D Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators Fully Buffered Outputs for Maximum Isolation From External Disturbances (’AS Only) SN54ALS175 . . . J OR W PACKAGE SN54AS175B . . . J PACKAGE SN74ALS175, SN74AS175B . . . D, N, OR NS PACKAGE (TOP VIEW) CLR 1Q 1Q 1D 2D 2Q 2Q GND VCC 6Q 6D 5D 5Q 4D 4Q CLK 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 4Q 4Q 4D 3D 3Q 3Q CLK 1Q CLR NC VCC 4Q 6D 5D NC 5Q 4D 1Q 1D NC 2D 2Q 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4Q 4D NC 3D 3Q 2Q GND NC CLK 3Q 3Q GND NC CLK 4Q 1D 2D NC 2Q 3D 16 SN54ALS175 . . . FK PACKAGE (TOP VIEW) 1Q CLR NC VCC 6Q SN54ALS174, SN54AS174 . . . FK PACKAGE (TOP VIEW) 1 NC – No internal connection description These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR) input. The ’ALS175 and ’AS175B feature complementary outputs from each flip-flop. Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output. These circuits are fully compatible for use with most TTL circuits. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 ORDERING INFORMATION PDIP – N 0°C to 70°C Tube SOIC – D SOP – NS CFP – W SN74AS174N SN74AS174N SN74ALS175N SN74ALS175N SN74AS175BN SN74AS175BN SN74ALS174D SN74ALS174DR Tube SN74AS174D Tape and reel SN74AS174DR Tube SN74ALS175D Tape and reel SN74ALS175DR Tube SN74AS175BD Tape and reel SN74AS175BDR Tube LCCC – FK SN74ALS174N Tape and reel Tube Tube TOP-SIDE MARKING SN74ALS174N Tube Tape and reel CDIP – J –55°C to 125°C ORDERABLE PART NUMBER PACKAGE† TA ALS174 AS174 ALS175 AS175B SN74ALS174NSR ALS174 SN74AS174NSR 74AS174 SN74ALS175NSR ALS175 SN74AS175BNSR 74AS175B SNJ54ALS174J SNJ54ALS174J SNJ54AS174J SNJ54AS174J SNJ54ALS175J SNJ54ALS175J SNJ54AS175BJ SNJ54AS175BJ SNJ54ALS174W SNJ54ALS174W SNJ54ALS175W SNJ54ALS175W SNJ54ALS174FK SNJ54AS174FK‡ SNJ54ALS174FK SNJ54ALS175FK SNJ54AS174FK SNJ54ALS175FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ This orderable is not recommended for new designs. FUNCTION TABLE (each flip-flop) INPUTS CLR CLK OUTPUTS D Q Q§ L X X L H H ↑ H H L H ↑ L L H H L X Q0 Q0 § ’ALS175 and ’AS175B only 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 logic diagrams (positive logic) ’ALS174, ’AS174 CLR CLK 1D ’ALS175, ’AS175B 1 CLK 9 CLR 3 1D 1D C1 2 9 1 4 2 1D 1Q 1Q C1 R 3 R To Five Other Channels 1Q To Three Other Channels Pin numbers shown are for the D, J, N, NS, and W packages. absolute maximum ratings over operating free-air temperature range, SN54/74ALS174, SN54/74ALS175 (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Package thermal impedance, θJA (see Note 1): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) SN54ALS174 SN54ALS175 VCC VIH Supply voltage VIL IOH Low-level input voltage IOL TA Low-level output current High-level input voltage SN74ALS174 SN74ALS175 NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 High-level output current 2 –55 V V 0.8 0.8 V –0.4 –0.4 mA 8 mA 70 °C 4 Operating free-air temperature UNIT MIN 125 0 NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN54ALS174 SN54ALS175 TEST CONDITIONS MIN VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = –0.4 mA VOL VCC = 4 4.5 5V IOL = 4 mA IOL = 8 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL All others CLK IO‡ ICC ’ALS174 ’ALS175 5V VCC = 5 5.5 V, 4V VI = 0 0.4 VCC = 5.5 V, VO = 2.25 V VCC = 5 5.5 5V V, See Note 3 TYP† SN74ALS174 SN74ALS175 MAX MIN TYP† –1.5 VCC– 2 UNIT MAX –1.5 VCC– 2 0.25 0.4 V 0.25 0.4 0.35 0.5 V 0.1 0.1 mA 20 20 µA –0.1 –0.1 –0.15 –20 V –112 –30 –112 11 19 11 19 8 14 9 14 mA mA mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. NOTE 3: ICC is measured with D inputs and CLR grounded, and CLK at 4.5 V. timing requirements over recommended operating free-air temperature range (unless otherwise noted) SN54ALS174 SN54ALS175 MIN fclock Clock frequency 40 Pulse duration CLK high 12.5 10 CLK low 12.5 10 Set p time before CLK↑ Setup 15 10 8 6 th Hold time, data after CLK↑ 0 0 CLR inactive UNIT MAX 50 10 Data tsu MIN 15 CLR low tw MAX SN74ALS174 SN74ALS175 MHz ns ns ns switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ SN54ALS174 SN74ALS174 SN54ALS175 SN74ALS175 MIN fmax tPLH MAX 40 MIN MAX 50 MHz 3 20 5 18 5 30 8 23 3 20 3 Any yQ CLK (or Q, ’ALS175) tPHL 5 24 5 § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 15 tPHL tPLH 4 CLR POST OFFICE BOX 655303 Anyy Q (or Q, ’ALS175) • DALLAS, TEXAS 75265 UNIT 17 ns ns SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 absolute maximum ratings over operating free-air temperature range, SN54/74AS174, SN54/74AS175B (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Package thermal impedance, θJA (see Note 1): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) SN54AS174 SN54AS175B SN74AS174 SN74AS175B UNIT MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current –2 –2 mA IOL TA Low-level output current 20 20 mA 70 °C High-level input voltage 2 Operating free-air temperature 2 –55 125 V V 0 NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN54AS174 SN54AS175B MIN VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = –2 mA VOL II VCC = 4.5 V, VCC = 5.5 V, IOL = 20 mA VI = 7 V IIH IIL IO§ VCC = 5.5 V, VCC = 5.5 V, VI = 2.7 V VI = 0.4 V VCC = 5.5 V, VO = 2.25 V 5V VCC = 5 5.5 V, See Note 4 ICC ’AS174 ’AS175B TYP‡ SN74AS174 SN74AS175B MAX MIN TYP‡ –1.2 VCC– 2 UNIT MAX –1.2 VCC– 2 0.35 0.5 V 0.5 V 0.1 0.35 0.1 mA 20 20 µA –0.5 mA –112 mA –0.5 –30 V –112 –30 30 45 30 45 22.5 34 22.5 34 mA ‡ All typical values are at VCC = 5 V, TA = 25°C. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. NOTE 4: ICC is measured with D inputs, CLR, and CLK grounded. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 timing requirements over recommended operating free-air temperature range (unless otherwise noted) SN54AS174 SN54AS175B MIN fclock* Clock frequency tsu* MIN 100 CLR low tw* MAX SN74AS174 SN74AS175B CLK high Pulse duration 5 4 4 CLK low ’AS174 6 6 CLK low ’AS175B 5 5 ’AS174 4 4 ’AS175B 3 3 6 6 Data Setup time before CLK↑ ↑ 100 5.5 CLR inactive UNIT MAX MHz ns ns th* Hold time, data after CLK↑ 1 1 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data, but is not production tested. ns switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN54AS174 SN74AS174 MIN fmax* tPHL tPLH MAX 100 CLR Any Q MIN UNIT MAX 100 MHz 5 15 5 14 3.5 9.5 3.5 8 Any Q CLK tPHL 4.5 11.5 4.5 10 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data, but is not production tested. † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ns ns switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN54AS175B SN74AS175B MIN fmax* tPLH tPHL tPLH MAX 100 CLR A Q or Q Any CLK Any Q or Q MIN MAX 100 MHz 4 10 4 9 4.5 15 4.5 13 3 8.5 3 7.5 tPHL 3 11 3 10 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data, but is not production tested. † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns SN54ALS174, SN54ALS175, SN54AS174, SN54AS175B SN74ALS174, SN74ALS175, SN74AS174, SN74AS175B HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDAS207E - APRIL 1982 - REVISED MAY 2002 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V VCC RL = R1 = R2 S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ tPZH 1.3 V 1.3 V 0.3 V tPHL ≈3.5 V tPLH VOL 0.3 V VOH 1.3 V 3.5 V Input 1.3 V tPHZ Waveform 2 S1 Open (see Note B) 1.3 V 0.3 V ≈0 V VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 5962-9553701Q2A ACTIVE LCCC FK 20 1 TBD 5962-9553701QEA ACTIVE CDIP J 16 1 TBD Lead/Ball Finish MSL Peak Temp (3) POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 83019012A ACTIVE LCCC FK 20 1 TBD 8301901EA ACTIVE CDIP J 16 1 TBD POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 8301901FA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type 83019022A ACTIVE LCCC FK 20 1 TBD 8301902EA ACTIVE CDIP J 16 1 TBD POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 8301902FA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type JM38510/37201B2A ACTIVE LCCC FK 20 1 TBD JM38510/37201BEA ACTIVE CDIP J 16 1 TBD POST-PLATE N / A for Pkg Type JM38510/37202B2A ACTIVE LCCC FK 20 1 TBD JM38510/37202BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type SN54ALS174J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type SN54ALS175J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type SN54AS174J OBSOLETE CDIP J 16 TBD A42 SNPB N / A for Pkg Type SN54AS175BJ ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type SN74ALS174D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174N ACTIVE PDIP N 16 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS174N3 OBSOLETE PDIP N 16 TBD Call TI SN74ALS174NE4 ACTIVE PDIP N 16 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS174NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174NSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS174NSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175DR ACTIVE SOIC D 16 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM 25 25 Addendum-Page 1 Call TI PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74ALS175DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175N ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS175NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS175NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175NSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS175NSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS174D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AS174DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AS174DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AS174DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AS174DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AS174DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AS174N ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AS174NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AS174NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS174NSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS174NSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BDE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BDRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS175BN ACTIVE PDIP N 16 CU NIPDAU N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) 25 Addendum-Page 2 Pb-Free (RoHS) PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AS175BNE4 ACTIVE PDIP N 16 SN74AS175BNSR ACTIVE SO NS 16 SN74AS175BNSRE4 ACTIVE SO NS SN74AS175BNSRG4 ACTIVE SO SNJ54ALS174FK ACTIVE LCCC 25 Pb-Free (RoHS) Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU N / A for Pkg Type 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM FK 20 1 TBD POST-PLATE N / A for Pkg Type SNJ54ALS174J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type SNJ54ALS174W ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type SNJ54ALS175FK ACTIVE LCCC FK 20 1 TBD SNJ54ALS175J ACTIVE CDIP J 16 1 TBD SNJ54ALS175W ACTIVE CFP W 16 1 TBD SNJ54AS174FK NRND LCCC FK 20 1 TBD SNJ54AS174J NRND CDIP J 16 1 TBD SNJ54AS175BFK ACTIVE LCCC FK 20 1 TBD SNJ54AS175BJ ACTIVE CDIP J 16 1 TBD POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 9-Jun-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 9-Jun-2007 Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ALS174DR D 16 FMX 330 16 6.5 10.3 2.1 8 16 Q1 SN74ALS174NSR NS 16 MLA 330 16 8.2 10.5 2.5 12 16 Q1 SN74ALS175DR D 16 FMX 330 16 6.5 10.3 2.1 8 16 Q1 SN74ALS175NSR NS 16 MLA 330 16 8.2 10.5 2.5 12 16 Q1 SN74AS174DR D 16 FMX 330 16 6.5 10.3 2.1 8 16 Q1 SN74AS174NSR NS 16 MLA 330 16 8.2 10.5 2.5 12 16 Q1 SN74AS175BDR D 16 FMX 330 16 6.5 10.3 2.1 8 16 Q1 SN74AS175BNSR NS 16 MLA 330 16 8.2 10.5 2.5 12 16 Q1 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74ALS174DR D 16 FMX 342.9 336.6 28.58 SN74ALS174NSR NS 16 MLA 342.9 336.6 28.58 SN74ALS175DR D 16 FMX 342.9 336.6 28.58 SN74ALS175NSR NS 16 MLA 342.9 336.6 28.58 SN74AS174DR D 16 FMX 342.9 336.6 28.58 SN74AS174NSR NS 16 MLA 342.9 336.6 28.58 SN74AS175BDR D 16 FMX 342.9 336.6 28.58 SN74AS175BNSR NS 16 MLA 342.9 336.6 28.58 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Jun-2007 Pack Materials-Page 3 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security RFID www.ti-rfid.com Telephony www.ti.com/telephony Low Power Wireless www.ti.com/lpw Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated