* BR24L32-W/F-W/FJ-W/FV-W BR24L64-W/F-W Features Pin Configurations • 32k bit serial EEPROM organized as 4k × 8bit (BR24L32) 64k bit serial EEPROM organized as 8k × 8bit (BR24L64) • 2 wire bus serial interface (2 byte Address) • Low operating voltage range (2V operating) Read : 1.8~5.5V Write : 1.8~5.5V • Low current consumption Active : 3mA MAX Standby : 2µA MAX A0 1 8 Vcc A1 2 7 WP A2 3 6 SCL GND 4 5 SDA * DIP8/SOP8/SOP-J8/SSOP-B8 DIP8/SOP8 (Only BR24L64) Pin Functions • Clock frequency : 100kHz MAX (1.8~5.5V) 400kHz MAX (2.5~5.5V) • Write cycle time : 5ms MAX Functions Pin Names A0, A1, A2 • Address auto-increment function during read operation Slave Address Inputs • Automatic erase-before-write function during write operation • Page write function : 32byte GND Ground SDA Serial Data Input/Output • Inadvertent write protection function Inadvertent write protection at low voltage (Vcc Lock-out function) WP (Write Protect) function • Schmitt trigger circuit and noise filter are built into SCL and SDA pins • 1,000,000 write cycle typical SCL Serial Data Clock WP Write Protect Vcc Power Supply • 40 years data retention • Operating temperature range : -40~85˚C * Under development Block Diagram 32~64k bit EEPROM Array A0 A1 12bit: BR24L32 13bit: BR24L64 Address Decoder 8bit 12bit: BR24L32 13bit: BR24L64 Slave Words Address Register Data Register WP SCL SDA A2 START STOP Control Logic ACK High Voltage Generation Voltage Detection 9 . 1.8V L opeow vo ratin ltag e g 1 Wri,000,00 te c 0 ycle Serial 2 Wire Interface (I2C BUS Type) Timing chart Byte write cycle S T A R T SDA LINE SLAVE ADDRESS 1 0 1 W R I T E ∗ ∗ ∗ 0 A2 A1 A0 2nd WORD ADDRESS 1st WORD ADDRESS *1 WA12 DATA D7 WA0 R A / C W K S T O P A C K D0 A C K A C K Page write cycle S T A R T SDA LINE SLAVE ADDRESS 1 0 1 W R I T E ∗ ∗ ∗ 0 A2 A1 A0 2nd WORD ADDRESS(n) 1st WORD ADDRESS(n) *1 WA12 DATA(n) D7 WA0 R A / C W K A C K S T O P DATA(n+31) D0 D0 A C K A C K A C K Current read cycle S T A R T SDA LINE R E A D SLAVE ADDRESS 1 0 1 0 A2 A1 A0 S T O P DATA D7 D0 R A / C W K A C K Random read cycle S T A R T SDA LINE W R I T E SLAVE ADDRESS 1 1st WORD ADDRESS(n) ∗ ∗ ∗ 0 1 0 A2 A1 A0 S T A R T 2nd WORD ADDRESS(n) *1 WA12 A C K D7 R A / C W K A C K Sequential read cycle S T A R T SDA LINE SLAVE ADDRESS 1 R E A D DATA(n) D7 0 1 0 A2 A1 A0 R A / C W K S T O P DATA(n+x) D0 D7 A C K A C K D0 A C K *1: WA12…Don't Care (BR24L32) Note : BR24C32/F has no letter "-W", but it is a double-cell type. BR24C64/F is a single-cell type. Please be careful not to confuse w-cell type and single-cell type. ("-W" means double-cell type.) 10 S T O P DATA(n) 1 0 1 0 A2 A1 A0 WA0 R A / C W K R E A D SLAVE ADDRESS D0 A C K