LESHAN RADIO COMPANY, LTD. 1.2A, 1.2MHz Synchronous Boost Converter with Output Disconnect /5 Series FEATURES: The /5 devices provide a power supply z Up to 96% Efficiency solution for products powered by either a one-cell, z True Output Load Disconnect During INTRODUCTION: two-cell, or three-cell alkaline, NiCd or NiMH, or Shutdown one-cell Li-ion or Li-polymer battery. The boost z Delivers [email protected] from Single AA Cell converter frequency, z Delivers 300mA@5V from Two AA Cells pulse-width-modulation (PWM) controller using a z Delivers 600mA@5V from Single Li Cell synchronous rectifier to obtain maximum efficiency, z Low Voltage Start-Up: 0.85V which contain an internal NMOS switch and z Continuous Switching at Light Loads PMOS synchronous rectifier. The maximum peak z Internal Synchronous Rectifier current in the boost switch is typically limited to a z Current Mode Control is based on a fixed value of 1.2A. with Internal Compensation A switching frequency of 1.2MHz minimizes z 1.2MHz Fixed Frequency Switching solution footprint by allowing the use of tiny, low z Input Range: 0.5V to 4.5V profile inductors and ceramic capacitors. The z Output Range: 2.5V to 4.3V (Up to 5.5V with current mode PWM design is internally Schottky) compensated, reducing external parts count. z Logic Controlled Shutdown(<1ȝA) Anti-ringing control circuitry reduces EMI concerns z Anti-ringing Control Minimizes EMI by damping the inductor in discontinuous mode. z 1.2A Peak Switch Current Limit The converter can be disabled to minimize battery z Over Temperature Protection drain. During shutdown, the load is completely z Tiny External Components disconnected z Low Profile (1mm) SOT-23 Package from the battery. The device features low shutdown current less than 1ȝA. APPLICATIONS˖ ˖ z Digital Still and Video Cameras z Portable Applications Using Single Li+ Cell z Bus Powered USB Hosts z USB Hosts Without Native 5-V Supplies z Portable Audio Players z LCD Bias Supplies z Wireless Handsets z GPS Receivers z Personal Medical Products 9HU White LED Lighting LESHAN RADIO COMPANY, LTD. ORDER INFORMATION(1) Operating free air temperature range Output Voltage -40~+85ć Adjustable -40~+85ć 3.3V -40~+85ć 5.0V Package Device No. /58406AE SOT-23-6 /58406A33E /58406A50E (1) Contact Chipower to check availability of other fixed output voltage versions. TYPICAL APPLICATION CIRCUIT Figure 1 Standard Application Circuit PIN CONFIGURATION: PIN ASSIGNMENTS (TOP VIEW) LESHAN RADIO COMPANY, LTD. Table 1. PIN NO. NAME SOT23-6 TYPE(1) Pin Description DESCRIPTION Switch Pin. Connect an inductor between this pin and VIN. Keep the PCB trace 1 SW I/O lengths as short and wide as is practical to reduce EMI and voltage overshoot. If the inductor current falls to zero, or pin CE is low, an internal anti-ringing switch is connected from this pin to VIN to minimize EMI. Signal and Power Ground. Connect GND with large copper areas directly to the input and output supply returns and negative terminals of the input and output capacitors.. 2 GND P This pin should be connected to a continuous PCB ground for high-current power converter as close as to the device by several vias directly under the IC for electrical contact and rated thermal performance. It dissipates the heat from the IC. Feedback Input / Not Connect (for fixed Voltage). Feedback Input to the gm Error Amplifier. Connect resistor divider tap to this pin. The output voltage can be adjusted from 2.5V to 5.5V by: VOUT =1.23V噝[1+(R2/R1)] 3 FB/NC I The feedback network, resistors R1 and R2, should be kept close to the FB pin, and away from the inductor, SWʙinductor and Schottky diode switching node on the PCB layout to minimize copper trace connections that can inject noise into the system. Chip Enable. CE=High: Normal free running operation, 1.2MHz typical operating frequency. 4 CE I CE=Low: Shutdown; quiescent current <1ȝA. Output capacitor can be completely discharged through the load or feedback resistors. An anti-ringing switch is internally connected between SW and VIN. If CE is undefined, pin SW may ring. Output Voltage Sense Input and Drain of the Internal Synchronous Rectifier P-MOSFET. Bias is derived from VOUT when VOUT exceeds 2.3V. PCB trace length from VOUT to the output filter capacitor(s) should be as short and wide as possible. Care 5 VOUT I/O should be taken to minimize the loop area formed by the output filter capacitor(s) connections, the VOUT pin, and the /5 ground pin. The minimum recommended output filter capacitance is 4.7ȝF ceramic with a X5R or X7R dielectric and the optimum placement is closest to the VOUT pin and the GND pin. VOUT is completely disconnected from VIN when CE is low, due to the output LESHAN RADIO COMPANY, LTD. disconnect feature. Battery Input Voltage. The device gets its start-up bias from VIN. Once VOUT exceeds 2.3V, bias comes from VOUT. Thus, once started, operation is completely independent from VIN. Operation is only limited by the output power level and the battery’s internal series resistance. PCB trace length from VIN to the input filter 6 VIN I capacitor(s) should be as short and wide as possible. Care should be taken to minimize the loop area formed by the input filter capacitor(s) connections, the VIN pin, and the /5 ground pin. The minimum recommended input filter capacitance is 4.7ȝF ceramic with a X5R or X7R dielectric and the optimum placement is closest to the VIN pin and the GND pin. (1) I = input; O = output; P = power ABSOLUTE MAXIMUM RATINGS (Unless otherwise specified, TA=25°C)(1) PARAMETER SYMBOL RATINGS UNITS Input Voltage(2) VIN -0.3~7 V -0.3~7 V -0.3~7 V SW Voltage(2) (2) CE, FB Voltage Output Voltage range (2) VOUT -0.3~7 V Peak SW Sink and Source Current ISWMAX 1.5 A Tj -40~150 ć Storage Temperature Tstg -40~125 ć Lead Temperature(Soldering, 10 sec) Tsolder 260 ć Human Body Model - (HBM) 4000 V Machine Model- (MM) 200 V Operating Virtual Junction Temperature Range ESD rating(3) (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. The human body model is a 100 pF capacitor discharged through a 1.5kȍ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. CAUTION This integrated circuit can be damaged by ESD if you don’t pay attention to ESD protection. Chipower recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision LESHAN RADIO COMPANY, LTD. integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DISSIPATION RATINGS(1) PACKAGE șJA(2) ćPOWER RATING TAч25ć DERATING FACTOR ABOVE TA=25ć SOT-23-6 250°C /W 400mW 4mW/°C (1) Exceeding the maximum junction temperature will force the device into thermal shutdown. (2) șJA is measured in the natural convection at TA=25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNITS Supply voltage at VIN 0.9 5.5 V Output voltage at VOUT 2.5 5.5 V Operating free air temperature range(1), TA -40 85 ć Operating junction temperature range, Tj -40 125 ć (1) The /5 is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85 °C operating temperature range are assured by design, characterization and correlation with statistical process controls. ELECTRICAL CHARACTERISTICS Typical values are at TA=25ć, unless otherwise specified, specifications apply for condition VIN=VCE=1.2V, VOUT=3.3 V. PARAMETER TYP(1) MAX UNITS ILOAD=1mA 0.85 1 V VCE=VIN 0.5 0.65 V 300 500 ȝA 0.1 1.0 ȝA VIN V 0.4 V ±0.1 ±1 ȝA 0.9 1.2 1.5 MHz 80 87 SYMBOL CONDITIONS VSTART VIN(MIN) MIN POWER SUPPLIES Minimum Start-Up Voltage Minimum Operating Voltage (2) Operating quiescent current into VOUT Shutdown Current into IN IQ ISHDN-IN Measured On VOUT, Nonswitching VCE=0V CHIP ENABLE INPUT LOGIC SIGNAL CE CE High-level Voltage VCEH VCE Falling, Device ON CE Low-level Voltage VCEL VCE Rising, Device Off CE Leakage Current ICE 1.5 VCE=5.0V OSCILLATOR Oscillator Frequency Max Duty Cycle fosc DMAX VFB=1.15V % LESHAN RADIO COMPANY, LTD. POWER SWITCH N-CH MOSFET On Resistance(3) RDS(ON) (3) P-CH MOSFET On Resistance N-CH MOSFET Switch Leakage ISWLEAK P-CH MOSFET Switch Leakage NMOS Cycle by Cycle Current Limit (4) ICL VOUT=3.3V 350 VOUT=5.0V 200 VOUT=3.3V 450 VOUT=5.0V 300 VSW=5.0V ±0.01 ±1 ȝA VSW=5.0V, VOUT=0V ±0.01 ±1 ȝA VOUT=5.0V 1.2 A 40 nS (5) Current Limit Delay to Output mȍ OUTPUT Output Voltage Range(6) VOUT 2.5 Feedback regulation voltage VFB 1.192 Feedback Input bias Current(7) IFB 1.230 VFB=1.30V 5.5 V 1.268 V ±50 nA OVER TEMPERATURE PROTECTION Thermal Shutdown Thermal Shutdown Hysteresis TTSD 150 ć TTSDHYS 15 ć (1) Typical numbers are at 25°C and represent the most likely norm. (2) Minimum VIN operation after start-up is only limited by the battery’s ability to provide the necessary power as it enters a deeply discharged state. (3) Does not include the bond wires. Measured directly at the die. (4) Duty cycle affects current limit due to ramp generator. (5) Specification is guaranteed by design and not 100% tested in production. (6) The fixed voltage version effective output voltage. (7) Bias current flows into FB pin. Specification is guaranteed by design and not 100% tested in production. LESHAN RADIO COMPANY, LTD. BLOCK DIAGRAM Future 2. Functional Block Diagram DETAILED DESCRIPTION The /5 is a 1.2MHz synchronous boost converter housed in a 6-lead thin SOT-23 package. Able to operate from an input voltage below 1V, the devices feature fixed frequency, current mode PWM control for exceptional line and load regulation. With its low RDS(ON) and gate charge internal MOSFET switches, the devices maintain high efficiency over a wide range of load current. Its high 1.2MHz switching frequency facilitates output filter component size reduction for improved power density and reduced overall footprint. It also provides greater bandwidth and improved transient response over other lower frequency boost converters. Operation can be best understood by referring to the Functional Block Diagram. CONTROLLER CIRCUIT The controller circuit of the device is based on a fixed frequency multiple feed-forward controller topology. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So, changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier, only has to handle small signal errors. The input for it is the feedback voltage on the FB pin. It is compared with the internal reference voltage to generate an accurate and stable output voltage. The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the LESHAN RADIO COMPANY, LTD. switch and the inductor. The typical peak-current limit is set to 1.2A. An internal temperature sensor prevents the device from getting overheated in case of excessive power dissipation. SYNCHRONOUS RECTIFICATION The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier, which improves efficiency and eliminates the need of an external Schottky diode. Because the commonly used discrete Schottky rectifier is replaced with a low RDS(on) PMOS switch, which reduces the conduction loss , the power conversion efficiency reaches values above 90%. SLOPE COMPENSATION The /5 is based on a slope compensated current mode PWM control topology. It operates at a fixed frequency of 1.2MHz. At the beginning of each clock cycle, the main switch (NMOS) is turned on and the inductor current starts to ramp. After the maximum duty cycle or the sense current signal equals the error amplifier (EA) output, the main switch is turned off and the synchronous switch (PMOS) is turned on. Slope compensation provides stability in constant frequency architecture by preventing sub-harmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 50%.This control topology features stable switching and cycle-by-cycle current limiting which can prevent the main switch from overstress and the external inductor from saturating, it provides excellent load and line response. LOW VOLTAGE START-UP The /5 includes an independent start-up oscillator designed to start up at a typical VIN voltage of 0.85V or higher. In this mode, the IC operates completely open-loop and the current limit is also set internally to 600mA typically. The low voltage start-up circuitry controls the internal NMOS switch up to a maximum peak inductor current of 600mA typically, with an approximate 0.5ms (approx.) off-time during start-up, allowing the devices to start up into an output load. Once the output voltage exceeds 2.3V, the start-up circuitry is disabled and normal close-loop fixed frequency PWM operation is initiated. In this mode, the /5 power themselves from VOUT instead of VIN and operates independent of VIN, allowing extended operating time as the battery voltage can droop to several tenths of a volt without affecting the circuit operation. The only limiting factor for the application becomes the ability of the battery to supply sufficient energy to the output. The current limit is also set internally to 1.2A typically LOW NOISE FIXED FREQUENCY OPERATION Oscillator: The frequency of operation is internally set to 1.2MHz. Error Amplifier: The error amplifier is an internally compensated transconductance type (current output). The internal 1.23V reference voltage is compared to the voltage at the FB pin to generate an error signal LESHAN RADIO COMPANY, LTD. at the output of the error amplifier. A voltage divider from VOUT to ground programs the output voltage via FB from 2.5V to 5.5V using the equation: VOUT=1.23V噝[1+(R2/R1)] Current Sensing: Lossless current sensing converts a signal representing NMOS switch current to a voltage to be summed with the internal slope compensation. The summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. Peak switch current is limited to approximately 1.2A independent of input or output voltage. The switch current signal is blanked for 40ns to enhance noise rejection. Zero Current Comparator: The zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier once this current reduces to approximately 27mA. This prevents the inductor current from reversing in polarity thereby improving efficiency at light loads. Antiringing Control: The antiringing control circuitry prevents high frequency ringing of the SW pin as the inductor current goes to zero in discontinuous mode by placing a resistor across the inductor to damp the resonant circuit formed by L and CSW (capacitance on SW pin). OUTPUT DISCONNECT AND INRUSH LIMITING The /5 is designed to allow true output disconnect by eliminating backgate diode conduction of the internal PMOS rectifier. In conventional synchronous rectifier circuits, the backgate diode of the highside PMOS is forward biased in shutdown and allows current flowing from the battery to the output. However, this device uses a special circuit which takes the cathode of the backgate diode of the highside PMOS and disconnects it from the source when the converter is not enabled (CE=low). The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of the converter. No additional components must be added to the design to make sure that the battery is disconnected from the output of the converter. This allows VOUT to go to zero volts during shutdown, drawing zero current from the input source. It also allows for inrush current limiting at start-up, minimizing surge currents seen by the input supply. Note that to obtain the advantage of output disconnect, there must not be an external Schottky diode connected between the SW pin and VOUT. Board layout is extremely critical to minimize voltage overshoot on the SW pin due to stray inductance. Keep the output filter capacitor as close as possible to the VOUT pin and use very low ESR/ESL ceramic capacitors tied to a good ground plane. For applications with VOUT over 4.3V, a Schottky diode is required to limit the peak SW voltage to less than 6V unless some form of external snubbing is employed. This diode must also be placed very close to the pins to minimize stray inductance. See the Applications Information. DEVICE SHUTDOWN When CE is set logic high, the /5 is put into active mode operation. If CE is set logic low, the device LESHAN RADIO COMPANY, LTD. is put into shutdown mode and draws less than 1ȝA current from battery. After start-up, the internal circuitry is supplied by VOUT, however, if shutdown mode is enabled, the internal circuitry will be supplied by the input source again. If CE is driven from a logic-level output, the logic high-level (on) should be referenced to VOUT to avoid intermittently switching the device on. Note: If pin CE is not used, it should be connected directly to pin VOUT. In cases where there is residual voltage during shutdown, some small amount of energy will be transferred from pin VOUT to pin VIN immediately after shutdown, resulting in a momentary spike of the voltage at pin VIN. The ratio of CIN and COUT partly determine the size and duration of this spike, as does the current-sink ability of the input device. Thermal Shutdown If the die temperature reaches 150°C, the part will go into thermal shutdown, all switches will be turned off The part will be enabled again when the die temperature drops by about 15°C. TYPICAL PERFORMANCE CHARACTERISTICS (TA=25ć ć, unless otherwise specified, Test Figure1 above) Table of Graphs FIGURE Figure3 Ș Efficiency vs Output Current Figure5 and Input Voltage Figure7 Figure9 Figure4 ¨VOUT Load Regulation vs Output Current Figure6 and Input Voltage Figure8 Figure10 VSTART Minimum Start-Up Voltage SW Pin Antiringing Operation Waveforms SW Pin Fixed Frequency, Continuous Inductor Current Operation VOUT Load transient response vs Output Current Figure11 Figure12 Figure13 Figure14 LESHAN RADIO COMPANY, LTD. Efficiency vs Output Current Figure 3 Load Regulation Figure 4 Efficiency vs Output Current Load Regulation Figure 5 Figure 6 Efficiency vs Output Current Load Regulation Figure 7 Figure 8 LESHAN RADIO COMPANY, LTD. Efficiency vs Output Current Figure 9 Minimum Start-Up Voltage vs Output Current Figure 11 Load Regulation Figure 10 SW Pin Antiringing Operation Figure 12 SW Pin Fixed Frequency, Continuous Inductor Current Operation Figure 13 VOUT Load Transient Response Figure 14 LESHAN RADIO COMPANY, LTD. APPLICATION INFORMATION DESIGN PROCEDURE The /5 dc-dc converter is intended for systems powered by a single-cell, up to triple-cell alkaline, NiCd, NiMH battery with a typical terminal voltage between 0.9V and 4.5V. It can also be used in systems powered by one-cell Li-ion or Li-polymer with a typical voltage between 2.7V and 4.2V. Additionally, any other voltage source with a typical output voltage between 0.9 V and 4.5 V can power systems where the /5 is used. Due to the nature of boost converters, the output voltage regulation is only maintained when the input voltage applied is lower than the programmed output voltage. Setting The Output Voltage For the /5 adjustable output version, the internal 1.23V reference voltage is compared to the voltage at the FB pin to generate an error signal at the output of the error amplifier. A voltage divider from VOUT to ground programs the output voltage via FB from 2.5V to 5.5V using the equation: VOUT=1.23V噝[1+(R2/R1)] The use of 1% accuracy metal film resistor is recommended for the better output voltage accuracy. To minimize the power consumption under light loads, it is desirable to choose large resistance values for both R1 and R2. Table1 lists the recommended values for particular output voltage settings. Table 1. Resistor Selection for VOUT Setting VOUT R2(ȍ) R1(ȍ) 3.3V 1.02M 604K 5.0V 1.02M 332K Fixed Output Voltage The /5 has two fixed output voltage options: 3.3V and 5V. An internal resistor divider is connected to the FB pin internally, which eliminates the need for external feedback resistors. When designing with the fixed output voltage option, remember to leave the FB pin open; otherwise the output voltage will be affected. However, a feed-forward capacitor can still be added between the FB pin and VOUT pin to enhance the control loop performance. Inductor Selection LESHAN RADIO COMPANY, LTD. The /5FDQ utilize small surface mount and chip inductors due toLWV IDVW 1.2MHz switching frequency. Typically, a 4.7ȝH inductor is recommended for most applications. Larger values of inductance will allow greater output current capability by reducing the inductor ripple current. Increasing the inductance above 10ȝH will increase size while providing negligible improvement in output current capability. The approximate output current capability of the /5 versus inductance value is given in the equation below: IOUT(MAX) = Ș噝(ICLˉ ొ Ȉୈ )噝(1ˉD) ʹȈ౩ౙ where: Ș = estimated efficiency; ICL = peak current limit value (1.2A); VIN = input (battery) voltage; D = steady-state duty ratio = (VOUT VIN)/VOUT; fOSC = switching frequency (1.2MHz typ.); L = inductor value. The minimum inductance value is given by: L ሺ ሻ Ȉሺሺሻ െ ሺ ሻ ሻ ȈሺሻȈ where: Ripple = Allowable inductor current ripple (amps peak-peak) VIN(MIN) = Minimum input voltage VOUT(MAX) = Maximum output voltage The inductor current ripple is typically set for 20% to 40% of the maximum inductor current (IP). High frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving efficiency. The inductor should have low ESR (series resistance of the windings) to reduce the I2R power losses, and must be able to handle the peak inductor current without saturating. Molded chokes and some chip inductors usually do not have enough core to support the peak inductor currents of 1.2A seen on the /5. To minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. See Table 2 for some suggested components and suppliers. Table2. Representative SMD Inductors Max Rated DC Size DCR Current L×W×H (mȍ) (A) (mm3) 3.3 85 1.10 4.7 105 0.90 Part Value Number (ȝH) Sumida CDRH 3.8×3.8×1.8 LESHAN RADIO COMPANY, LTD. 3D16 6.8 170 0.73 10 210 0.55 3.3 86.2 1.44 Sumida 4.7 108.7 1.15 CR43 6.8 131.2 0.95 10 182 1.04 3.3 110 1.04 4.7 162 0.84 6.8 200 0.76 10 200 0.61 Sumida CDRH 4D18 4.8×4.3×3.5 5.0×5.0×2.0 Different core materials and shapes will change the size/current and price/current relationship of an inductor. The choice of which style inductor to use often depends more on the price vs. size requirements and any radiated field/EMI requirements than on what the /5 requires to operate. Table 2 shows some typical surface mount inductors that work well in /5 applications. Output and Input Capacitor Selection Low ESR (equivalent series resistance) capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors are an excellent choice as they have extremely low ESR and are available in small footprints. A 4.7ȝF to 15ȝF output capacitor with 10V voltage rating is sufficient for most applications. Larger values up to 22ȝF may be used to obtain extremely low output voltage ripple and improve transient response. An additional phase lead capacitor may be required with output capacitors larger than 10ȝF to maintain acceptable phase margin. X5R and X7R dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. It follows that ceramic capacitors are also a good choice for input decoupling and should be located as close as possible to the device. A 10ȝF input capacitor with 10V voltage rating is sufficient for virtually any application. Larger values may be used without limitations. Table 3 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers directly for detailed information on their entire selection of ceramic capacitors. Table 3. Capacitor Vendor Information SUPPLIER WEBSITE TDK www.tdk.com AVX www.avxcorp.com Murata www.murata.com Applications Where VOUT > 4.3V LESHAN RADIO COMPANY, LTD. When the output voltage is programmed above 4.3V, it is necessary to add a Schottky diode either from SW to VOUT, or to add a snubber network in order to maintain an acceptable peak voltage on the SW pin. The Schottky diode between SW and VOUT will provide a peak efficiency improvement but will negate the output disconnect feature. If output disconnect is required, an active snubber network is suggested as shown below. Examples of Schottky diodes are: MBR0520L, PMEG2010EA, 1N5817 or equivalent. Figure 15. Application Circuit for VOUT > 4.3V Where Inrush Current Limiting and Output Disconnect are Required Figure 16. Application Circuit for VOUT > 4.3V Where Inrush Current Limiting and Output Disconnect are Not Required LESHAN RADIO COMPANY, LTD. PCB LAYOUT CONSIDERATIONS The high speed operation of the /5 demands careful attention to board layout. You will not get advertised performance with careless layout. In the /5 boost regulator circuit, high pulsing current flows through two circuit loops. The first loop starts from the input capacitors, to the filter inductor, to the SW pin, to the internal NMOS switch, to the ground and back to the input capacitor, when the main switch turns on. The second loop starts from input capacitor, to the filter inductor, to the SW pin, to the internal PMOS switch, to the VOUT pin, to the ground and back to the input capacitor, when the main switch is off(while the synchronous switch is on). In PCB layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. Figure 17 shows the recommended component placement. RECOMMENDED COMPONENT PLACEMENT. TRACES CARRYING HIGH CURRENT ARE DIRECT. TRACE AREA AT FB PIN IS SMALL. LEAD LENGTH TO BATTERY IS SHORT Figure 17. Recommended Component Placement for Single Layer Board For the best electric and thermal performance, the following suggestions should be taken. These items are also illustrated graphically in Figure 17. 1) The GND pin of the IC is the ground connection for high-current power converter node. High current return for the low-side driver and power N-MOSFET. Connect GND with large copper areas directly to the input and output supply returns and negative terminals of the input and output capacitors. It is desirable to maximize the PCB copper area connecting to GND pin to achieve the best thermal and noise performance. A multilayer board with a separate ground plane is ideal, but not absolutely necessary. LESHAN RADIO COMPANY, LTD. 2) Place the (+) plate of CIN near VIN as closely as possible and the loop area formed by CIN and GND must be minimized to maintain input voltage steady and filter out the pulsing input current. For additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with CIN, close to the VIN, to shunt any high frequency noise to ground. 3) The output capacitor, COUT, should be placed as closely as possible to the VOUT pin. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly effects output voltage ripple. For additional output voltage filtering, a low ESR ceramic bypass capacitor can be placed in parallel with COUT, to shunt any high frequency noise to ground. Care should be taken to minimize the loop area formed by the bypass capacitor connections, the VOUT pin, and the /5 GND pin. The minimum recommended bypass capacitance is 100nF ceramic with a X5R or X7R dielectric and the optimum placement is closest to the VOUT pin. 4) The GND of the IC, the (-) plate of CIN and COUT should be connected as closely as possible, together directly to a ground plane. 5) Make the current trace from IN to inductor to SW pin (when internal main NMOS turn on) as short as possible to reduce power dissipation and increase overall efficiency. Also the current trace from IN to inductor to SW pin and the current trace from VOUT pin to COUT to GND (when internal synchronous PMOS turn on) should be as short as possible. Put enough multiply-layer pads when they need to change the trace layer. 6) The PCB copper area associated with SWʙinductor switching node must be minimized to reduce EMI and avoid the potential noise problem. 7) The feedback network, resistors R1 and R2 must be connected to FB pin directly as closely as possible. And FB is a sensitive signal node, trace area at FB pin should be small, please keep it away from SWʙinductor switching node on the PCB layout to avoid the noise inject into the system. 8) If the system chip interfacing with the CE pin has a high impedance state at shutdown mode and the VIN is connected directly to a power source such as a Li-Ion battery, it is desirable to add a pull down 1Mohm resistor between the CE and GND pins to prevent the noise from falsely turning on the boost regulator at shutdown mode. 9) Pour copper plane on all unused board area and connect it to stable DC nodes, like VIN, ground or VOUT. THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component. Three basic approaches for enhancing thermal performance follow. 噝 Improving the power dissipation capability of the PCB design LESHAN RADIO COMPANY, LTD. 噝 Improving the thermal coupling of the component to the PCB 噝 Introducing airflow in the system The maximum recommended junction temperature (TJ) of the /5 devices is 125°C. The thermal resistance of the 6-pin thin SOT-23 package is șJA=250°C/W. Specified regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 308mW. More power can be dissipated if the maximum ambient temperature of the application is lower. ሺెሺఽሻ ିఽ ሻ ଵଶହιେି଼ହιେ PD(MAX)= = =160mW ଶହιେȀ ెఽ APPLICATION EXAMPLES List of Components: U1 = /58406AE L1 = 4.7ȝH Wurth Elektronik 744031004 CIN = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic COUT = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic Figure18. Power Supply Solution for Maximum Output Power Operating from a Single or Dual Alkaline Cell List of Components: U1 = /58406AE L1 = 4.7ȝH Taiyo Yuden CB2016B4R7M CIN = 1 x 4.7ȝF, 0603, X7R/X5R Ceramic COUT = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic LESHAN RADIO COMPANY, LTD. Figure 19. Power Supply Solution Having Small Total Solution Size List of Components: U1 = /58406AE L1 = 4.7ȝH Taiyo Yuden CB2016B4R7M CIN = 1 x 4.7ȝF, 0603, X7R/X5R Ceramic COUT = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic Figure 20. Power Supply Solution for Powering White LEDs in Lighting Applications List of Components: U1 = /58406AE L1 = 4.7ȝH Wurth Elektronik 744031004 CIN = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic COUT = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic Figure 21. Power Supply Solution With Auxiliary Positive Output Voltage LESHAN RADIO COMPANY, LTD. List of Components: U1 = /58406AE L1 = 4.7ȝH Wurth Elektronik 744031004 CIN = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic COUT = 2 x 4.7ȝF, 0603, X7R/X5R Ceramic Figure 22. Power Supply Solution With Auxiliary Negative Output Voltage LESHAN RADIO COMPANY, LTD. PACKAGING INFORMATION SOT-23-6 Package Outline Dimensions Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 1.050 1.250 0.041 0.049 A1 0.000 0.100 0.000 0.004 A2 1.050 1.150 0.041 0.045 b 0.300 0.500 0.012 0.020 c 0.100 0.200 0.004 0.008 D 2.820 3.020 0.111 0.119 E 1.500 1.700 0.059 0.067 E1 2.650 2.950 0.104 0.116 e 0.950(BSC) 0.037(BSC) e1 1.800 2.000 0.071 0.079 L 0.300 0.600 0.012 0.024 ș 0° 8° 0° 8°