IRFI540NPbF Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated Lead-Free HEXFET® Power MOSFET Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Full Pak eliminates the need for additional insulating hardware in commercial-industrial applications. The molding compound used provides a high isolation capability and a low thermal resistance between the tab and external heat sink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heat sink using a single clip or by a single screw fixing. Base Part Number Package Type IRFI540NPbF TO-220 Full-Pak Absolute Maximum Ratings Symbol VDSS 100V RDS(on) 0.052 ID 20A G G Gate D Drain Standard Pack Form Quantity Tube 50 IRFI540NPbF Parameter Max. Continuous Drain Current, VGS @ 10V 20 Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipation 14 110 54 Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw 0.36 ± 20 1 Parameter S Source Orderable Part Number ID @ TC = 25°C Thermal Resistance Symbol Junction-to-Case RJC Junction-to-Ambient RJA S TO-220 Full-Pak ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG D Units A W 300 16 5.4 5.0 -55 to + 175 W/°C V mJ A mJ V/ns °C 300 10 lbf•in (1.1N•m) Typ. ––– ––– Max. 2.8 65 Units °C/W 2017-04-27 IRFI540NPbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Trans conductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 100 ––– ––– 2.0 11 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– LS Internal Source Inductance ––– IGSS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance C Drain to Sink Capacitance Source-Drain Ratings and Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage ––– ––– ––– ––– Typ. Max. Units Conditions ––– ––– V VGS = 0V, ID = 250µA 0.11 ––– V/°C Reference to 25°C, ID = 1mA ––– 0.052 VGS = 10V, ID = 11A ––– 4.0 V VDS = VGS, ID = 250µA ––– ––– S VDS = 50V, ID = 16A ––– 25 VDS = 100V, VGS = 0V µA ––– 250 VDS = 80V,VGS = 0V,TJ =150°C ––– 100 VGS = 20V nA ––– -100 VGS = -20V ––– 94 ID = 16A nC VDS = 80V ––– 15 VGS = 10V , See Fig. 6 and 13 ––– 43 8.2 ––– VDD = 50V 39 ––– ID = 16A ns 44 ––– RG= 5.1 33 ––– RD= 3.0See Fig. 10 Between lead, 4.5 ––– 6mm (0.25in.) nH from package 7.5 ––– and center of die contact 1400 ––– VGS = 0V 330 ––– VDS = 25V pF ƒ = 1.0MHz, See Fig. 5 170 ––– 12 ––– ƒ = 1.0MHz Min. Typ. ––– ––– Max. Units ––– ––– 110 ––– ––– 1.3 V Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C,IS = 11A,VGS = 0V 20 A trr Reverse Recovery Time ––– 170 250 ns TJ = 25°C ,IF = 16A Qrr Reverse Recovery Charge ––– 1.1 1.6 C di/dt = 100A/µs Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) VDD = 25V, starting TJ = 25°C, L = 2.0mH, RG = 25, IAS = 16A (See fig. 12) ISD 16A, di/dt 210A/µs, VDD V(BR)DSS, TJ 175°C. Pulse width 300µs; duty cycle 2%. t=60s, ƒ=60Hz Uses IRF540N data and test conditions. 2 2017-04-27 IRFI540NPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 10 4.5V 20µs PULSE WIDTH TC = 25°C 1 0.1 1 10 A 100 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 TJ = 25°C TJ = 175°C 10 V DS = 50V 20µs PULSE WIDTH 7 8 9 VGS , Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 10 A 100 Fig. 2 Typical Output Characteristics 3.0 6 1 VDS , Drain-to-Source Voltage (V) 1000 5 20µs PULSE WIDTH TC = 175°C 1 0.1 100 Fig. 1 Typical Output Characteristics 1 4.5V 10 VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I , Drain-to-Source Current (A) D I , Drain-to-Source Current (A) D TOP 10 A I D = 27A 2.5 2.0 1.5 1.0 0.5 VGS = 10V 0.0 -60 -40 -20 0 20 40 60 A 80 100 120 140 160 180 TJ , Junction Temperature (°C) Fig. 4 Normalized On-Resistance vs. Temperature 2017-04-27 IRFI540NPbF 2400 V GS , Gate-to-Source Voltage (V) 2000 C, Capacitance (pF) 20 V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = Cds + C gd 1600 1200 Coss 800 Crss 400 0 1 10 100 I D = 16A 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 0 VDS , Drain-to-Source Voltage (V) 20 40 60 80 100 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) I D , Drain Current (A) ISD , Reverse Drain Current (A) V DS = 80V V DS = 50V V DS = 20V 100 TJ = 175°C 100 10µs 100µs 10 1ms TJ = 25°C VGS = 0V 10 0.4 0.8 1.2 1.6 VSD , Source-to-Drain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 4 A 2.0 TC = 25°C TJ = 175°C Single Pulse 1 1 10ms 10 A 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area 2017-04-27 A IRFI540NPbF I D , Drain Current (A) 20 15 10 Fig 10a. Switching Time Test Circuit 5 0 25 50 75 100 125 TC , Case Temperature 150 175 ( °C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.01 0.00001 0.02 0.01 PDM t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x ZthJC + TC 0.001 0.01 0.1 1 10 t1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2017-04-27 IRFI540NPbF 15V L VDS DRIVER D.U.T RG + V - DD IAS 20V tp A 0.01 Fig 12a. Unclamped Inductive Test Circuit EAS , Single Pulse Avalanche Energy (mJ) 700 TOP 600 BOTTOM 500 400 300 200 100 0 VDD = 25V 25 V(BR)DSS tp ID 6.6A 11A 16A 50 75 100 125 A 150 175 Starting TJ , Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Fig 13a. Gate Charge Waveform 6 Fig 13b. Gate Charge Test Circuit 2017-04-27 IRFI540NPbF Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs 7 2017-04-27 IRFI540NPbF TO-220 Full-Pak Package Outline (Dimensions are shown in millimeters (inches)) TO-220 Full-Pak Part Marking Information TO-220AB Full-Pak packages are not recommended for Surface Mount Application. Note: For the most current drawing please refer to website at http://www.irf.com/package/ 8 2017-04-27 IRFI540NPbF Qualification Information Industrial (per JEDEC JESD47F) † Qualification Level TO-220 Full-Pak Moisture Sensitivity Level N/A Yes RoHS Compliant † Applicable version of JEDEC standard at the time of product release. Revision History Date 04/27/2017 Comments Changed datasheet with Infineon logo - all pages. Corrected Package Outline on page 8. Added disclaimer on last page. Trademarks of Infineon Technologies AG µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™ Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2016-04-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2016 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? 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