IMP6303 POWER MANAGEMENT Key Features 3-Pin Microcontroller Power Supply Supervisor ◆ Monitor 4.0V supply The IMP6303 is a 4.0V power supply supervisor circuits optimized for lowpower microprocessor (µP), microcontroller (µC) and digital systems. ◆ Active-low reset valid with 1.1V supply A reset signal is issued if the power supply voltage drops below a preset reset threshold and is asserted for at least 140ms after the supply has risen above the reset threshold. The IMP6303 has an active-low RESET output that is guaranteed to be in the correct state for VCC down to 1.1V. The reset comparator is designed to ignore fast transients on VCC. Low supply current makes the IMP6303 ideal for use in portable and battery operated equipment. The IMP6303 is available in a compact 3-pin SOT23, TO-92 and 5 pin SOT23-5 packages. ◆ 140ms min. reset pulse width ◆ Small 3-pin SOT-23 package ◆ Small 3-pin TO-92 package ◆ Small 5-pin SOT-23-5 package ◆ No external components ◆ Specified over full temperature range — – 40°C to 105°C Applications ◆ ◆ ◆ ◆ ◆ Embedded controllers Battery operated systems Intelligent instruments Wireless communication systems PDAs and handheld equipment Block Diagrams VCC VCC IMP6303 VCC µP RESET (RESET) GND RESET Input GND 6303_01.eps © 2001 IMP, Inc. 408-432-9100/www.impweb.com 1 IMP6303 Pin Configuration SOT-23 TO-92 (RESET) RESET 1 SOT-23-5 IMP6303 1 IMP6303 2 NC 1 GND 2 NC 3 3 5 VCC 4 RESET (RESET) IMP6303 3 GND VCC 2 VCC GND 6303_07.eps RESET (RESET) 6303_06.eps 6303_02.eps Ordering Information 1 Part Number Reset Threshold (V) IMP6303 Active LOW Reset IMP6303JEUR-T Notes: 4.00 Temperature Range Pin-Package Package Marking2 (XX Lot Code) – 40°C to +105°C 3-SOT23 CWXX 1. Tape and Reel packaging is indicated by the -T designation. 2. Devices may also be marked with full part number: 6303L, 6303M etc. XX refers to lot. Related Products Max. Supply Current Package Pins Package Type Active-LOW RESET output 2 IM6303 IMP6303 IMP6303 15µA 3 SOT-23 ■ 15µA 3 TO-92 ■ 15µA 5 SOT-23-5 ■ 408-432-9100/www.impweb.com © 2001 IMP, Inc. S IMP6303 Absolute Maximum Ratings Pin Terminal Voltage with Respect to Ground VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V RESET, RESET . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to (VCC + 0.3V) Input Current at VCC . . . . . . . . . . . . . . . . . . . 20mA Output Current: RESET, RESET . . . . . . . . . 20mA Rate of Rise at VCC . . . . . . . . . . . . . . . . . . . . 100V/µs Power Dissipation (TA = 70°C) . . . . . . . . . . 320mW (Derate 4mW/°C above 70°C) Operating Temperature Range . . . . . . . . . . –40°C to 105°C Storage Temperature Range . . . . . . . . . . . . . –65°C to 160°C Lead Temperature (soldering, 10 sec) . . . . . 300°C These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability Electrical Characteristics Unless otherwise noted VCC is over the full voltage range, TA = –40°C to 105°C. Typical values at TA = 25°C, VCC = 5V for L/M/J devices. Parameter Symbol Conditions Input Voltage (VCC) Range VCC Supply Current Reset Threshold ICC VTH Reset Threshold Stability VCC to Reset Delay Reset Active Timeout Period VOL Low RESET Output Voltage VOL High RESET Output Voltage VOH Notes: TA = 0°C to 70°C TA = – 40°C to 105°C TA = – 40°C to 85°C Min Typ Max Units V 9 4.00 5.5 5.5 15 4.06 4.10 4.20 1.1 1.2 VCC < 4.0V TA = 25°C TA = – 40°C to 85°C TA = 85°C to 105°C VCC = VTH to VTH - 100mV TA = – 40°C to 85°C TA = 85°C to 105°C VCC = VTH min., ISINK = 1.2mA VCC = VTH min., ISINK = 3.2mA VCC > 1.1V, ISINK = 50µA VCC > VTH max., ISOURCE = 500µA VCC > VTH max., ISOURCE = 800µA 3.93 3.89 3.80 140 100 30 20 240 0.3 0.8VCC VCC -1.5 560 840 V 0.4 0.3 µA ppm/°C µs ms V 1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only. 2. RESET output is active LOW for the IMP6303. © 2001 IMP, Inc. Microprocessor Supervisor 3 IMP6303 Pin Descriptions Name Function GND Ground RESET RESET is asserted LOW if VCC falls below the reset threshold and remains LOW for the 240ms typical reset timeout period (140ms minimum) after VCC exceeds the threshold. VCC Power supply input voltage. Detailed Descriptions Reset Timing The reset signal is asserted–LOW when the VCC signal falls below the threshold trip voltage and remains asserted for 140ms minimum after the VCC has risen above the threshold. 5V VCC VTH Active Reset Timeout Period 0V 140ms minimum 5V RESET IMP6303 0V 6303_03.eps Figure 1. Reset Timing Diagram 4 408-432-9100/www.impweb.com © 2001 IMP, Inc. S IMP6303 Application Information Negative VCC Transients The IMP6303 protect µPs from brownouts and low VCC. Short duration transients of 100mV amplitude and 20µs or less duration typically do not cause a false RESET. Valid Reset with VCC under 1.1V Bi-directional Reset Pin Interfacing To ensure logic inputs connected to the IMP6303 RESET pin are in a known state when VCC is under 1.1V, a 100kΩ pull-down resistor at RESET is needed. The value is not critical. The IMP6303 can interface with µP/µC bi-directional reset pins by connecting a 4.7kΩ resistor in series with the IMP6303 reset output and the µP/µC bi-directional reset pin. BUF Buffered RESET VCC VCC Power Supply IMP6303 Power Supply IMP6303 µC or µP 4.7kΩ RESET RESET GND 100kΩ RESET Input GND GND Bi-directional I/O Pin (Example: 68HC11) 6303_06.eps 6303_04.eps Figure 2. RESET Valid with VCC Under 1.1V © 2001 IMP, Inc. Figure 3. Bi-directional Reset Pin Interfacing Microprocessor Supervisor 5 IMP6303 Package Dimensions Inches Min A A1 A2 b c D E E1 e e1 L L1 ø b E e D C ∅ A A2 A1 e1 L L1 SOT-23 (3-Pin).eps A B L M Section A-A C D J Section A-A F 0.035 0.044 0.0004 0.004 0.035 0.040 0.012 0.020 0.003 0.008 0.110 0.120 0.083 0.104 0.047 0.055 0.37 BSC 0.07 BSC 0.016 0.024 0.021 REF 0° 8° K A B C D E F G H I J K L 0.175 0.170 0.500 0.016 0.095 0.045 0.45 0.085 0.130 0.014 0.093 45° Max 0.89 0.01 0.88 0.30 0.08 2.80 2.10 1.20 1.12 0.10 1.02 0.50 0.20 3.04 2.64 1.40 0.95 BSC 1.90 BSC 0.40 0.60 0.54 REF 0° 8° 4.45 4.32 12.70 0.406 2.41 1.14 1.14 2.16 3.30 0.35 2.36 45° 4.95 4.96 15.49 0.559 2.67 1.52 1.52 2.41 3.94 0.51 2.92 60° 0.118 Typical A A1 A2 b c D E E1 e e1 L L1 ∅ 0.037 0.057 0.001 0.005 0.035 0.050 0.011 0.019 0.003 0.007 0.109 0.117 0.101 0.117 0.058 0.066 0.037 BSC 0.074 BSC 0.013 0.021 0.002 REF 0° 8° 3.00 Plastic SOT-23** (5-Pin) G 2 0.195 0.192 0.610 0.022 0.105 0.60 0.060 0.095 0.155 0.020 0.115 60° M E 1 Min TO-92 (3-Pin) Plastic TO-92 (3-Pin) D Max Plastic SOT-23* (3-Pin) Plastic SOT-23 (3-Pin) E1 Millimeters I 3 Bottom View H TO-92.eps Plastic SOT-23 (5-Pin) D e1 E1 e E 0.95 0.05 0.90 0.30 0.08 2.80 2.60 1.50 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.70 0.95 BSC 1.90 BSC 0.35 0.55 0.60 REF 0° 8° b 1811_t04.eps A A2 A1 C ∅ L L1 6 SOT-23 (5-Pin).eps 408-432-9100/www.impweb.com © 2001 IMP, Inc. S IMP6303 © 2001 IMP, Inc. Microprocessor Supervisor 7 IMP6303 IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Fax: 408-434-5904 e-mail: [email protected] http://www.impweb.com The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners. © 2001 IMP, Inc. Printed in USA Publication #: 1023 Revision: A Issue Date: 10/26/01 Type: Preliminary