Impala Linear Corporation ILC1832 Preliminary µP Supervisory Circuit General Description Features The ILC1832 is a multifunction circuit which monitors microprocessor activity, external reset and power supplies in microprocessor based systems. Ths circuit functions include a watchdog timer, power supply monitor, microprocessor reset, and manual pushbutton reset input. The power supply line is monitored with a comparator and an internal voltage reference. RST is forced low when an out-of-tolerance condition exists and remains asserted for at least 250ms after VCC rises above the threshold voltage (2.55V or 2.88V). The RST pin will remain logic low with VCC as low as 1.4V. The Watchdog input (ST) monitors µP activity and will assert RST if no µP activity has occurred within the watchdog timeout period. The watchdog timeout period is selectable with nominal periods of 150, 600, or 1200 milliseconds. • • • Power OK/Reset Time Delay, 250ms min. Watchdog Timer, 150 ms, 600ms, or 1.2s Typical Precision Supply Voltage Monitor, Select Between 5% or 10% of Supply Voltage 18µA Supply Current Debounced External Reset Input 8-Pin SOIC or DIP Package • • • Applications • • • • • Computers Controllers Critical Microprocessor Power Monitoring Intelligent Instruments Portable Equipment Ordering Information Part ILC1832N ILC1832M Package 8-Lead PDIP 8-Lead SOIC Typical Circuit Temp. Range -40°C to +85°C -40°C to +85°C Pin-Package Configurations Top View VCC VCC PBRST ST RST TOL VCC 7 ST TOL 3 6 RST GND 4 5 RST 1 TD 2 µP ILC1832 8 PBRST VCC TD ILC1832 I/O RESET GND ETC1832N - 8 Lead Plastic DIP Package ETC1832M - 8 Lead Plastic SOIC Package Impala Linear Corporation ILC1832 1.1 (408) 574-3939 www.impalalinear.com October 1999 1 µP Supervisory Circuit Preliminary Absolute Maximum Ratings Parameter Symbol Terminal Voltage Ratings Units VCC -0.3 to 7.0 V All other inputs -0.3 to (VCC + 0.3) V VCC 250 mA GND All other inputs 25 mA -40 to +85 °C -65 to +150 °C Input Current Operating Temperature Range TA Storage Temperature Range Lead Temperature (Soldering, 10 sec.) 300 °C Power Dissipation 700 mW Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed. Electrical Characteristics VCC = 3 to 5.5V, TA = Operating Temperature Range, unless otherwise noted. Parameter Conditions Min Typ Supply Voltage Range, VCC Supply Current, ICC ST and PBRST Input Levels Max Units 5.5 V µA VCC = 5V (See Note 1) 18 30 VCC = 3.3V (See Note 1) 15 25 VIH, VCC > 2.7V 2.0 VCC + 0.3 VIH, VCC < 2.7V VCC –0.4 VCC + 0.3 -0.3 0.5 VIL ±1 V µA Input Leakage PBRST, IIL (See Note 2) Output Voltage, RST, RST ISOURCE = 350µA, VCC = 3.3V Output Voltage, RST, RST ISINK = 10mA, VCC = 3.3V 0.4 V Output Voltage, RST ISINK = 50µA, VCC = 1.4V 0.3 V VCC 5% Trip Point (Reset Threshold Voltage) TOL= GND 2.80 2.88 2.97 V VCC 10% Trip Point (Reset Threshold Voltage) TOL= VCC 2.47 2.55 2.64 V Input Capacitance, ST, TOL CIN (See Note 3) 5 pF Output Capacitance, RST, RST COUT (See Note 3) PBRST Min. Pulse Width, tPB PBRST = VIL (See note 4) PBRST Delay, tPBD 2.4 V 7 20 pF ms 1 4 20 ms Reset Active Time, tRST 250 610 1000 ms ST Pulse Width, tST 20 ST Timeout Period, tTD 62.5 150 250 TD = Open 250 600 1000 TD = VCC 500 120 0 2000 VCC Fall Time, tF 40 VCC Rise Time, tR 0 VCC Detect to RST Low and RST High, tRPD VCC Falling at 1.66 mV/µs VCC Detect to RST Open and RST Low, tRPU VCC Rising Note Note Note Note 1: 2: 3: 4: 250 ms µs ns 5 8 µs 610 1000 ms ICC is measured with PBRST and all outputs open and inputs within 0.5V of supply rails. PBRST has an internal 40kΩ (typical) pull-up resistor to VCC. Guaranteed by design at TA = 25°C. PBRST must be held low for a minimum of 20ms to guarantee a reset. Impala Linear Corporation ILC1832 1.1 ns TD = 0V (408) 574-3939 www.impalalinear.com October 1999 2 µP Supervisory Circuit Preliminary Pin Functions Pin Number Pin Name 1 PBRST Pushbutton reset input. This input is debounced and can be driven with external logic signals or a mechanical pushbutton to actively force a reset. All pulses less than 1ms in duration on the PBRST pin are ignored. Any pulse with a duration of 20ms or greater is guaranteed to cause a reset. PBRST has an internal 40kΩ (typical) pull-up resistor to VCC. 2 TD Time delay input. This input selects the timebase used by the watchdog timer. When TD = 0V, the watchdog timeout period is set to a nominal value of 150ms, when TD = open, the watchdog timeout period is set to a nominal value of 600ms and when TD = VCC, the watchdog timeout period is 1.2 sec nominally. 3 TOL Tolerance select input. Selects whether 5% or 10% of VCC is used as the reset threshold voltage. When TOL = 0V, the 5% tolerance level is selected and when TOL = VCC, a 10% tolerance level is selected. 4 GND Ground pin, 0V reference. 5 RST RST is asserted high if either VCC goes below the reset threshold, the watchdog times out or PBRST is pulled low for a minimum of 20ms. RST remains asserted for one reset timeout period after VCC exceeds the reset threshold or after the watchdog times out or after PBRST goes high. 6 RST RST is asserted low if either VCC goes below the reset threshold, the watchdog times out or PBRST is pulled low for a minimum of 20ms. RST remains asserted for one reset timeout period after VCC exceeds the reset threshold or after the watchdog times out or after PBRST goes high. Open-drain output. 7 ST Input to the watchdog timer. If ST does not see a transition from high to low within the watchdog timeout period, RST and RST will be asserted. 8 VCC Power supply input. Description Block Diagram VCC 8 TOL 3 PBRST 1 Trip Point Select + - Impala Linear Corporation ILC1832 1.1 6 RST 5 RST 4 GND Ref Manual Reset Debounce ST 7 TD 2 Reset Generator Watchdog Timer Timeout Select (408) 574-3939 www.impalalinear.com October 1999 3 µP Supervisory Circuit Preliminary Circuit Description Power Monitor The RST and RST pins are asserted whenever VCC falls below the reset threshold voltage set by the TOL pin. A 5% tolerance level (2.88V reset threshold voltage) can be selected by connecting the TOL pin to ground or a 10% tolerance (2.55V reset threshold voltage) can be selected by connecting the TOL pin to VCC. The reset pins will remain asserted for a period of 250ms after VCC has resen above the reset threshold voltage. The reset function ensures the microprocessor is properly reset and powers up into a known condition after a power failure. RST will remain valid with VCC as low as 1.4V. Pushbutton Reset Input The PBRST input can be driven with a manual pushbutton switch or with external logic signals. The input is internally debounced and requires an active low signal to force the reset outputs into their active states. The PBRST input will recognize any pulse that is 20ms in duration or greater and will ignore all pulses that are less than 1ms in duration. tPB tPDLY PBRST RST tRST VCC VCCTP VCCTP RST tRPD RST Pushbutton Reset tRPU RST Power-Up/Power-Down Sequence Watchdog Timer The microprocessor can be monitored by connecting the ST pin (watchdog input) to a bus line or I/O line. If a high-tolow transition does not occur on the ST pin within the watchdog timeout period set by the TD pin (see Table 1), the RST and RST pins will be asserted rsulting in a microprocessor reset. RST and RST will remain asserted for 250ms when this occurs. A minimum pulse of 75ns or any transition high-to-low on the ST pin will reset the watchdog timer. The watchdog timer will be reset if ST sees a valid transition within the watchdog timeout period. TD Pin GND Open VCC Min. 62.5 ms 250 ms 500 ms tTD Typ. 150 ms 600 ms 1200 ms Max. 250 ms 1000 ms 2000 ms Alternate Source Reference Guide Industry P/N DS1832 DS1832S ILC Direct Replacement ILC1832N ILC1832M tSD ST tTD Watchdog Input Impala Linear Corporation ILC1832 1.1 (408) 574-3939 www.impalalinear.com October 1999 4 µP Supervisory Circuit Preliminary Packaging Information M Package, 8-Pin Small-Outline 0.197 0.190 0.155 0.150 Pin 1 identifier 0.244 0.228 0.012 0.009 0.069 0.053 0.060 0.040 0.019 0.013 0.8° 0.050 0.016 0.011 0.004 N Package, 8-Pin Plastic Dual In-Line 0.019 0.013 0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240 0.260 0.240 Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation reserves the right to discontinue production and change specifications and prices at any time and without notice. This product is intended for use in normal commercial applications. Applications requiring an extended temperature range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specifically not recommended without additional processing by Impala Linear Corporation. Life Support Policy Impala Linear Corporation’s products are not authorized for use as critical components in life support devices or systems. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labelling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonbly expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Impala Linear Corporation product. No other circuits, patents, licenses are implied. Impala Linear Corporation ILC1832 1.1 (408) 574-3939 www.impalalinear.com October 1999 5