NCP590 Dual Output, High Accuracy, Ultra Low Dropout CMOS LDO The NCP590 is a family of very high precision dual-output CMOS LDOs offered in a 2x2 DFN8 package. Each output is capable of delivering up to 300 mA and is available in voltages from 0.8 V to 5 V. The set point output voltage is accurate to within ±0.9% with an operating voltage input up to 5.5 V. With its ultra low dropout characteristics and low quiescent and ground current consumption, the NCP590 is ideal for all battery operated consumer and microprocessor applications. The NCP590 is protected against short circuit and thermal overload conditions. http://onsemi.com 1 DFN8, 2x2 MN SUFFIX CASE 506AA MARKING DIAGRAM •Dual Outputs, Each Supporting up to 300 mA Current •Available in Output Combinations Ranging from 0.8 V to 5.0 V •2.1 V to 5.5 V VCC Operating Supply Range •Ultra-High Accuracy (0.9% max at 100 mA load & 25°C) •Each Output has a Dedicated Enable Control Pin •Enable Threshold Supports sub-1 V Systems •Very Low Drop Out Voltage (50 mV typ @ 100 mA load) •Low Noise (~20 mVrms) without Bypass Capacitor •Ultra Low Shutdown Current (0.2 mA) •Low Quiescent and Ground Current (80 - 100 mA typ.) •Thermal Shutdown and Current Limit Protection •Active Output Discharge when Disabled •No Minimum Output Current Required for Stability •Requires Cout of only 1.0 mF (any ESR) for Stability •Stable with Any Type of Capacitor (including MLCC) and Zero Load •Input Under Voltage Lock Out (UVLO) •Internally Compensated Regulator for Quick Transient Response •Space-Efficient 2x2 DFN8 Package •This is a Pb-Free Device XX M Features 1 4 XX = Specific Device Code M = Date Code PIN CONNECTIONS Vin 1 8 Vout1 EN1 2 7 Vout2 EN2 3 6 GND NC 4 5 NC (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Applications •Cellular Phones •Cameras •MP3/CD Players, PDA's, Camcorders •DSP Supplies •Portable Info-tronics •PCMCIA Cards •Networking Systems, DSL/Cable Modems © Semiconductor Components Industries, LLC, 2008 March, 2008 - Rev. 1 1 Publication Order Number: NCP590/D NCP590 Vin Vin Vout1 Vout1 Cin 1 mF Cout1 1 mF RLoad Cout2 1 mF RLoad NCP590 OFF OFF ON ON EN1 Vout2 Vout2 EN2 GND NC NC Figure 1. Typical Application PIN FUNCTION Pin No. Symbol Function Input; Bypass directly at the IC with a 1 mF ceramic capacitor to Ground 1 Vin 2 EN1 Enable for output regulator 1; raise above 0.95 V to enable Vout1 3 EN2 Enable for output regulator 2; raise above 0.95 V to enable Vout2 4, 5 NC NC; Do not make connection to these pins 6 GND Ground PAD GND The thermal pad should be connected to ground for best thermal performance. Float if necessary 7 Vout2 Output 2; Bypass to GND with a capacitor, 4.7 mF ≥ C ≥ 0.7 mF, any ESR 8 Vout1 Output 1; Bypass to GND with a capacitor, 4.7 mF ≥ C ≥ 0.7 mF, any ESR Vin Vout1 EN1 EN2 Programmable Reference Error Amplifier + Current Limit Saturation Sense Thermal Protection Vout2 Error Amplifier + Current Limit Saturation Sense Thermal Protection GND Figure 2. Block Diagram http://onsemi.com 2 NCP590 ABSOLUTE MAXIMUM RATINGS TJ = -40°C to 125°C Pin Symbol, Parameter VIN, Input to regulator Symbol Min Max Unit V Voltage VIN -0.3 6.0 Current IIN - Internally Limited VIN, Input peak Transient Voltage to regulator wrt GND VOUT1, VOUT2, Regulated Output Condition VIN 7.0 V V Voltage VOUT -0.3 VIN + 0.3 or 6.0 (Note 1) Current IOUT - Internally Limited EN1, EN2, Enable Input VEN -0.3 VIN + 0.3 or 6.0 (Note 1) V Junction Temperature Storage Temperature TJ Tstg -50 125 150 _C ESD Capability, Human body model (Note 3) ESDHB -2 2 kV ESD Capability, Machine model (Note 3) ESDMM -200 200 V VRB - 0.3 V Voutx-Vin (Note 2) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Which ever limit is lower 2. Exceeding this value will turn on the body diode of the PMOS driver (reference Figure 2). THERMAL RESISTANCE Parameter Symbol Condition Value Unit Junction-to-Ambient 2X2 DFN 1 oz Cu qJA 207.0 sq mm 1 oz Cu 54.2 sq mm 1 oz Cu 20.2 sq mm 1 oz Cu 158 210 375 _C/W Junction-to-Ambient 2X2 DFN 2 oz Cu qJA 207.0 sq mm 2 oz Cu 54.2 sq mm 2 oz Cu 20.2 sq mm 2 oz Cu 133 184 330 _C/W Junction-to-Board 2X2 DFN PsiJB 36.4 _C/W 265 pk _C Lead Temperature Soldering, (Note 4) Reflow (SMD styles only), lead free Tsld 60 -150 sec above 217 40 sec max at peak Moisture Sensitivity Level MSL 3. This device series incorporates ESD protection and is tested by the following methods: ESD HBM tested per AEC-Q100-002 (EIA/JESD22-A114) ESD MM tested per AEC-Q100-003 (EIA/JESD22-A115) 4. Per IPC/JEDEC J-STD-020C http://onsemi.com 3 1 NCP590 ELECTRICAL CHARACTERISTICS -40°C v TA v 85°C (Note 5); VIN = VOUT +0.5 V or 2.1 V, whichever is greater (Note 6). VEN1,2 = 0.95 V, CIN = COUT1,2 = 1.0 mF, unless noted otherwise Parameter Symbol Test Conditions Min Typ Max Unit Vout(max) + 0.5 or 2.1 V** - 5.5 V Regulators Input Voltage VIN ** which ever limit is greater Enable Input Voltage VEN * which ever limit is lower 0.0 - VIN+ 0.3 or 5.5* V Voltage Accuracy VOUT IOUT = 100 mA, TA = 25°C (Note 11) -0.9 - +0.9 % Voltage Accuracy VOUT IOUT = 1 mA to 200 mA -40 _C v TA v 85_C (Notes 9, 11, 12) -1.9 - +1.9 % Overall Voltage Accuracy VOUT IOUT = 1 mA to 200 mA, VIN = (VOUT +0.5 V) to 5.5 V, 2.1 VINmin 0°C v TA v 85°C, (Notes 12, 13) -2.4 - +2.4 % Line Regulation (Note 7) DVOUT IOUT = 1.0 mA VIN = (Vout + 0.5 V) to 5.5 V, VINmin = 2.1 V - ±0.05 - %/V Load Regulation (Note 7) DVOUT IOUT = 1 mA to 200 mA -0.012 -0.005 0.012 %/mA Drop-out Voltage, (Note 8) VDO IOUT = 50 mA - 23 40 mV Drop-out Voltage, (Note 8) VDO IOUT = 100 mA - 52 85 mV Drop-out Voltage, (Note 8) VDO IOUT = 150 mA - 80 125 mV Drop-out Voltage, (Note 8) VDO IOUT = 200 mA - 110 170 mV Drop-out Voltage, (Note 8) VDO IOUT = 300 mA - 165 225 mV VEN1 = 0.95 V, IOUT1 = 0 mA; VEN2 = 0.4 V, IOUT2 = 0 mA OR VEN2 = 0.95 V, IOUT2 = 0 mA; VEN1 = 0.4 V, IOUT1 = 0 mA - 80 125 mA - 115 195 mA Quiescent Current; Iq = IIN – IOUT Iq One Regulator ON; One Regulator OFF Quiescent Current; Iq = IIN – IOUT Iq IOUT1 = IOUT2 = 0 mA Both Regulators ON 5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. VOUT based on the greater of the two outputs. 7. Overall accuracy specified over specified operating conditions of line, load, and temperature. 8. Drop out voltage VDO = VIN – VOUT measured when the output voltage has dropped 100 mV from the nominal value for VOUT > 2.0 V. 9. Guaranteed by design, not production tested. 10. Regulated and stable output over full load range down to 0 mA load. 11. VIN is set at VIN = ((VOUT + 0.5 V) + 5.5 V) / 2 or VIN = ((2.1 V) + 5.5 V) / 2, whichever is greater. 12. Applicable for VOUT u 1.2 V. 13. For all output voltages and -40°C to 85°C overall voltage accuracy is 2.9%. 14. Typical disable current is in the nA. http://onsemi.com 4 NCP590 ELECTRICAL CHARACTERISTICS -40°C v TA v 85°C (Note 5); VIN = VOUT +0.5 V or 2.1 V, whichever is greater (Note 6). VEN1,2 = 0.95 V, CIN = COUT1,2 = 1.0 mF, unless noted otherwise Parameter Symbol Test Conditions Min Typ Max Unit Ground Current; IGND = IIN – IOUT IGND VEN1 = 0.95 V, IOUT1 = 200 mA; VEN2 = 0.4 V, IOUT2 = 0 mA OR VEN2 = 0.95 V, IOUT2 = 200 mA; VEN1 = 0.4 V, IOUT1 = 0 mA One Regulator ON; One Regulator OFF - 105 150 mA Ground Current; IGND = IIN – IOUT IGND IOUT1 = IOUT2 = 200 mA Both Regulators ON - 175 250 mA Disable Current; IDIS = IIN – IOUT IDIS IOUT1,2 = 0 mA, VEN1,2 = 0.4 V Both Regulators OFF 0 (Note 14) 1 mA ILoad Load Current (Note 10) IOUT 0 - - mA Maximum Output Current IOUT 300 - - mA - 750 - mA - 20 30 - Junction Temperature - 155 - Hysteresis - 15 - UVLO - 1.9 2.1 V UVLOhys - 0.1 - V IOUT = 200 mA 120 Hz 0.8 V output 120 Hz 1.8 V output 120 Hz 2.8 V output - 60 55 50 - IOUT = 200 mA 1 KHz 2.8 V output - 40 - VEN = 0.0 V - 0.01 - VEN = VIN - 0.01 - Regulators Current Limit, per Regulator (Note 9) ISC VOUT = 0 V Output Noise Voltage (Note 9) en BW = 10 Hz to 100 kHz mVRMS VOUT = 0.8 V VOUT = 2.8 V Thermal Shutdown (Note 9) Input under voltage lock out UVLO hysteresis TjSD Power Supply Rejection Ratio (Note 9) PSRR Power Supply Rejection Ratio (Note 9) PSRR _C dB dB Enable Control Characteristics Maximum Input Current at EN Input IEN mA Low Input Threshold VIL - - 0.4 V High Input Threshold VIH 0.95 - - V - 375 700 ms - 215 155 - ms ms 0.7 1.0 4.7 mF Timing Characteristics Turn On Time Delay, Both outputs turned on with ENABLE TON To 95% DVO VIN(MIN) to 5.5 V Turn Off Time Delay, Both outputs turned off with ENABLE (Note 9) TOFF VIN = 5.5 V VOUT = 5 V, to VOUT = 250 mV VOUT = 0.8 V, to VOUT = 40 mV Recommended Output Capacitor Specifications Output Capacitance (Note 9) COUT Capacitance over full temperature range of application. Any ESR 5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. VOUT based on the greater of the two outputs. 7. Overall accuracy specified over specified operating conditions of line, load, and temperature. 8. Drop out voltage VDO = VIN – VOUT measured when the output voltage has dropped 100 mV from the nominal value for VOUT > 2.0 V. 9. Guaranteed by design, not production tested. 10. Regulated and stable output over full load range down to 0 mA load. 11. VIN is set at VIN = ((VOUT + 0.5 V) + 5.5 V) / 2 or VIN = ((2.1 V) + 5.5 V) / 2, whichever is greater. 12. Applicable for VOUT u 1.2 V. 13. For all output voltages and -40°C to 85°C overall voltage accuracy is 2.9%. 14. Typical disable current is in the nA. http://onsemi.com 5 NCP590 Iin Vin Vin Vout1 Cin 1 mF IOUT1 Cout1 1 mF Vout1 RLoad NCP590 IOUT2 OFF ON EN1 Vout2 OFF ON EN2 GND NC NC Figure 3. Measuring Circuit http://onsemi.com 6 Vout2 Cout2 1 mF IGND RLoad NCP590 TYPICAL PERFORMANCE CHARACTERISTICS 900 0 5.0 V 700 600 500 400 300 200 -1.0 2.8 Vout -1.5 1.5 Vout -2.0 0.8 Vout -2.5 -3.0 100 0 -40 -3.5 -20 0 20 40 60 80 0 100 TEMPERATURE (°C) 50 -10 REJECTION (dB) 0 40 1.0 mA 30 20 200 mA VOUT = 2.8 V 100 -20 -30 -40 -50 0 10 300 Figure 5. Typical Output Voltage Variation vs. Load Current 60 10 200 LOAD CURRENT (mA) Figure 4. Current Limit vs. Temperature RIPPLE REJECTION (dB) 3.3 Vout -0.5 OUTPUT DROOP (%) CURRENT LIMIT (mA) 800 1,000 10,000 -60 10 100 1000 10000 f, FREQUENCY (Hz) f, FREQUENCY (Hz) Figure 6. Power Supply Rejection Ratio Figure 7. Cross Channel Rejection vs. Frequency 0.815 5.05 Vout, OUTPUT VOLTAGE (V) Vout, OUTPUT VOLTAGE (V) 5.04 0.810 1 mA 50 mA 0.805 0.800 0.795 100 mA 150 mA 0.790 0.785 -40 200 mA -20 0 20 40 60 5.03 5.02 5.01 4.99 50 mA 150 mA 4.98 200 mA 4.97 4.96 4.95 -40 80 1 mA 100 mA 5.00 -20 0 20 40 60 TEMPERATURE (°C) TEMPERATURE (°C) Figure 8. Output Voltage Change vs. Temperature for 0.8 Vout Figure 9. Output Voltage Change vs. Temperature for 5.0 Vout http://onsemi.com 7 80 NCP590 TYPICAL PERFORMANCE CHARACTERISTICS NCP590 2.8 V Output, Line Transient Response, dVin = 0.5 V, Trise = Tfall = 30 msec. Vout, OUTPUT VOLTAGE (V) 2.83 2.82 CH2 Vin 3.3 V to 3.8 V 1 V / div 30 ms rise 30 ms fall 1 mA 2.81 50 mA 2.80 100 mA 2.79 150 mA 200 mA 2.78 2.77 -40 -20 0 20 40 60 CH3 2.8 V Output, 1 mA Load 10 mV / div, 7 mV pk 80 TEMPERATURE (°C) Figure 10. Output Voltage Change vs. Temperature for 2.8 Vout Figure 11. 2.8 Vout vs. Line Transient CH2 2.8 V Output1 200 mA step 50 mV / div CH3, 5.0 Vout 50 mV / div 200 mA step CH3 2.8 V Output2 1 mA Load 10 mV / div CH2 3.3 Vout 10 mV / div 1 mA Load CH4 5.0 Vout 200 mA step CH4 200 mA step on 2.8 V Output1, 200 mA / div Figure 13. Load Transient on 5.0 Vout and Effect on 3.3 Vout for 200 mA Step Figure 12. Load Transient on 2.8 Vout and Effect on 2.8 Vout for 200 mA Step NCP590 Delay 5.5 Vin, EN1 = EN2 = Vin step, Vout1 = 3.3 V 1 mA, Vout2 = 5.0 V 200 mA CH4, Vout1 1 V / div CH2, 0.8 V Output 200 mA step 50 mV / div D: 4.80 V D: 362 ms @: 4.76 V C4 rise 24.3 ms CH3 1.5 V Output 1 mA Load 10 mV / div CH2 Vout2 2 V / div C2 Rise, 50.9 ms CH3 EN1, EN2, Vin 2 V / div CH4 200 mA step on 0.8 V Output Figure 15. Typical Turn-on Delay for 3.3 Vout 1 mA, 5.0 Vout 200 mA Output with Simultaneous Vin and Enable Figure 14. Load Transient on 0.8 Vout and Effect on 1.5 Vout for 200 mA Step http://onsemi.com 8 NCP590 APPLICATION INFORMATION Output Regulator where: VIN is the maximum input voltage, VOUT is the output voltage for each output, IOUT is the output current for each output in the application, and The output is controlled by a precision trimmed reference and error amplifier. The output has saturation control for regulation while the input voltage is low, preventing over saturation. Current limit and voltage monitors complement the regulator design to give safe operating signals to the processor and control circuits. Standard linear regulator design circuitry consists of only an active output driver providing current at the regulated voltage with resistors from the regulated output to ground (used in the feedback loop). This provides good turn-on characteristics from the active PFET output driver, but turn-off characteristics are determined by the output capacitor values and impedance of the load in parallel with the internal resistors in the feedback loop. The turn-off time in the situation with high impedance loads will be slow. The NCP590 has active pull-down transistors which turn on during device turn-off creating efficient fast turn-offs independent of loading. IGND is the quiescent or ground current the regulator consumes at IOUT. Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated: RqJA + (125 oC * T A)ńPD (eq. 1) The value of RqJA can then be compared with those in the thermal resistance section of the data sheet. Those board areas with RqJA's less than the calculated value in equation 2 will keep the die temperature below 125°C. In some cases, none of the circuit board areas will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. The current flow and voltages are shown in the Measurement Circuit Diagram. A chart showing thermal resistance vs. pcb heat spreader area is shown below. Stability Considerations The input capacitor Cin in Figure 3 is necessary to provide low impedance to the input of the regulator. The output or compensation capacitor Coutx helps determine three main characteristics of a linear regulator: start-up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25°C to -40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer's data sheet usually provides this information. Stability is guaranteed at values COUT = 0.7 mF to 4.7 mF and any ESR within the operating temperature range. Enable Enabling the two outputs is controlled by two independent pins, EN1 and EN2. A high (above the high input threshold) on these logic level input pins causes the outputs to turn on. Normal operation allows for input voltages to these pins to 0.3 V above VIN. It is sometimes necessary to interface logic outputs from different operating voltages into these pins. This happens when standard operating system voltages must interface together (i.e., 5 V to 3.3 V systems). For example, a 5 V control voltage is needed to control the NCP590 operating with VIN = 3.6 V. The input current into the ENx pin can be kept to safe levels by adding a 100 k resistor in series with the 5 V control drive voltage. This will keep the input voltage in compliance with the maximum ratings and will allow control of the output. Use of this setup will affect turn-on time and will increase the enable current higher than the input current specified in the electrical parameter tables. Calculating Power Dissipation in a Dual Output Linear Regulator The maximum power dissipation for a dual output regulator (Figure x) is: PD = (VIN – VOUT1) x IOUT1 + (VIN – VOUT2 ) x IOUT2 + VIN x IGND (1) http://onsemi.com 9 NCP590 400 350 qJA (°C/W) 300 250 200 150 1 oz 100 2 oz 50 0 0 50 100 150 200 250 300 350 400 450 500 550 COPPER HEAT SPREADING AREA (mm2) 600 650 Figure 16. Thermal Performance on PCB Heat Spreader Thermal impedance of the NCP590 DFN8 mounted to a single sided copper plated circuit board. ORDERING INFORMATION* Device Orderable Part Number Output Voltage Marking Code VOUT1 VOUT2 Package Shipping NCP590MNVVTAG VV 3.3 3.3 DFN8 2x2 10,000 / Tape & Reel NCP590MNPPTAG PP 2.8 2.8 DFN8 2x2 10,000 / Tape & Reel NCP590MNDPTAG DP 1.8 2.8 DFN8 2x2 10,000 / Tape & Reel NCP590MNOATAG OA 1.5 2.4 DFN8 2x2 10,000 / Tape & Reel NCP590MN5DTAG 5D 1.2 1.8 DFN8 2x2 10,000 / Tape & Reel NCP590MN5ATAG 5A 1.2 1.5 DFN8 2x2 10,000 / Tape & Reel *Contact factory for additional voltage combinations. http://onsemi.com 10 NCP590 PACKAGE DIMENSIONS DFN8, 2x2 CASE 506AA-01 ISSUE D D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B PIN ONE REFERENCE 2X 0.10 C 2X 0.10 C ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ TOP VIEW 0.08 C SEATING PLANE MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --0.25 0.35 A 0.10 C 8X DIM A A1 A3 b D D2 E E2 e K L E (A3) SIDE VIEW A1 C D2 e e/2 4 1 8X L E2 K 8 5 8X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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