LINER LT1576C 1.5a, 200khz step-down switching regulator Datasheet

LT1576/LT1576-5
1.5A, 200kHz Step-Down
Switching Regulator
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FEATURES
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DESCRIPTIO
The LT ®1576 is a 200kHz monolithic buck mode switching
regulator. A 1.5A switch is included on the die along with
all the necessary oscillator, control and logic circuitry. The
topology is current mode for fast transient response and
good loop stability. The LT1576 is a modified version of the
industry standard LT1376 optimized for noise sensitive
applications.
Constant 200kHz Switching Frequency
1.21V Reference Voltage
Fixed 5V Output Option
Easily Synchronizable
Uses All Surface Mount Components
Inductor Size Reduced to 15µH
Saturating Switch Design: 0.2Ω
Effective Supply Current: 1.16mA
Shutdown Current: 20µA
Cycle-by-Cycle Current Limiting
Fused Lead SO-8 Package
In addition, the reference voltage has been lowered to
allow the device to produce output voltages down to 1.2V.
Quiescent current has been reduced by a factor of two.
Switch on resistance has been reduced by 30%. Switch transition times have been slowed to reduce EMI generation.
The oscillator frequency has been reduced to 200kHz to
maintain high efficiency over a wide output current range.
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APPLICATIO S
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Portable Computers
Battery-Powered Systems
Battery Charger
Distributed Power
The pinout has been changed to improve PC layout by
allowing the high current high frequency switching circuitry to be easily isolated from low current noise sensitive
control circuitry. The new SO-8 package includes a fused
ground lead which significantly reduces the thermal resistance of the device to extend the ambient operating temperature range. There is an optional function of shutdown
or synchronization. Standard surface mount external parts
can be used including the inductor and capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
Efficiency vs Load Current
5V Buck Converter
C3*
10µF TO
50µF
+
C2
0.33µF
VIN
BOOST
LT1576
OPEN = ON
SHDN
GND
* RIPPLE CURRENT RATING ≥ IOUT/2
** INCREASE L1 TO 30µH FOR LOAD
CURRENTS ABOVE 0.6A AND TO
60µH ABOVE 1A
SEE APPLICATIONS INFORMATION
D2
1N914
L1**
15µH
OUTPUT**
5V, 1.25A
VSW
BIAS
FB
VC
D1
1N5818
CC
100pF
R1
15.8k
R2
4.99k
+
C1
100µF, 10V
SOLID
TANTALUM
1576 TA01
VOUT = 5V
VIN = 10V
L = 33µH
95
EFFICIENCY (%)
INPUT
6V TO 25V
100
90
85
80
75
70
0
0.25
0.50 0.75 1.00
LOAD CURRENT (A)
1.25
1.50
1576 TA02
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LT1576/LT1576-5
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Input Voltage .......................................................... 25V
BOOST Pin Above Input Voltage ............................. 10V
SHDN Pin Voltage ..................................................... 7V
BIAS Pin Voltage ...................................................... 7V
FB Pin Voltage (Adjustable Part) ............................ 3.5V
FB Pin Current (Adjustable Part) ............................ 1mA
SYNC Pin Voltage ..................................................... 7V
Operating Junction Temperature Range
LT1576C ............................................... 0°C to 125° C
LT1576I ........................................... – 40°C to 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART NUMBER
TOP VIEW
VSW 1
VIN 2
8 SHDN OR
SYNC*
7 FB OR SENSE*
BOOST 3
6
VC
GND 4
5
BIAS
S8 PACKAGE
8-LEAD PLASTIC SO
θJA = 80°C/ W WITH FUSED GROUND PIN
CONNECTED TO GROUND PLANE OR
LARGE LANDS
LT1576CS8
LT1576CS8-SYNC
LT1576IS8
LT1576IS8-SYNC
LT1576CS8-5
LT1576CS8-5 SYNC
LT1576IS8-5
LT1576IS8-5 SYNC
S8 PART MARKING
15765
5765SN
1576I5
76I5SN
1576
1576SN
1576I
576ISN
*Default is the adjustable output voltage device with FB pin and shutdown
function. Option -5 replaces FB with SENSE pin for fixed 5V output
applications. -SYNC replaces SHDN with SYNC pin for applications
requiring synchronization. Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature
range, otherwise specifications are TA, TJ = 25°C, VIN = 15V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER
CONDITIONS
Feedback Voltage
TYP
MAX
UNITS
●
1.195
1.18
1.21
All Conditions
1.225
1.24
V
V
●
4.94
4.90
5.0
All Conditions
5.06
5.10
V
V
Sense Voltage (Fixed 5V)
SENSE Pin Resistance
Reference Voltage Line Regulation
MIN
13
5V ≤ VIN ≤ 25V
Feedback Input Bias Current
●
Error Amplifier Voltage Gain
(Notes 2, 8)
Error Amplifier Transconductance
∆I (VC) = ±10µA (Note 8)
●
18.5
26
kΩ
0.01
0.03
%/V
0.5
2
µA
200
400
800
400
1050
VC Pin to Switch Current Transconductance
1300
1700
1.5
µMho
µMho
A/ V
Error Amplifier Source Current
VFB = 1.1V
●
40
110
190
µA
Error Amplifier Sink Current
VFB = 1.4V
●
50
130
200
µA
VC Pin Switching Threshold
Duty Cycle = 0
VC Pin High Clamp
Switch Current Limit
VC Open, VFB = 1.1V, DC ≤ 50%
Slope Compensation (Note 9)
DC = 80%
Switch On Resistance (Note 7)
ISW = 1.5A
●
1.5
0.8
V
2.1
V
2
0.2
●
Maximum Switch Duty Cycle
VFB = 1.1V
●
2
3.50
0.3
90
86
94
94
A
A
0.35
0.45
Ω
Ω
%
%
LT1576/LT1576-5
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature
range, otherwise specifications are TA, TJ = 25°C, VIN = 15V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
Minimum Switch Duty Cycle (Note 10)
Switch Frequency
TYP
MAX
8
VC Set to Give 50% Duty Cycle
●
Switch Frequency Line Regulation
5V ≤ VIN ≤ 25V
●
Frequency Shifting Threshold on FB Pin
∆f = 10kHz
●
Minimum Input Voltage (Note 3)
UNITS
%
180
160
200
220
240
kHz
kHz
0
0.15
%/ V
0.4
0.74
1.0
V
●
5.0
5.5
V
Minimum Boost Voltage (Note 4)
ISW ≤ 1.5A
●
2.3
3.0
V
Boost Current (Note 5)
ISW = 0.5A
ISW = 1.5A
●
●
9
27
18
50
mA
mA
VIN Supply Current (Note 6)
VBIAS = 5V
●
0.55
0.8
mA
BIAS Supply Current (Note 6)
VBIAS = 5V
●
1.6
2.2
mA
Shutdown Supply Current
VSHDN = 0V, VIN ≤ 25V, VSW = 0V, VC Open
20
50
75
µA
µA
●
Lockout Threshold
VC Open
●
2.34
2.42
2.50
V
Shutdown Thresholds
VC Open Device Shutting Down
Device Starting Up
●
●
0.13
0.25
0.37
0.45
0.60
0.7
V
V
1.5
2.2
V
400
kHz
Synchronization Threshold
Synchronizing Range
SYNC Pin Input Resistance
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Gain is measured with a VC swing equal to 200mV above the
switching threshold level to 200mV below the upper clamp level.
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
regulated so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 5: Boost current is the current flowing into the boost pin with the pin
held 5V above input voltage. It flows only during switch on time.
Note 6: VIN supply current is the current drawn when the BIAS pin is held
at 5V and switching is disabled. Total input referred supply current is
calculated by summing input supply current (ISI) with a fraction of BIAS
supply current (ISB)
ITOT = ISI + (ISB)(VBIAS/VIN)(1.15)
with VIN = 15V, VBIAS = 5V, ISI = 0.55mA, ISB = 1.6mA and ITOT = 1.16mA.
If the BIAS pin is unavailable or open circuit, the sum of VIN and BIAS
supply currents will be drawn by the VIN pin.
250
40
kΩ
Note 7: Switch on resistance is calculated by dividing VIN to VSW voltage
by the forced current (1.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
Note 8: Transconductance and voltage gain refer to the internal amplifier
exclusive of the voltage divider. To calculate gain and transconductance,
refer to the SENSE pin on the fixed voltage parts. Divide values shown by
the ratio VOUT/1.21.
Note 9: Slope compensation is the current subtracted from the switch
current limit at 80% duty cycle. See Maximum Output Load Current in the
Applications Information section for further details.
Note 10: Minimum on-time is 400ns typical. For a 200kHz operating
frequency this means the minimum duty cycle is 8%. In frequency
foldback mode, the effective duty cycle will be less than 8%.
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LT1576/LT1576-5
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TYPICAL PERFORMANCE CHARACTERISTICS
Switch Drop
Switch Peak Current Limit
0.5
TYPICAL
25°C
0.3
–20°C
0.2
0.1
2.0
FEEDBACK VOLTAGE (V)
SWITCH PEAK CURRENT (A)
125°C
0.4
MINIMUM
1.5
1.0
0.5
0
0
0
0.25
0.50 0.75 1.00
SWITCH CURRENT (A)
1.25
20
0
1.50
60
40
DUTY CYCLE (%)
80
1.21
1.20
1576 G02
1576 G01
Shutdown Pin Bias Current
AT 2.44V STANDBY THRESHOLD
(CURRENT FLOWS OUT OF PIN)
Shutdown Thresholds
180
0.8
160
0.7
140
CURRENT (µA)
3
2
1
120
100
80
60
40
20
0
0
25
50
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
CURRENT REQUIRED TO FORCE
SHUTDOWN (FLOWS OUT OF PIN).
AFTER SHUTDOWN, CURRENT
DROPS TO A FEW µA
1576 G04
0.6
0.5
START-UP
0.4
SHUTDOWN
0.3
0.2
0.1
0
0
25
50
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
125
0
0
50
25
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
125
1576 G05
125
1576 G06
Shutdown Supply Current
Standby Thresholds
Error Amplifier Transconductance
2000
25
2.46
125
1576 G03
Shutdown Pin Bias Current
4
CURRENT (µA)
1.22
1.19
0
25
50
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
100
SHUTDOWN PIN VOLTAGE (V)
SWITCH VOLTAGE (V)
Feedback Pin Voltage
1.23
2.5
200
2.44
ON
2.43
STANDBY
2.42
2.41
PHASE
1500
20
GAIN (µMho)
INPUT SUPPLY CURRENT (µA)
2.45
150
GAIN
1000
15
10
100
VC
(
500
5
0
0
–500
)
ROUT
570k
VFB 1 × 10–3
COUT
2.4pF
50
ERROR AMPLIFIER EQUIVALENT CIRCUIT
0
RLOAD = 50Ω
2.40
50
100
–50 –25
25
75
0
JUNCTION TEMPERATURE (°C)
125
1576 G07
4
0
5
15
10
INPUT VOLTAGE (V)
20
25
1576 G08
10
100
1k
10k
FREQUENCY (Hz)
100k
–50
1M
1576 G09
PHASE (DEG)
SHUTDOWN PIN VOLTAGE (V)
VSHDN = 0V
LT1576/LT1576-5
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TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Supply Current
Error Amplifier Transconductance
100
Frequency Foldback
1600
250
75
VIN = 25V
VIN = 10V
50
25
SWITCHING FREQUENCY
SWITCHING FREQUENCY (kHz)
OR CURRENT (µA)
TRANSCONDUCTANCE (µMho)
INPUT SUPPLY CURRENT (µA)
1400
1200
1000
800
600
400
200
150
100
50
200
0
0.2
0.3
0.1
SHUTDOWN VOLTAGE (V)
0
1576 G10
0
125
1.0
0.5
1.5
FEEDBACK VOLTAGE (V)
0
2.0
1576 G11
1576 G12
Minimum Input Voltage
at VOUT = 5V
Switching Frequency
VOUT = 5V
VOUT = 10V
L = 30µH
CURRENT (A)
INPUT VOLTAGE (V)
L = 60µH
1.25
MINIMUM
STARTING VOLTAGE
220
200
Maximum Load Current
at VOUT = 10V
1.50
7
240
FREQUENCY (kHz)
FEEDBACK PIN CURRENT
0
0
50
25
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
0.4
6
MINIMUM
RUNNING VOLTAGE
1.00
L = 15µH
0.75
0.50
180
0.25
160
0
25
50
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
5
125
0
100
10
LOAD CURRENT (mA)
1
1000
1576 G13
CURRENT (A)
CURRENT (A)
0.75
1.00
L = 30µH
CORE LOSS (W)
L = 60µH
L = 15µH
0.75
0.50
0.50
0.1
0.4
PERMALLOY
µ = 125
0.01
0
10
15
INPUT VOLTAGE (V)
20
25
1576 G16
0
5
10
15
INPUT VOLTAGE (V)
20
25
1576 G17
0.2
0.12
0.08
CORE LOSS IS
INDEPENDENT OF LOAD
CURRENT UNTIL LOAD CURRENT FALLS
LOW ENOUGH FOR CIRCUIT TO GO INTO
DISCONTINUOUS MODE
VOUT = 3.3V
VOUT = 5V
2
1.2
0.8
Kool Mµ®
0.25
0.25
4
TYPE 52
POWDERED IRON
CORE LOSS (% OF 5W LOAD)
1.25
L = 15µH
5
20
12
8
1.0
VOUT = 5V, VIN = 10V, IOUT = 1A
L = 60µH
0
25
Inductor Core Loss
1.50
L = 30µH
0
20
1576 G15
Maximum Load Current
at VOUT = 3.3V
1.50
1.00
10
15
INPUT VOLTAGE (V)
1576 G14
Maximum Load Current
at VOUT = 5V
1.25
5
0
0.04
0.001
0.02
0
5
10
15
INDUCTANCE (µH)
20
25
1576 G18
Kool Mµ is a registered trademark of Magnetics, Inc.
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LT1576/LT1576-5
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TYPICAL PERFORMANCE CHARACTERISTICS
BOOST Pin Current
VC Pin Shutdown Threshold
30
1.0
THRESHOLD VOLTAGE (V)
BOOST PIN CURRENT (mA)
25
20
15
10
5
0
0
0.25
0.50 0.75 1.00
SWITCH CURRENT (A)
1.25
1.50
1576 G19
0.8
0.6
0.4
0.2
0
0
25
50
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
125
1576 G20
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PIN FUNCTIONS
VSW (Pin 1): The switch pin is the emitter of the on-chip
power NPN switch. This pin is driven up to the input pin
voltage during switch on time. Inductor current drives the
switch pin negative during switch off time. Negative voltage is clamped with the external catch diode. Maximum
negative switch voltage allowed is – 0.8V.
VIN (Pin 2): This is the collector of the on-chip power NPN
switch. This pin powers the internal circuitry and internal
regulator when the BIAS pin is not present. At NPN switch
on and off, high dI/dt edges occur on this pin. Keep the
external bypass and catch diode close to this pin. All trace
inductance on this path will create a voltage spike at switch
off, adding to the VCE voltage across the internal NPN.
GND pin of the IC. This condition will occur when load
current or other currents flow through metal paths between the GND pin and the load ground point. Keep the
ground path short between the GND pin and the load and
use a ground plane when possible. The second consideration is EMI caused by GND pin current spikes. Internal
capacitance between the VSW pin and the GND pin creates
very narrow (<10ns) current spikes in the GND pin. If the
GND pin is connected to system ground with a long metal
trace, this trace may radiate excess EMI. Keep the path
between the input bypass and the GND pin short.
BOOST (Pin 3): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal
bipolar NPN power switch. Without this added voltage, the
typical switch voltage loss would be about 1.5V. The
additional boost voltage allows the switch to saturate and
voltage loss approximates that of a 0.2Ω FET structure.
Efficiency improves from 75% for conventional bipolar
designs to > 88% for these new parts.
BIAS (Pin 5): The BIAS pin is used to improve efficiency
when operating at higher input voltages and light load
current. Connecting this pin to the regulated output voltage forces most of the internal circuitry to draw its
operating current from the output voltage rather than the
input supply. This is a much more efficient way of doing
business if the input voltage is much higher than the
output. Minimum output voltage setting for this mode of
operation is 3.3V. Efficiency improvement at VIN = 20V,
VOUT = 5V, and IOUT = 25mA is over 10%.
GND (Pin 4): The GND pin connection needs consideration
for two reasons. First, it acts as the reference for the
regulated output, so load regulation will suffer if the
“ground” end of the load is not at the same voltage as the
VC (Pin 6): The VC pin is the output of the error amplifier
and the input of the peak switch current comparator. It is
normally used for frequency compensation, but can do
double duty as a current clamp or control loop override.
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LT1576/LT1576-5
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PIN FUNCTIONS
This pin sits at about 1V for very light loads and 2V at
maximum load. It can be driven to ground to shut off the
regulator, but if driven high, current must be limited to
4mA.
FB/SENSE (Pin 7): The feedback pin is the input to the
error amplifier which is referenced to an internal 1.21V
source. An external resistive divider is used to set the
output voltage. Three additional functions are performed
by the FB pin. The fixed voltage (-5) parts have the divider
resistors included on-chip and the FB pin is used as a
SENSE pin, connected directly to the 5V output. When the
pin voltage drops below 0.7V, the switch current limit and
the switching frequency are reduced and the external sync
function is disabled. See Feedback Pin Function section in
Applications Information for details.
SYNC (Pin 8): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between
10% and 90% duty cycle. The synchronizing range is
equal to initial operating frequency, up to 400kHz. This pin
replaces SHDN on -SYNC option parts. See Synchronizing
section in Applications Information for details.
SHDN (Pin 8): The shutdown pin is used to turn off the
regulator and to reduce input drain current to a few
microamperes. Actually, this pin has two separate thresholds, one at 2.44V to disable switching, and a second at
0.4V to force complete micropower shutdown. The 2.44V
threshold functions as an accurate undervoltage lockout
(UVLO). This can be used to prevent the regulator from
operating until the input voltage has reached a predetermined level.
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BLOCK DIAGRAM
The LT1576 is a constant frequency, current mode buck
converter. This means that there is an internal clock and
two feedback loops that control the duty cycle of the power
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscillator pulse which sets the RS flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
it much easier to frequency compensate the feedback loop
and also gives much quicker transient response.
Most of the circuitry of the LT1576 operates from an
internal 2.9V bias line. The bias regulator normally draws
power from the regulator input pin, but if the BIAS pin is
connected to an external voltage higher than 3V, bias
power will be drawn from the external source (typically the
regulated output voltage). This will improve efficiency if
the BIAS pin voltage is lower than regulator input voltage.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing the switch to saturate. This
boosted voltage is generated with an external capacitor
and diode. Two comparators are connected to the shutdown pin. One has a 2.44V threshold for undervoltage
lockout and the second has a 0.4V threshold for complete
shutdown.
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LT1576/LT1576-5
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BLOCK DIAGRAM
0.025Ω
INPUT
+
BIAS
2.9V BIAS
REGULATOR
–
CURRENT
SENSE
AMPLIFIER
VOLTAGE GAIN = 35
INTERNAL
VCC
SLOPE COMP
Σ
BOOST
0.8V
200kHz
OSCILLATOR
SYNC
S
CURRENT
COMPARATOR
+
SHUTDOWN
COMPARATOR
RS
FLIP-FLOP
DRIVER
CIRCUITRY
R
–
Q1
POWER
SWITCH
VSW
–
+
0.4V
FREQUENCY
SHIFT CIRCUIT
SHDN
3.5µA
FOLDBACK
CURRENT
LIMIT
CLAMP
+
Q2
–
LOCKOUT
COMPARATOR
ERROR
AMPLIFIER
gm = 1000µMho
VC
2.44V
FB
+
–
1.21V
GND
1576 BD
Figure 1. Block Diagram
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APPLICATIONS INFORMATION
FEEDBACK PIN FUNCTIONS
The feedback (FB) pin on the LT1576 is used to set output
voltage and provide several overload protection features.
The first part of this section deals with selecting resistors
to set output voltage and the remaining part talks about
foldback frequency and current limiting created by the FB
pin. Please read both parts before committing to a final
design. The fixed 5V LT1576-5 has internal divider resistors and the FB pin is renamed SENSE, connected directly
to the output.
8
The suggested value for the output divider resistor (see
Figure 2) from FB to ground (R2) is 5k or less, and a
formula for R1 is shown below. The output voltage error
caused by ignoring the input bias current on the FB pin is
less than 0.25% with R2 = 5k. A table of standard 1%
values is shown in Table 1 for common output voltages.
Please read the following if divider resistors are increased
above the suggested values.
R1 =
(
)
R2 VOUT − 1.21
1.21
LT1576/LT1576-5
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APPLICATIONS INFORMATION
sufficiently low duty cycle if switching frequency were
maintained at 200kHz, so frequency is reduced by about
5:1 when the feedback pin voltage drops below 0.7V (see
Frequency Foldback graph). This does not affect operation
with normal load conditions; one simply sees a gear shift
in switching frequency during start-up as the output
voltage rises.
Table 1
OUTPUT
VOLTAGE
(V)
R2
(kΩ)
R1
(NEAREST 1%)
(kΩ)
% ERROR AT OUTPUT
DUE TO DISCREET 1%
RESISTOR STEPS
3
4.99
7.32
– 0.50
3.3
4.99
8.66
+ 0.30
5
4.99
15.8
+ 0.83
6
4.99
19.6
– 0.62
8
4.99
28.0
– 0.01
10
4.99
36.5
+ 0.61
12
4.99
44.2
– 0.60
15
4.99
56.2
– 1.08
In addition to lower switching frequency, the LT1576 also
operates at lower switch current limit when the feedback
pin voltage drops below 0.7V. Q2 in Figure 2 performs this
function by clamping the VC pin to a voltage less than its
normal 2.1V upper clamp level. This foldback current limit
greatly reduces power dissipation in the IC, diode and
inductor during short-circuit conditions. External synchronization is also disabled to prevent interference with
foldback operation. Again, it is nearly transparent to the
user under normal load conditions. The only loads that may
be affected are current source loads which maintain full
load current with output voltage less than 50% of final value.
In these rare situations the feedback pin can be clamped
above 0.7V to defeat foldback current limit. Caution: clamping the feedback pin means that frequency shifting will also
be defeated, so a combination of high input voltage and
dead shorted output may cause the LT1576 to lose control
of current limit.
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
This is done to control power dissipation in both the IC and
the external diode and inductor during short-circuit conditions. A shorted output requires the switching regulator
to operate at very low duty cycles, and the average current
through the diode and inductor is equal to the short-circuit
current limit of the switch (typically 2A for the LT1576,
folding back to less than 0.77A). Minimum switch on time
limitations would prevent the switcher from attaining a
LT1576
VSW
TO FREQUENCY
SHIFTING
OUTPUT
5V
1.4V
Q1
ERROR
AMPLIFIER
+
–
R1
1.21V
R3
1k
R4
1k
FB
+
R5
5k
Q2
R2
5k
TO SYNC CIRCUIT
VC
GND
1576 F02
Figure 2. Frequency and Current Limit Foldback
9
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The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.7V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 1kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
to pull 35µA out of the FB pin with 0.5V on the pin (RDIV ≤
14.3k). The net result is that reductions in frequency and
current limit are affected by output voltage divider impedance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions will occur
with high input voltage. High frequency pickup will
increase and the protection accorded by frequency and
current foldback will decrease.
finite inductor size, maximum load current is reduced by
one-half peak-to-peak inductor current. The following
formula assumes continuous mode operation, implying
that the term on the right is less than one-half of IP.
IOUT(MAX) =
IP −
Continuous Mode
For the conditions above and L = 15µH,
IOUT(MAX ) = 1.43 −
IP = 1.5A for DC ≤ 50%
IP = 1.67 – 0.18 (DC) – 0.32(DC)2 for 50% < DC < 90%
DC = Duty cycle = VOUT/VIN
Example: with VOUT = 5V, VIN = 8V; DC = 5/8 = 0.625, and;
ISW(MAX) = 1.67 – 0.18 (0.625) – 0.32(0.625)2 = 1.43A
Current rating decreases with duty cycle because the
LT1576 has internal slope compensation to prevent current mode subharmonic switching. For more details, read
Application Note 19. The LT1576 is a little unusual in this
regard because it has nonlinear slope compensation which
gives better compensation with less reduction in current
limit.
Maximum load current would be equal to maximum
switch current for an infinitely large inductor, but with
10
(5)(8 − 5)
(
)(
)( )
2 15 • 10 − 6 200 • 10 3 8
= 1.43 − 0.31 = 1.12 A
At VIN = 15V, duty cycle is 33%, so IP is just equal to a fixed
1.5A, and IOUT(MAX) is equal to:
MAXIMUM OUTPUT LOAD CURRENT
Maximum load current for a buck converter is limited by
the maximum switch current rating (IP) of the LT1576.
This current rating is 1.5A up to 50% duty cycle (DC),
decreasing to 1.3A at 80% duty cycle. This is shown
graphically in Typical Performance Characteristics and as
shown in the formula below:
(VOUT )(VIN − VOUT )
2(L)( f)( VIN )
1.5 −
(
(5)(15 − 5)
)(
)( )
2 15 • 10 − 6 200 • 10 3 15
= 1.5 − 0.56 = 0.94A
Note that there is less load current available at the higher
input voltage because inductor ripple current increases.
This is not always the case. Certain combinations of
inductor value and input voltage range may yield lower
available load current at the lowest input voltage due to
reduced peak switch current at high duty cycles. If load
current is close to the maximum available, please check
maximum available current at both input voltage
extremes. To calculate actual peak switch current with a
given set of conditions, use:
ISW(PEAK) = IOUT +
(
VOUT VIN − VOUT
( )( )( )
)
2 L f VIN
For lighter loads where discontinuous operation can be
used, maximum load current is equal to:
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IOUT(MAX) =
Discontinuous mode
(IP) (f)(L)(VIN)
2(VOUT )(VIN − VOUT )
2
Example: with L = 5µH, VOUT = 5V, and VIN(MAX) = 15V,
(1.5)  200 • 103  5 •10−6  (15)
IOUT(MAX ) =
= 0.34A
2(5)(15 − 5)
2
The main reason for using such a tiny inductor is that it is
physically very small, but keep in mind that peak-to-peak
inductor current will be very high. This will increase output
ripple voltage. If the output capacitor has to be made larger
to reduce ripple voltage, the overall circuit could actually
wind up larger.
CHOOSING THE INDUCTOR AND OUTPUT CAPACITOR
For most applications the output inductor will fall in the
range of 15µH to 60µH. Lower values are chosen to reduce
physical size of the inductor. Higher values allow more
output current because they reduce peak current seen by
the LT1576 switch, which has a 1.5A limit. Higher values
also reduce output ripple voltage, and reduce core loss.
Graphs in the Typical Performance Characteristics section
show maximum output load current versus inductor size
and input voltage. A second graph shows core loss versus
inductor size for various core materials.
When choosing an inductor you might have to consider
maximum load current, core and copper losses, allowable
component height, output voltage ripple, EMI, fault current in the inductor, saturation, and of course, cost. The
following procedure is suggested as a way of handling
these somewhat complicated and conflicting requirements.
1. Choose a value in microhenries from the graphs of
maximum load current and core loss. Choosing a small
inductor may result in discontinuous mode operation
at lighter loads, but the LT1576 is designed to work
well in either mode. Keep in mind that lower core loss
means higher cost, at least for closed core geometries
like toroids. The core loss graphs show both absolute
loss and percent loss for a 5W output, so actual percent
losses must be calculated for each situation.
Assume that the average inductor current is equal to
load current and decide whether or not the inductor
must withstand continuous fault conditions. If maximum load current is 0.5A, for instance, a 0.5A inductor
may not survive a continuous 1.5A overload condition.
Dead shorts will actually be more gentle on the inductor because the LT1576 has foldback current limiting.
2. Calculate peak inductor current at full load current to
ensure that the inductor will not saturate. Peak current
can be significantly higher than output current, especially with smaller inductors and lighter loads, so don’t
omit this step. Powdered iron cores are forgiving
because they saturate softly, whereas ferrite cores
saturate abruptly. Other core materials fall somewhere
in between. The following formula assumes continuous mode of operation, but it errs only slightly on the
high side for discontinuous mode, so it can be used for
all conditions.
IPEAK = IOUT +
(
)
2(f)(L)(V )
VOUT VIN − VOUT
IN
VIN = Maximum input voltage
f = Switching frequency, 200kHz
3. Decide if the design can tolerate an “open” core geometry like a rod or barrel, with high magnetic field
radiation, or whether it needs a closed core like a toroid
to prevent EMI problems. One would not want an open
core next to a magnetic storage media, for instance!
This is a tough decision because the rods or barrels are
temptingly cheap and small and there are no helpful
guidelines to calculate when the magnetic field radiation will be a problem.
4. Start shopping for an inductor (see representative
surface mount units in Table 2) which meets the requirements of core shape, peak current (to avoid saturation),
average current (to limit heating), and fault current (if
the inductor gets too hot, wire insulation will melt and
cause turn-to-turn shorts). Keep in mind that all good
things like high efficiency, low profile, and high temperature operation will increase cost, sometimes dramatically. Get a quote on the cheapest unit first to calibrate
yourself on price, then ask for what you really want.
11
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5. After making an initial choice, consider the secondary
things like output voltage ripple, second sourcing, etc.
Use the experts in the Linear Technology’s applications department if you feel uncertain about the final
choice. They have experience with a wide range of
inductor types and can tell you about the latest developments in low profile, surface mounting, etc.
Table 2
VENDOR/
PART NO.
SERIES
CORE
VALUE DC
CORE RESIS- MATER- HEIGHT
IAL
(mm)
(µH) (Amps) TYPE TANCE(Ω)
Coiltronics
CTX15-2
15
1.7
Tor
0.059
KMµ
6.0
CTX33-2
33
1.4
Tor
0.106
KMµ
6.0
CTX68-4
68
1.2
Tor
0.158
KMµ
6.4
CTX15-1P
15
1.4
Tor
0.087
52
4.2
CTX33-2P
33
1.3
Tor
0.126
52
6.0
CTX68-4P
68
1.1
Tor
0.238
52
6.4
CDRH74-150
15
1.47
SC
0.081
Fer
4.5
CDH115-330
33
1.68
SC
0.082
Fer
5.2
CDRH125-680
68
1.5
SC
0.12
Fer
6
CDH74-330
33
1.45
SC
0.17
Fer
5.2
DO3308P-153
15
2
SC
0.12
Fer
3
DO3316P-333
33
2
SC
0.1
Fer
5.21
DO3316P-683
68
1.4
SC
0.18
Fer
5.21
PE-53602
35
1.4
Tor
0.166
Fer
9.1
PE-53604
73
1.3
Tor
0.290
Fer
9.1
PE-53632
22
2.7
Tor
0.063
Fer
9.1
PE-53633
40
2.7
Tor
0.085
Fer
10
SMP3316-152K
15
3.5
SC
0.041
Fer
6
SMP3316-332K
33
2.3
SC
0.092
Fer
6
SMP3316-682K
68
1.7
SC
0.178
Fer
6
Sumida
Coilcraft
Table 3. Surface Mount Solid Tantalum Capacitor ESR
and Ripple Current
E Case Size
ESR (Max., Ω )
Ripple Current (A)
AVX TPS, Sprague 593D
0.1 to 0.3
0.7 to 1.1
AVX TAJ
0.7 to 0.9
0.4
0.1 to 0.3
0.7 to 1.1
0.2 (typ)
0.5 (typ)
D Case Size
AVX TPS, Sprague 593D
C Case Size
Pulse
Gowanda
Tor = Toroid
SC = Semi-closed geometry
Fer = Ferrite core material
52 = Type 52 powdered iron core material
KMµ = Kool Mµ
12
Output Capacitor
The output capacitor is normally chosen by its Effective
Series Resistance (ESR), because this is what determines
output ripple voltage. To get low ESR takes volume, so
physically smaller capacitors have high ESR. The ESR
range for typical LT1576 applications is 0.05Ω to 0.2Ω. A
typical output capacitor is an AVX type TPS, 100µF at 10V,
with a guaranteed ESR less than 0.1Ω. This is a “D” size
surface mount solid tantalum capacitor. TPS capacitors
are specially constructed and tested for low ESR, so they
give the lowest ESR for a given volume. The value in
microfarads is not particularly critical, and values from
22µF to greater than 500µF work well, but you cannot
cheat mother nature on ESR. If you find a tiny 22µF solid
tantalum capacitor, it will have high ESR, and output ripple
voltage will be terrible. Table 3 shows some typical solid
tantalum surface mount capacitors.
AVX TPS
Many engineers have heard that solid tantalum capacitors
are prone to failure if they undergo high surge currents.
This is historically true, and type TPS capacitors are
specially tested for surge capability, but surge ruggedness
is not a critical issue with the output capacitor. Solid
tantalum capacitors fail during very high turn-on surges,
which do not occur at the output of regulators. High
discharge surges, such as when the regulator output is
dead shorted, do not harm the capacitors.
Unlike the input capacitor, RMS ripple current in the
output capacitor is normally low enough that ripple current rating is not an issue. The current waveform is
triangular with a typical value of 200mARMS. The formula
to calculate this is:
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Output Capacitor Ripple Current (RMS):
IRIPPLE(RMS) =
( )(
(L)(f)(V )
0.29 VOUT VIN − VOUT
)
IN
Ceramic Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. These are tempting for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor’s ESR
generates a loop “zero” at 5kHz to 50kHz that is instrumental in giving acceptable loop phase margin. Ceramic
capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective.
They are appropriate for input bypassing because of their
high ripple current ratings and tolerance of turn-on surges.
OUTPUT RIPPLE VOLTAGE
Figure 3 shows a typical output ripple voltage waveform
for the LT1576. Ripple voltage is determined by the high
frequency impedance of the output capacitor, and ripple
current through the inductor. Peak-to-peak ripple current
through the inductor into the output capacitor is:
IP-P
(V )(V − V )
=
(V )(L)(f)
OUT
IN
OUT
( )( ) ( )
VRIPPLE = IP-P ESR + ESL Σ
dI
dt
Example: with VIN =10V, VOUT = 5V, L = 30µH, ESR = 0.1Ω,
ESL = 10nH:
IP-P =
(5)(10 − 5)
= 0.42A
− 6 
3

10 30 • 10
200 • 10



10
dI
Σ =
= 0.33 • 10 6
dt 30 • 10− 6
VRIPPLE = 0.42A 0.1 +  10 • 10− 9 0.33 • 10 6 



= 0.042 + 0.003 = 45mVP-P
( )
(
)( )
20mV/DIV
VOUT AT
IOUT = 1A
200mA/DIV
INDUCTOR
CURRENT
AT IOUT = 1A
20mV/DIV
VOUT AT
IOUT = 50mA
INDUCTOR
CURRENT
AT IOUT = 50mA
200mA/DIV
2µs/DIV
1576 F03
Figure 3. LT1576 Ripple Voltage Waveform
IN
For high frequency switchers, the sum of ripple current
slew rates may also be relevant and can be calculated
from:
Σ
dI VIN
=
dt L
Peak-to-peak output ripple voltage is the sum of a triwave
created by peak-to-peak ripple current times ESR, and a
square wave created by parasitic inductance (ESL) and
ripple current slew rate. Capacitive reactance is assumed
to be small compared to ESR or ESL.
CATCH DIODE
The suggested catch diode (D1) is a 1N5818 Schottky, or
its Motorola equivalent, MBR130. It is rated at 1A average
forward current and 30V reverse voltage. Typical forward
voltage is 0.42V at 1A. The diode conducts current only
during switch off time. Peak reverse voltage is equal to
regulator input voltage. Average forward current in normal
operation can be calculated from:
ID(AVG) =
(
IOUT VIN − VOUT
)
VIN
13
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This formula will not yield values higher than 1A with
maximum load current of 1.25A unless the ratio of input to
output voltage exceeds 5:1. The only reason to consider a
larger diode is the worst-case condition of a high input
voltage and overloaded (not shorted) output. Under shortcircuit conditions, foldback current limit will reduce diode
current to less than 1A, but if the output is overloaded and
does not fall to less than 1/3 of nominal output voltage,
foldback will not take effect. With the overloaded condition, output current will increase to a typical value of 1.8A,
determined by peak switch current limit of 2A. With
VIN = 15V, VOUT = 4V (5V overloaded) and IOUT = 1.8A:
( )
ID AVG =
(
) = 1.32A
1.8 15 − 4
15
This is safe for short periods of time, but it would be
prudent to check with the diode manufacturer if continuous operation under these conditions must be tolerated.
BOOST␣ PIN␣ CONSIDERATIONS
For most applications, the boost components are a 0.33µF
capacitor and a 1N914 or 1N4148 diode. The anode is
connected to the regulated output voltage and this generates a voltage across the boost capacitor nearly identical
to the regulated output. In certain applications, the anode
may instead be connected to the unregulated input voltage. This could be necessary if the regulated output
voltage is very low (< 3V) or if the input voltage is less than
6V. Efficiency is not affected by the capacitor value, but the
capacitor should have an ESR of less than 1Ω to ensure
that it can be recharged fully under the worst-case condition of minimum input voltage. Almost any type of film or
ceramic capacitor will work fine.
WARNING! Peak voltage on the BOOST pin is the sum of
unregulated input voltage plus the voltage across the
boost capacitor. This normally means that peak BOOST
pin voltage is equal to input voltage plus output voltage,
but when the boost diode is connected to the regulator
input, peak BOOST pin voltage is equal to twice the input
voltage. Be sure that BOOST pin voltage does not exceed
its maximum rating.
14
For nearly all applications, a 0.33µF boost capacitor works
just fine, but for the curious, more details are provided
here. The size of the boost capacitor is determined by
switch drive current requirements. During switch on time,
drain current on the capacitor is approximately IOUT/ 50. At
peak load current of 1.25A, this gives a total drain of 25mA.
Capacitor ripple voltage is equal to the product of on time
and drain current divided by capacitor value;
∆V = (tON)(25mA/C). To keep capacitor ripple voltage to
less than 0.5V (a slightly arbitrary number) at the worstcase condition of tON = 4.7µs, the capacitor needs to be
0.24µF. Boost capacitor ripple voltage is not a critical
parameter, but if the minimum voltage across the capacitor drops to less than 3V, the power switch may not
saturate fully and efficiency will drop. An approximate
formula for absolute minimum capacitor value is:
CMIN =
(I
OUT / 50
( f )( V
)(V
OUT
OUT / VIN
− 3V
)
)
f = Switching frequency
VOUT = Regulated output voltage
VIN = Minimum input voltage
This formula can yield capacitor values substantially less
than 0.24µF, but it should be used with caution since it
does not take into account secondary factors such as
capacitor series resistance, capacitance shift with temperature and output overload.
SHUTDOWN FUNCTION AND
UNDERVOLTAGE LOCKOUT
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1576. Typically, UVLO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current limit
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
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RFB
LT1576
OUTPUT
VSW
IN
INPUT
2.44V
–
STANDBY
RHI
+
3.5µA
+
SHDN
+
TOTAL
SHUTDOWN
RLO
C1
0.4V
–
GND
1576 F04
Figure 4. Undervoltage Lockout
Threshold voltage for lockout is about 2.44V. A 3.5µA bias
current flows out of the pin at threshold. This internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shutdown current is not an issue, the error due to this current
can be minimized by making RLO 10k or less. If shutdown
current is an issue, RLO can be raised to 100k, but the error
due to initial bias current and changes with temperature
should be considered.
(
)
RLO = 10k to 100k 25k suggested
RHI =
(
RLO VIN − 2.44V
(
)
)
2.44V − RLO 3.5 µA
VIN = Minimum input voltage
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capacitance to the switching nodes are minimized. If high resistor values are used, the shutdown pin should be bypassed
with a 1000pF capacitor to prevent coupling problems
from the switch node. If hysteresis is desired in the
undervoltage lockout point, a resistor RFB can be added to
the output node. Resistor values can be calculated from:
RHI =
[
(
)
RLO VIN − 2.44 ∆V / VOUT + 1 + ∆V
(
2.44 − RLO 3.5µA
( )(
RFB = RHI VOUT / ∆V
)
)
]
25k suggested for RLO
VIN = Input voltage at which switching stops as input
voltage descends to trip level
∆V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V. ∆V is therefore 1.5V and
VIN = 12V. Let RLO = 25k.
) ]
2.44 − 25k (3.5µA)
25k (10.33 )
=
=110k
RHI =
[
(
25k 12 − 2.44 1.5 / 5 + 1 + 1.5
2.35
RFB = 110k 5 / 1.5 = 366k
(
)
15
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SWITCH NODE CONSIDERATIONS
For maximum efficiency, switch rise and fall times are
made as short as possible. To prevent radiation and high
frequency resonance problems, proper layout of the components connected to the switch node is essential. B field
(magnetic) radiation is minimized by keeping catch diode,
switch pin, and input bypass capacitor leads as short as
possible. E field radiation is kept low by minimizing the
length and area of all traces connected to the switch pin
and BOOST pin. A ground plane should always be used
under the switcher circuitry to prevent interplane coupling. A suggested layout for the critical components is
shown in Figure 5. Note that the feedback resistors and
compensation components are kept as far as possible
from the switch node. Also note that the high current
ground path of the catch diode and input capacitor are kept
very short and separate from the analog ground line.
The high speed switching current path is shown schematically in Figure 6. Minimum lead length in this path is
essential to ensure clean switching and low EMI. The path
TAKE OUTPUT DIRECTLY FROM END
OF OUTPUT CAPACITOR TO AVOID
PARASITIC RESISTANCE AND
INDUCTANCE (KELVIN CONNECTION)
CONNECT OUTPUT
CAPACITOR DIRECTLY
TO HEAVY GROUND
C1
VOUT
MINIMIZE AREA
OF CONNECTIONS
TO SWITCH NODE
AND BOOST NODE
L1
MINIMUM SIZE
OF FEEDBACK PIN
CONNECTIONS
TO AVOID PICKUP
D2
SHDN/SYNC
C2
SW
KEEP INPUT
CAPACITOR
AND CATCH
DIODE CLOSE
TO REGULATOR
AND TERMINATE
THEM TO THE
SAME POINT
R2
D1
C3
VIN
FB
BOOST
R1
CC
VC
GND
RC
TERMINATE
FEEDBACK
RESISTORS AND
COMPENSATION
COMPONENTS
DIRECTLY TO
SWITCHER
GROUND PIN
GND
GROUND RING NEED NOT BE AS SHOWN
(NORMALLY EXISTS AS INTERNAL PLANE)
1576 F05
Figure 5. Suggested Layout for LT1576
SWITCH NODE
L1
5V
VIN
HIGH
FREQUENCY
CIRCULATING
PATH
LOAD
1576 F06
Figure 6. High Speed Switching Path
16
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including the switch, catch diode, and input capacitor is
the only one containing nanosecond rise and fall times. If
you follow this path on the PC layout, you will see that it is
irreducibly short. If you move the diode or input capacitor
away from the LT1576, get your resumé in order. The
other paths contain only some combination of DC and
200kHz triwave, so are much less critical.
PARASITIC RESONANCE
Resonance or “ringing” may sometimes be seen on the
switch node (see Figure 7). Very high frequency ringing
following switch rise time is caused by switch/diode/input
capacitor lead inductance and diode capacitance. Schottky diodes have very high “Q” junction capacitance that
can ring for many cycles when excited at high frequency.
If total lead length for the input capacitor, diode and switch
path is 1 inch, the inductance will be approximately 25nH.
At switch off, this will produce a spike across the NPN
output device in addition to the input voltage. At higher
currents this spike can be in the order of 10V to 20V or
RISE AND FALL
WAVEFORMS ARE
SUPERIMPOSED
(PULSE WIDTH IS
NOT 350ns)
5V/DIV
50ns/DIV
Figure 7. Switch Node Response
5V/DIV
SWITCH NODE
VOLTAGE
INDUCTOR
CURRENT
1µs/DIV
1374 F08
Figure 8. Discontinuous Mode Ringing
A second, much lower frequency ringing is seen during
switch off time if load current is low enough to allow the
inductor current to fall to zero during part of the switch off
time (see Figure 8). Switch and diode capacitance resonate with the inductor to form damped ringing at 1MHz to
10 MHz. This ringing is not harmful to the regulator and it
has not been shown to contribute significantly to EMI. Any
attempt to damp it with a resistive snubber will degrade
efficiency.
INPUT BYPASSING AND VOLTAGE RANGE
Input Bypass Capacitor
Step-down converters draw current from the input supply
in pulses. The average height of these pulses is equal to
load current, and the duty cycle is equal to VOUT/ VIN. Rise
and fall time of the current is very fast. A local bypass
capacitor across the input supply is necessary to ensure
proper operation of the regulator and minimize the ripple
current fed back into the input supply. The capacitor also
forces switching current to flow in a tight local loop,
minimizing EMI.
1374 F07
50mA/DIV
higher with a poor layout, potentially exceeding the absolute max switch voltage. The path around switch, catch
diode and input capacitor must be kept as short as
possible to ensure reliable operation. When looking at this,
a >100MHz oscilloscope must be used, and waveforms
should be observed on the leads of the package. This
switch off spike will also cause the SW node to go below
ground. The LT1576 has special circuitry inside which
mitigates this problem, but negative voltages over 1V
lasting longer than 10ns should be avoided. Note that
100MHz oscilloscopes are barely fast enough to see the
details of the falling edge overshoot in Figure 7.
Do not cheat on the ripple current rating of the Input
bypass capacitor, but also don’t get hung up on the value
in microfarads. The input capacitor is intended to absorb
all the switching current ripple, which can have an RMS
value as high as one half of load current. Ripple current
ratings on the capacitor must be observed to ensure
reliable operation. In many cases it is necessary to parallel
two capacitors to obtain the required ripple rating. Both
capacitors must be of the same value and manufacturer to
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guarantee power sharing. The actual value of the capacitor
in microfarads is not particularly important because at
200kHz, any value above 15µF is essentially resistive.
RMS ripple current rating is the critical parameter. Actual
RMS current can be calculated from:
(
)
IRIPPLE RMS = IOUT VOUT VIN − VOUT / VIN
( )
2
The term inside the radical has a maximum value of 0.5
when input voltage is twice output, and stays near 0.5 for
a relatively wide range of input voltages. It is common
practice therefore to simply use the worst-case value and
assume that RMS ripple current is one half of load current.
At maximum output current of 1.5A for the LT1576, the
input bypass capacitor should be rated at 0.75A ripple
current. Note however, that there are many secondary
considerations in choosing the final ripple current rating.
These include ambient temperature, average versus peak
load current, equipment operating schedule, and required
product lifetime. For more details, see Application Notes
19 and 46, and Design Note 95.
Input Capacitor Type
Some caution must be used when selecting the type of
capacitor used at the input to regulators. Aluminum
electrolytics are lowest cost, but are physically large to
achieve adequate ripple current rating, and size constraints (especially height), may preclude their use.
Ceramic capacitors are now available in larger values, and
their high ripple current and voltage rating make them
ideal for input bypassing. Cost is fairly high and footprint
may also be somewhat large. Solid tantalum capacitors
would be a good choice, except that they have a history of
occasional spectacular failures when they are subjected to
large current surges during power-up. The capacitors can
short and then burn with a brilliant white light and lots of
nasty smoke. This phenomenon occurs in only a small
percentage of units, but it has led some OEM companies
to forbid their use in high surge applications. The input
bypass capacitor of regulators can see these high surges
when a battery or high capacitance source is connected.
Several manufacturers have developed a line of solid
tantalum capacitors specially tested for surge capability
18
(AVX TPS series for instance, see Table 3), but even these
units may fail if the input voltage surge approaches the
maximum voltage rating of the capacitor. AVX recommends derating capacitor voltage by 2:1 for high surge
applications. The highest voltage rating is 50V, so 25V
may be a practical upper limit when using solid tantalum
capacitors for input bypassing.
Larger capacitors may be necessary when the input voltage is very close to the minimum specified on the data
sheet. Small voltage dips during switch on time are not
normally a problem, but at very low input voltage they may
cause erratic operation because the input voltage drops
below the minimum specification. Problems can also
occur if the input-to-output voltage differential is near
minimum. The amplitude of these dips is normally a
function of capacitor ESR and ESL because the capacitive
reactance is small compared to these terms. ESR tends to
be the dominate term and is inversely related to physical
capacitor size within a given capacitor type.
SYNCHRONIZING (Available as -SYNC Option)
The LT1576-SYNC has the SHDN pin replaced with a
SYNC pin, which is used to synchronize the internal
oscillator to an external signal. The SYNC input must pass
from a logic level low, through the maximum synchronization threshold with a duty cycle between 10% and 90%.
The input can be driven directly from a logic level output.
The synchronizing range is equal to initial operating frequency up to 400kHz. This means that minimum practical
sync frequency is equal to the worst-case high selfoscillating frequency (250kHz), not the typical operating
frequency of 200kHz. Caution should be used when synchronizing above 280kHz because at higher sync frequencies the amplitude of the internal slope compensation
used to prevent subharmonic switching is reduced. This
type of subharmonic switching only occurs at input voltages less than twice output voltage. Higher inductor
values will tend to eliminate this problem. See Frequency
Compensation section for a discussion of an entirely
different cause of subharmonic switching before assuming that the cause is insufficient slope compensation.
Application Note 19 has more details on the theory of slope
compensation.
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At power-up, when VC is being clamped by the FB pin (see
Figure 2, Q2), the sync function is disabled. This allows the
frequency foldback to operate in the shorted output condition. During normal operation, switching frequency is
controlled by the internal oscillator until the FB pin reaches
0.7V, after which the SYNC pin becomes operational. If no
synchronization is required, this pin should be connected
to ground.
Power dissipation in the LT1576 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following formulas show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
Switch loss:
PSW =
( ) (VOUT) + 60ns(IOUT)(VIN)(f)
2
VIN
Boost current loss:
2
PBOOST =
(
VOUT IOUT / 50
)
VIN
Quiescent current loss:
PQ = VIN  0.55 • 10−3  + VOUT 1.6 • 10−3 




2

 VOUT  0.004


+
VIN
(
2

10
= 0.1 + 012
. = 0.22W
)
RSW = Switch resistance (≈ 0.2Ω)
60ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with VIN = 10V, VOUT = 5V and IOUT = 1A:



(5) (1/ 50) = 0.05W
PBOOST =
2
10
(5) (0.004)
PQ = 10 0.55 • 10−3  + 5 1.6 • 10−3  +
2

THERMAL CALCULATIONS
RSW IOUT
(0.2)(1) (5) +  60 • 10−9 (1)(10)2 00 • 10 3
PSW =



10
= 0.02W
Total power dissipation is 0.22 + 0.05 + 0.02 = 0.29W.
Thermal resistance for LT1576 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 80°C/W. No plane will increase resistance to about
120°C/W. To calculate die temperature, add in worst-case
ambient temperature:
TJ = TA + θJA (PTOT)
With the SO-8 package (θJA = 80°C/W), at an ambient
temperature of 50°C,
TJ = 50 + 80 (0.29) = 73.2°C
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
FREQUENCY COMPENSATION
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also introduce multiple poles into the feedback loop. The inductor
and output capacitor on a conventional step-down converter actually form a resonant tank circuit that can exhibit
peaking and a rapid 180° phase shift at the resonant
frequency. By contrast, the LT1576 uses a “current mode”
architecture to help alleviate phase shift created by the
inductor. The basic connections are shown in Figure 9.
Figure 10 shows a Bode plot of the phase and gain of the
power section of the LT1576, measured from the VC pin to
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the output. Gain is set by the 1.5A/V transconductance of
the LT1576 power section and the effective complex
impedance from output to ground. Gain rolls off smoothly
above the 160Hz pole frequency set by the 100µF output
capacitor. Phase drop is limited to about 85°. Phase
recovers and gain levels off at the zero frequency (≈16kHz)
set by capacitor ESR (0.1Ω).
Error amplifier transconductance phase and gain are shown
in Figure 11. The error amplifier can be modeled as a
transconductance of 1000µMho, with an output impedance of 570kΩ in parallel with 2.4pF. In all practical
applications, the compensation network from VC pin to
ground has a much lower impedance than the output
impedance of the amplifier at frequencies above 200Hz.
This means that the error amplifier characteristics themselves do not contribute excess phase shift to the loop, and
the phase/gain characteristics of the error amplifier section are completely controlled by the external compensation network.
In Figure 12, full loop phase/gain characteristics are
shown with a compensation capacitor of 100pF, giving the
error amplifier a pole at 2.8kHz, with phase rolling off to
90° and staying there. The overall loop has a gain of 66dB
at low frequency, rolling off to unity-gain at 58kHz. Phase
shows a two-pole characteristic until the ESR of the output
capacitor brings it back above 16kHz. Phase margin is
about 77° at unity-gain.
2000
LT1576
VSW
1500
150
R1
ESR
–
1.21V
+
GAIN
1000
100
(
500
ROUT
570k
VC
COUT
2.4pF
50
+
C1
0
ERROR AMPLIFIER EQUIVALENT CIRCUIT
0
R2
RC
CF
)
VFB 1 × 10–3
PHASE (DEG)
FB
VC
GND
200
PHASE
OUTPUT
ERROR
AMPLIFIER
GAIN (µMho)
CURRENT MODE
POWER STAGE
gm = 1.5A/V
RLOAD = 50Ω
–500
CC
10
100
1k
10k
FREQUENCY (Hz)
100k
–50
1M
1576 F11
1576 F09
Figure 9. Model for Loop Response
Figure 11. Error Amplifier Gain and Phase
40
40
VIN = 10V
VOUT = 5V
IOUT = 500mA
GAIN (dB)
–40
PHASE (DEG)
PHASE
0
180
60
135
PHASE
40
VIN = 10V
VOUT = 5V
IOUT = 500mA
COUT = 100µF
10V, AVX TPS
CC = 100pF
L = 30µH
20
–80
–20
0
–40
10
100
1k
10k
FREQUENCY (Hz)
–120
100k
1576 F07
Figure 10. Response from VC Pin to Output
20
45
GAIN
0
–20
10
100
1k
10k
FREQUENCY (Hz)
90
100k
–45
1M
1576 F12
Figure 12. Overall Loop Characteristics
LOOP PHASE (DEG)
GAIN
LOOP GAIN (dB)
0
20
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Analog experts will note that around 7kHz, phase dips
close to the zero phase margin line. This is typical of
switching regulators, especially those that operate over a
wide range of loads. This region of low phase is not a
problem as long as it does not occur near unity-gain. In
practice, the variability of output capacitor ESR tends to
dominate all other effects with respect to loop response.
Variations in ESR will cause unity-gain to move around,
but at the same time phase moves with it so that adequate
phase margin is maintained over a very wide range of ESR
(≥ ±3:1).
What About a Resistor in the Compensation Network?
It is common practice in switching regulator design to add
a “zero” to the error amplifier compensation to increase
loop phase margin. This zero is created in the external
network in the form of a resistor (RC) in series with the
compensation capacitor. Increasing the size of this resistor generally creates better and better loop stability, but
there are two limitations on its value. First, the combination of output capacitor ESR and a large value for RC may
cause loop gain to stop rolling off altogether, creating a
gain margin problem. An approximate formula for RC
where gain margin falls to zero is:
(
) (GMP)(GMAVOUT
)(ESR)(1.21)
R C Loop Gain = 1 =
GMP = Transconductance of power stage = 1.5A/V
GMA = Error amplifier transconductance = 1(10–3)
ESR = Output capacitor ESR
1.21 = Reference voltage
With VOUT = 5V and ESR = 0.1Ω, a value of 27.5k for RC
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics. This
resistor sets high frequency gain of the error amplifier,
including the gain at the switching frequency. If switching
frequency gain is high enough, output ripple voltage will
appear at the VC pin with enough amplitude to muck up
proper operation of the regulator. In the marginal case,
subharmonic switching occurs, as evidenced by alternating pulse widths seen at the switch node. In more severe
cases, the regulator squeals or hisses audibly even though
the output voltage is still roughly correct. None of this will
show on a theoretical Bode plot because Bode is an
amplitude insensitive analysis. Tests have shown that if
ripple voltage on the VC is held to less than 100mVP-P, the
LT1576 will be well behaved. The formula below will give
an estimate of VC ripple voltage when RC is added to the
loop, assuming that RC is large compared to the reactance
of CC at 200kHz.
(
(RC)(GMA)(VIN − VOUT)(ESR)(1.21)
)
(VIN)(L)(f)
VC RIPPLE =
GMA = Error amplifier transconductance (1000µMho)
If a computer simulation of the LT1576 showed that a
series compensation resistor of 15k gave best overall loop
response, with adequate gain margin, the resulting VC pin
ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1Ω,
L = 30µH, would be:
(15k)(1• 10−3 )(10 − 5)(0.1)(1.21)
VC (RIPPLE) =
= 0.151V
(10)(30 • 10−6 )(200 • 103 )
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (< 10k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phase response, and some means must be used to control
ripple voltage at the VC pin. The suggested way to do this
is to add a capacitor (CF) in parallel with the RC /CC network
on the VC pin. Pole frequency for this capacitor is typically
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
add unacceptable phase shift at loop unity-gain frequency.
With RC = 15k,
CF =
5
5
=
= 265pF
(2π)( f)(RC ) 2π 200 • 103 (15k)
(
)
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How Do I Test Loop Stability?
The “standard” compensation for LT1576 is a 100pF
capacitor for CC, with RC = 0Ω. While this compensation
will work for most applications, the “optimum” value for
loop compensation components depends, to various extent, on parameters which are not well controlled. These
include inductor value (±30% due to production tolerance, load current and ripple current variations), output
capacitance (±20% to ±50% due to production tolerance,
temperature, aging and changes at the load), output
capacitor ESR (±200% due to production tolerance, temperature and aging), and finally, DC input voltage and
output load current. This makes it important for the
designer to check out the final design to ensure that it is
“robust” and tolerant of all these variations.
I check switching regulator loop stability by pulse loading
the regulator output while observing transient response at
the output, using the circuit shown in Figure 13. The
regulator loop is “hit” with a small transient AC load
current at a relatively low frequency, 50Hz to 1kHz. This
causes the output to jump a few millivolts, then settle back
to the original value, as shown in Figure 14. A well behaved
loop will settle back cleanly, whereas a loop with poor
phase or gain margin will “ring” as it settles. The number
of rings indicates the degree of stability, and the frequency
of the ringing shows the approximate unity-gain frequency of the loop. Amplitude of the signal is not particularly important, as long as the amplitude is not so high that
the loop behaves nonlinearly.
RIPPLE FILTER
470Ω
SWITCHING
REGULATOR
ADJUSTABLE
INPUT SUPPLY
+
ADJUSTABLE
DC LOAD
100µF TO
1000µF
3300pF
TO X1
OSCILLOSCOPE
PROBE
4.7k
330pF
50Ω
TO
OSCILLOSCOPE
SYNC
100Hz TO 1kHz
100mV TO 1VP-P
1576 F13
Figure 13. Loop Stability Test Circuit
VOUT AT
IOUT = 500mA
BEFORE FILTER
VOUT AT
IOUT = 500mA
AFTER FILTER
VOUT AT
IOUT = 50mA
AFTER FILTER
LOAD PULSE
THROUGH 50Ω
f ≈ 780Hz
10mV/DIV
5A/DIV
0.2ms/DIV
Figure 14. Loop Stability Check
22
1576 F14
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The output of the regulator contains both the desired low
frequency transient information and a reasonable amount
of high frequency (200kHz) ripple. The ripple makes it
difficult to observe the small transient, so a two-pole,
100kHz filter has been added. This filter is not particularly
critical; even if it attenuated the transient signal slightly,
this wouldn’t matter because amplitude is not critical.
After verifying that the setup is working correctly, I start
varying load current and input voltage to see if I can find
any combination that makes the transient response look
suspiciously “ringy.” This procedure may lead to an adjustment for best loop stability or faster loop transient
response. Nearly always you will find that loop response
looks better if you add in several kΩ for RC. Do this only
if necessary, because as explained before, RC above 1k
may require the addition of CF to control VC pin ripple.
If everything looks OK, I use a heat gun and cold spray on
the circuit (especially the output capacitor) to bring out
any temperature-dependent characteristics.
Keep in mind that this procedure does not take initial
component tolerance into account. You should see fairly
clean response under all load and line conditions to ensure
that component variations will not cause problems. One
note here: according to Murphy, the component most
likely to be changed in production is the output capacitor,
because that is the component most likely to have manufacturer variations (in ESR) large enough to cause problems. It would be a wise move to lock down the sources of
the output capacitor in production.
A possible exception to the “clean response” rule is at very
light loads, as evidenced in Figure 14 with ILOAD = 50mA.
Switching regulators tend to have dramatic shifts in loop
response at very light loads, mostly because the inductor
current becomes discontinuous. One common result is very
slow but stable characteristics. A second possibility is low
phase margin, as evidenced by ringing at the output with
transients. The good news is that the low phase margin at
light loads is not particularly sensitive to component variation, so if it looks reasonable under a transient test, it will
probably not be a problem in production. Note that frequency of the light load ringing may vary with component
tolerance but phase margin generally hangs in there.
POSITIVE-TO-NEGATIVE CONVERTER
The circuit in Figure 15 is a classic positive-to-negative
topology using a grounded inductor. It differs from the
standard approach in the way the IC chip derives its
feedback signal, however, because the LT1576 accepts
only positive feedback signals, the ground pin must be tied
to the regulated negative output. A resistor divider to
ground or, in this case, the sense pin, then provides the
proper feedback voltage for the chip.
D1
1N4148
INPUT
5.5V TO
20V
C3
10µF TO
50µF
BOOST
VIN
C2
L1*
0.33µF 15µH
VSW
R1
15.8k
LT576
+
FB
GND
VC
CC
RC
R2
4.99k
D2
1N5818
+
C1
100µF
10V TANT
×2
* INCREASE L1 TO 30µH OR 60µH FOR HIGHER CURRENT APPLICATIONS.
SEE APPLICATIONS INFORMATION
** MAXIMUM LOAD CURRENT DEPENDS ON MINIMUM INPUT VOLTAGE
AND INDUCTOR SIZE. SEE APPLICATIONS INFORMATION
OUTPUT**
– 5V, 0.5A
1576 F15
Figure 15. Positive-to-Negative Converter
Inverting regulators differ from buck regulators in the
basic switching network. Current is delivered to the output
as square waves with a peak-to-peak amplitude much
greater than load current. This means that maximum load
current will be significantly less than the LT1576’s 1.5A
maximum switch current, even with large inductor values.
The buck converter in comparison, delivers current to the
output as a triangular wave superimposed on a DC level
equal to load current, and load current can approach 1.5A
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Maximum load current:
( )(
) (
)( )( )
)(


VIN VOUT
 VOUT VIN − 0.35
IP −

2 VOUT + VIN f L 


IMAX =
VOUT + VIN − 0.35 VOUT + VF
(
(
)(
)
)
IP = Maximum rated switch current
VIN = Minimum input voltage
VOUT = Output voltage
VF = Catch diode forward voltage
0.35 = Switch voltage drop at 1.5A
Example: with VIN(MIN) = 5.5V, VOUT = 5V, L = 30µH,
VF = 0.5V, IP = 1.5A: IMAX = 0.6A. Note that this equation
does not take into account that maximum rated switch
current (IP) on the LT1576 is reduced slightly for duty
cycles above 50%. If duty cycle is expected to exceed 50%
(input voltage less than output voltage), use the actual IP
value from the Electrical Characteristics table.
Operating duty cycle:
DC =
VOUT + VF
VIN − 0.3 + VOUT + VF
(This formula uses an average value for switch loss, so it
may be several percent in error.)
This duty cycle is close enough to 50% that IP can be
assumed to be 1.5A.
OUTPUT DIVIDER
If the adjustable part is used, the resistor connected to
VOUT (R2) should be set to approximately 5k. R1 is
calculated from:
R1 =
(
)
R2 VOUT − 1.21
1.21
INDUCTOR VALUE
Unlike buck converters, positive-to-negative converters
cannot use large inductor values to reduce output ripple
voltage. At 200kHz, values larger than 75µH make almost
no change in output ripple. The graph in Figure 16 shows
peak-to-peak output ripple voltage for a 5V to – 5V converter versus inductor value. The criteria for choosing the
150
OUTPUT RIPPLE VOLTAGE (mVP-P)
with large inductors. Output ripple voltage for the positiveto-negative converter will be much higher than a buck
converter. Ripple current in the output capacitor will also
be much higher. The following equations can be used to
calculate operating conditions for the positive-to-negative
converter.
5V TO –5V CONVERTER
OUTPUT CAPACITOR’S
ESR = 0.1Ω
120
DISCONTINUOUS
ILOAD = 0.1A
90
DISCONTINUOUS
ILOAD = 0.25A
60
30
CONTINUOUS
ILOAD > 0.38A
0
0
15
45
60
30
INDUCTOR SIZE (µH)
75
1576 F16
With the conditions above:
DC =
24
5 + 0.5
= 51%
5.5 − 0.3 + 5 + 0.5
Figure 16. Ripple Voltage on Positive-to-Negative Converter
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inductor is therefore typically based on ensuring that peak
switch current rating is not exceeded. This gives the
lowest value of inductance that can be used, but in some
cases (lower output load currents) it may give a value that
creates unnecessarily high output ripple voltage. A compromise value is often chosen that reduces output ripple.
As you can see from the graph, large inductors will not
give arbitrarily low ripple, but small inductors can give
high ripple.
The difficulty in calculating the minimum inductor size
needed is that you must first know whether the switcher
will be in continuous or discontinuous mode at the critical
point where switch current is 1.5A. The first step is to use
the following formula to calculate the load current where
the switcher must use continuous mode. If your load
current is less than this, use the discontinuous mode
formula to calculate minimum inductor needed. If load
current is higher, use the continuous mode formula.
Output current where continuous mode is needed:
(V ) (I )
4(V + V )(V + V
2
ICONT =
IN
IN
OUT
2
P
IN
OUT + VF
)
Minimum inductor discontinuous mode:
L MIN =
( )( )
(f)(I )
2 VOUT IOUT
2
(5.5) (1.5)
= 0.38A
4(5.5 + 5)(5.5 + 5 + 0.5)
2
ICONT =
2
This says that discontinuous mode can be used and the
minimum inductor needed is found from:
L MIN =
( )( ) = 5.6µH
 200 • 103  1.5 2

( )
2 5 0.25
In practice, the inductor should be increased by about 30%
over the calculated minimum to handle losses and variations in value. This suggests a minimum inductor of 7.3µH
for this application, but looking at the ripple voltage chart
shows that output ripple voltage could be reduced by a factor of two by using a 30µH inductor. There is no rule of thumb
here to make a final decision. If modest ripple is needed and
the larger inductor does the trick, go for it. If ripple is noncritical use the smaller inductor. If ripple is extremely critical, a second filter may have to be added in any case, and
the lower value of inductance can be used. Keep in mind
that the output capacitor is the other critical factor in determining output ripple voltage. Ripple shown on the graph
(Figure 16) is with a capacitor’s ESR of 0.1Ω. This is reasonable for AVX type TPS “D” or “E” size surface mount solid
tantalum capacitors, but the final capacitor chosen must be
looked at carefully for ESR characteristics.
P
Minimum inductor continuous mode:
L MIN =
(V )(V )
IN
OUT
(


VOUT + VF
2 f VIN + VOUT IP − IOUT  1 +


VIN


( )(
)
)


For the example above, with maximum load current of
0.25A:
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Ripple Current in the Input and Output Capacitors
Diode Current
Positive-to-negative converters have high ripple current in
both the input and output capacitors. For long capacitor
lifetime, the RMS value of this current must be less than
the high frequency ripple current rating of the capacitor.
The following formula will give an approximate value for
RMS ripple current. This formula assumes continuous
mode and large inductor value. Small inductors will give
somewhat higher ripple current, especially in discontinuous mode. The exact formulas are very complex and
appear in Application Note 44, pages 30 and 31. For our
purposes here I have simply added a fudge factor (ff). The
value for ff is about 1.2 for higher load currents and
L ≥10µH. It increases to about 2.0 for smaller inductors at
lower load currents.
Average diode current is equal to load current. Peak diode
current will be considerably higher.
( )( )
Capacitor IRMS = ff IOUT
ff = Fudge factor (1.2 to 2.0)
26
VOUT
VIN
Peak diode current:
Continuous Mode =
IOUT
(VIN + VOUT ) + (VIN)(VOUT )
VIN
2(L)( f)( VIN + VOUT )
Discontinuous Mode =
( )( )
(L)(f)
2 IOUT VOUT
Keep in mind that during start-up and output overloads,
average diode current may be much higher than with
normal loads. Care should be used if diodes rated less than
1A are used, especially if continuous overload conditions
must be tolerated.
LT1576/LT1576-5
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
2
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 1298
27
LT1576/LT1576-5
U
TYPICAL APPLICATION
Dual Output SEPIC␣ Converter
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flyback converter, during switch on time, all the converter’s
energy is stored in L1A only, since no current flows in L1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the – 5V rail. C4 pulls L1B positive
during switch on time, causing current to flow, and energy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the – 5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit see Design
Note 100.
The circuit in Figure 17 generates both positive and
negative 5V outputs with a single piece of magnetics. L1
is a 33µH surface mount inductor from Coiltronics. It is
manufactured with two identical windings that can be
connected in series or parallel. The topology for the 5V
output is a standard buck converter. The – 5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates the SEPIC
(Single-Ended Primary Inductance Converter) topology
which improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
INPUT
6V TO 25V
BOOST
VIN
LT1576
SHDN
GND
+
C2
0.33µF
D2
1N914
L1A*
33µH
VSW
BIAS
R1
15.8k
FB
VC
C3
22µF
35V TANT
OUTPUT
5V
D1
1N5818
CC
100pF
+
C1**
100µF
10V TANT
+
C5**
100µF
10V TANT
R2
4.99k
GND
* L1 IS A SINGLE CORE WITH TWO WINDINGS
COILTRONICS CTX33-2
** AVX TSPD107M010
†
IF LOAD CAN GO TO ZERO, AN OPTIONAL
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
C4**
100µF
+
L1B*
D3
1N5818
OUTPUT
–5V†
1576 F17
Figure 17. Dual Output SEPIC Converter
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Burst Mode is a trademark of Linear Technology Corporation.
28
Linear Technology Corporation
1576f LT/TP 0999 4K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1999